1// SPDX-License-Identifier: GPL-2.0-only 2// 3// Copyright(c) 2021-2022 Intel Corporation. All rights reserved. 4// 5// Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6// Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7// 8 9#include <linux/devcoredump.h> 10#include <linux/slab.h> 11#include "avs.h" 12#include "messages.h" 13#include "path.h" 14#include "topology.h" 15 16#ifdef CONFIG_DEBUG_FS 17int avs_apl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period, 18 u32 fifo_full_period, unsigned long resource_mask, u32 *priorities) 19{ 20 struct avs_apl_log_state_info *info; 21 u32 size, num_cores = adev->hw_cfg.dsp_cores; 22 int ret, i; 23 24 if (fls_long(resource_mask) > num_cores) 25 return -EINVAL; 26 size = struct_size(info, logs_core, num_cores); 27 info = kzalloc(size, GFP_KERNEL); 28 if (!info) 29 return -ENOMEM; 30 31 info->aging_timer_period = aging_period; 32 info->fifo_full_timer_period = fifo_full_period; 33 info->core_mask = resource_mask; 34 if (enable) 35 for_each_set_bit(i, &resource_mask, num_cores) { 36 info->logs_core[i].enable = enable; 37 info->logs_core[i].min_priority = *priorities++; 38 } 39 else 40 for_each_set_bit(i, &resource_mask, num_cores) 41 info->logs_core[i].enable = enable; 42 43 ret = avs_ipc_set_enable_logs(adev, (u8 *)info, size); 44 kfree(info); 45 if (ret) 46 return AVS_IPC_RET(ret); 47 48 return 0; 49} 50#endif 51 52int avs_apl_log_buffer_status(struct avs_dev *adev, union avs_notify_msg *msg) 53{ 54 struct avs_apl_log_buffer_layout layout; 55 void __iomem *addr, *buf; 56 57 addr = avs_log_buffer_addr(adev, msg->log.core); 58 if (!addr) 59 return -ENXIO; 60 61 memcpy_fromio(&layout, addr, sizeof(layout)); 62 63 if (!avs_logging_fw(adev)) 64 /* consume the logs regardless of consumer presence */ 65 goto update_read_ptr; 66 67 buf = avs_apl_log_payload_addr(addr); 68 69 if (layout.read_ptr > layout.write_ptr) { 70 avs_dump_fw_log(adev, buf + layout.read_ptr, 71 avs_apl_log_payload_size(adev) - layout.read_ptr); 72 layout.read_ptr = 0; 73 } 74 avs_dump_fw_log_wakeup(adev, buf + layout.read_ptr, layout.write_ptr - layout.read_ptr); 75 76update_read_ptr: 77 writel(layout.write_ptr, addr); 78 return 0; 79} 80 81static int avs_apl_wait_log_entry(struct avs_dev *adev, u32 core, 82 struct avs_apl_log_buffer_layout *layout) 83{ 84 unsigned long timeout; 85 void __iomem *addr; 86 87 addr = avs_log_buffer_addr(adev, core); 88 if (!addr) 89 return -ENXIO; 90 91 timeout = jiffies + msecs_to_jiffies(10); 92 93 do { 94 memcpy_fromio(layout, addr, sizeof(*layout)); 95 if (layout->read_ptr != layout->write_ptr) 96 return 0; 97 usleep_range(500, 1000); 98 } while (!time_after(jiffies, timeout)); 99 100 return -ETIMEDOUT; 101} 102 103/* reads log header and tests its type */ 104#define avs_apl_is_entry_stackdump(addr) ((readl(addr) >> 30) & 0x1) 105 106int avs_apl_coredump(struct avs_dev *adev, union avs_notify_msg *msg) 107{ 108 struct avs_apl_log_buffer_layout layout; 109 void __iomem *addr, *buf; 110 size_t dump_size; 111 u16 offset = 0; 112 u8 *dump, *pos; 113 114 dump_size = AVS_FW_REGS_SIZE + msg->ext.coredump.stack_dump_size; 115 dump = vzalloc(dump_size); 116 if (!dump) 117 return -ENOMEM; 118 119 memcpy_fromio(dump, avs_sram_addr(adev, AVS_FW_REGS_WINDOW), AVS_FW_REGS_SIZE); 120 121 if (!msg->ext.coredump.stack_dump_size) 122 goto exit; 123 124 /* Dump the registers even if an external error prevents gathering the stack. */ 125 addr = avs_log_buffer_addr(adev, msg->ext.coredump.core_id); 126 if (!addr) 127 goto exit; 128 129 buf = avs_apl_log_payload_addr(addr); 130 memcpy_fromio(&layout, addr, sizeof(layout)); 131 if (!avs_apl_is_entry_stackdump(buf + layout.read_ptr)) { 132 union avs_notify_msg lbs_msg = AVS_NOTIFICATION(LOG_BUFFER_STATUS); 133 134 /* 135 * DSP awaits the remaining logs to be 136 * gathered before dumping stack 137 */ 138 lbs_msg.log.core = msg->ext.coredump.core_id; 139 avs_log_buffer_status_locked(adev, &lbs_msg); 140 } 141 142 pos = dump + AVS_FW_REGS_SIZE; 143 /* gather the stack */ 144 do { 145 u32 count; 146 147 if (avs_apl_wait_log_entry(adev, msg->ext.coredump.core_id, &layout)) 148 break; 149 150 if (layout.read_ptr > layout.write_ptr) { 151 count = avs_apl_log_payload_size(adev) - layout.read_ptr; 152 memcpy_fromio(pos + offset, buf + layout.read_ptr, count); 153 layout.read_ptr = 0; 154 offset += count; 155 } 156 count = layout.write_ptr - layout.read_ptr; 157 memcpy_fromio(pos + offset, buf + layout.read_ptr, count); 158 offset += count; 159 160 /* update read pointer */ 161 writel(layout.write_ptr, addr); 162 } while (offset < msg->ext.coredump.stack_dump_size); 163 164exit: 165 dev_coredumpv(adev->dev, dump, dump_size, GFP_KERNEL); 166 167 return 0; 168} 169 170static bool avs_apl_lp_streaming(struct avs_dev *adev) 171{ 172 struct avs_path *path; 173 174 spin_lock(&adev->path_list_lock); 175 /* Any gateway without buffer allocated in LP area disqualifies D0IX. */ 176 list_for_each_entry(path, &adev->path_list, node) { 177 struct avs_path_pipeline *ppl; 178 179 list_for_each_entry(ppl, &path->ppl_list, node) { 180 struct avs_path_module *mod; 181 182 list_for_each_entry(mod, &ppl->mod_list, node) { 183 struct avs_tplg_modcfg_ext *cfg; 184 185 cfg = mod->template->cfg_ext; 186 187 /* only copiers have gateway attributes */ 188 if (!guid_equal(&cfg->type, &AVS_COPIER_MOD_UUID)) 189 continue; 190 /* non-gateway copiers do not prevent PG */ 191 if (cfg->copier.dma_type == INVALID_OBJECT_ID) 192 continue; 193 194 if (!mod->gtw_attrs.lp_buffer_alloc) { 195 spin_unlock(&adev->path_list_lock); 196 return false; 197 } 198 } 199 } 200 } 201 spin_unlock(&adev->path_list_lock); 202 203 return true; 204} 205 206bool avs_apl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake) 207{ 208 /* wake in all cases */ 209 if (wake) 210 return true; 211 212 /* 213 * If no pipelines are running, allow for d0ix schedule. 214 * If all gateways have lp=1, allow for d0ix schedule. 215 * If any gateway with lp=0 is allocated, abort scheduling d0ix. 216 * 217 * Note: for cAVS 1.5+ and 1.8, D0IX is LP-firmware transition, 218 * not the power-gating mechanism known from cAVS 2.0. 219 */ 220 return avs_apl_lp_streaming(adev); 221} 222 223int avs_apl_set_d0ix(struct avs_dev *adev, bool enable) 224{ 225 bool streaming = false; 226 int ret; 227 228 if (enable) 229 /* Either idle or all gateways with lp=1. */ 230 streaming = !list_empty(&adev->path_list); 231 232 ret = avs_ipc_set_d0ix(adev, enable, streaming); 233 return AVS_IPC_RET(ret); 234} 235 236const struct avs_dsp_ops avs_apl_dsp_ops = { 237 .power = avs_dsp_core_power, 238 .reset = avs_dsp_core_reset, 239 .stall = avs_dsp_core_stall, 240 .irq_handler = avs_irq_handler, 241 .irq_thread = avs_skl_irq_thread, 242 .int_control = avs_dsp_interrupt_control, 243 .load_basefw = avs_hda_load_basefw, 244 .load_lib = avs_hda_load_library, 245 .transfer_mods = avs_hda_transfer_modules, 246 .log_buffer_offset = avs_skl_log_buffer_offset, 247 .log_buffer_status = avs_apl_log_buffer_status, 248 .coredump = avs_apl_coredump, 249 .d0ix_toggle = avs_apl_d0ix_toggle, 250 .set_d0ix = avs_apl_set_d0ix, 251 AVS_SET_ENABLE_LOGS_OP(apl) 252}; 253