1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * wm8991.h -- audio driver for WM8991 4 * 5 * Copyright 2007 Wolfson Microelectronics PLC. 6 * Author: Graeme Gregory 7 * graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com 8 */ 9 10#ifndef _WM8991_H 11#define _WM8991_H 12 13/* 14 * Register values. 15 */ 16#define WM8991_RESET 0x00 17#define WM8991_POWER_MANAGEMENT_1 0x01 18#define WM8991_POWER_MANAGEMENT_2 0x02 19#define WM8991_POWER_MANAGEMENT_3 0x03 20#define WM8991_AUDIO_INTERFACE_1 0x04 21#define WM8991_AUDIO_INTERFACE_2 0x05 22#define WM8991_CLOCKING_1 0x06 23#define WM8991_CLOCKING_2 0x07 24#define WM8991_AUDIO_INTERFACE_3 0x08 25#define WM8991_AUDIO_INTERFACE_4 0x09 26#define WM8991_DAC_CTRL 0x0A 27#define WM8991_LEFT_DAC_DIGITAL_VOLUME 0x0B 28#define WM8991_RIGHT_DAC_DIGITAL_VOLUME 0x0C 29#define WM8991_DIGITAL_SIDE_TONE 0x0D 30#define WM8991_ADC_CTRL 0x0E 31#define WM8991_LEFT_ADC_DIGITAL_VOLUME 0x0F 32#define WM8991_RIGHT_ADC_DIGITAL_VOLUME 0x10 33#define WM8991_GPIO_CTRL_1 0x12 34#define WM8991_GPIO1_GPIO2 0x13 35#define WM8991_GPIO3_GPIO4 0x14 36#define WM8991_GPIO5_GPIO6 0x15 37#define WM8991_GPIOCTRL_2 0x16 38#define WM8991_GPIO_POL 0x17 39#define WM8991_LEFT_LINE_INPUT_1_2_VOLUME 0x18 40#define WM8991_LEFT_LINE_INPUT_3_4_VOLUME 0x19 41#define WM8991_RIGHT_LINE_INPUT_1_2_VOLUME 0x1A 42#define WM8991_RIGHT_LINE_INPUT_3_4_VOLUME 0x1B 43#define WM8991_LEFT_OUTPUT_VOLUME 0x1C 44#define WM8991_RIGHT_OUTPUT_VOLUME 0x1D 45#define WM8991_LINE_OUTPUTS_VOLUME 0x1E 46#define WM8991_OUT3_4_VOLUME 0x1F 47#define WM8991_LEFT_OPGA_VOLUME 0x20 48#define WM8991_RIGHT_OPGA_VOLUME 0x21 49#define WM8991_SPEAKER_VOLUME 0x22 50#define WM8991_CLASSD1 0x23 51#define WM8991_CLASSD3 0x25 52#define WM8991_INPUT_MIXER1 0x27 53#define WM8991_INPUT_MIXER2 0x28 54#define WM8991_INPUT_MIXER3 0x29 55#define WM8991_INPUT_MIXER4 0x2A 56#define WM8991_INPUT_MIXER5 0x2B 57#define WM8991_INPUT_MIXER6 0x2C 58#define WM8991_OUTPUT_MIXER1 0x2D 59#define WM8991_OUTPUT_MIXER2 0x2E 60#define WM8991_OUTPUT_MIXER3 0x2F 61#define WM8991_OUTPUT_MIXER4 0x30 62#define WM8991_OUTPUT_MIXER5 0x31 63#define WM8991_OUTPUT_MIXER6 0x32 64#define WM8991_OUT3_4_MIXER 0x33 65#define WM8991_LINE_MIXER1 0x34 66#define WM8991_LINE_MIXER2 0x35 67#define WM8991_SPEAKER_MIXER 0x36 68#define WM8991_ADDITIONAL_CONTROL 0x37 69#define WM8991_ANTIPOP1 0x38 70#define WM8991_ANTIPOP2 0x39 71#define WM8991_MICBIAS 0x3A 72#define WM8991_PLL1 0x3C 73#define WM8991_PLL2 0x3D 74#define WM8991_PLL3 0x3E 75 76#define WM8991_REGISTER_COUNT 60 77#define WM8991_MAX_REGISTER 0x3F 78 79/* 80 * Field Definitions. 81 */ 82 83/* 84 * R0 (0x00) - Reset 85 */ 86#define WM8991_SW_RESET_CHIP_ID_MASK 0xFFFF /* SW_RESET_CHIP_ID - [15:0] */ 87 88/* 89 * R1 (0x01) - Power Management (1) 90 */ 91#define WM8991_SPK_ENA 0x1000 /* SPK_ENA */ 92#define WM8991_SPK_ENA_BIT 12 93#define WM8991_OUT3_ENA 0x0800 /* OUT3_ENA */ 94#define WM8991_OUT3_ENA_BIT 11 95#define WM8991_OUT4_ENA 0x0400 /* OUT4_ENA */ 96#define WM8991_OUT4_ENA_BIT 10 97#define WM8991_LOUT_ENA 0x0200 /* LOUT_ENA */ 98#define WM8991_LOUT_ENA_BIT 9 99#define WM8991_ROUT_ENA 0x0100 /* ROUT_ENA */ 100#define WM8991_ROUT_ENA_BIT 8 101#define WM8991_MICBIAS_ENA 0x0010 /* MICBIAS_ENA */ 102#define WM8991_MICBIAS_ENA_BIT 4 103#define WM8991_VMID_MODE_MASK 0x0006 /* VMID_MODE - [2:1] */ 104#define WM8991_VREF_ENA 0x0001 /* VREF_ENA */ 105#define WM8991_VREF_ENA_BIT 0 106 107/* 108 * R2 (0x02) - Power Management (2) 109 */ 110#define WM8991_PLL_ENA 0x8000 /* PLL_ENA */ 111#define WM8991_PLL_ENA_BIT 15 112#define WM8991_TSHUT_ENA 0x4000 /* TSHUT_ENA */ 113#define WM8991_TSHUT_ENA_BIT 14 114#define WM8991_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */ 115#define WM8991_TSHUT_OPDIS_BIT 13 116#define WM8991_OPCLK_ENA 0x0800 /* OPCLK_ENA */ 117#define WM8991_OPCLK_ENA_BIT 11 118#define WM8991_AINL_ENA 0x0200 /* AINL_ENA */ 119#define WM8991_AINL_ENA_BIT 9 120#define WM8991_AINR_ENA 0x0100 /* AINR_ENA */ 121#define WM8991_AINR_ENA_BIT 8 122#define WM8991_LIN34_ENA 0x0080 /* LIN34_ENA */ 123#define WM8991_LIN34_ENA_BIT 7 124#define WM8991_LIN12_ENA 0x0040 /* LIN12_ENA */ 125#define WM8991_LIN12_ENA_BIT 6 126#define WM8991_RIN34_ENA 0x0020 /* RIN34_ENA */ 127#define WM8991_RIN34_ENA_BIT 5 128#define WM8991_RIN12_ENA 0x0010 /* RIN12_ENA */ 129#define WM8991_RIN12_ENA_BIT 4 130#define WM8991_ADCL_ENA 0x0002 /* ADCL_ENA */ 131#define WM8991_ADCL_ENA_BIT 1 132#define WM8991_ADCR_ENA 0x0001 /* ADCR_ENA */ 133#define WM8991_ADCR_ENA_BIT 0 134 135/* 136 * R3 (0x03) - Power Management (3) 137 */ 138#define WM8991_LON_ENA 0x2000 /* LON_ENA */ 139#define WM8991_LON_ENA_BIT 13 140#define WM8991_LOP_ENA 0x1000 /* LOP_ENA */ 141#define WM8991_LOP_ENA_BIT 12 142#define WM8991_RON_ENA 0x0800 /* RON_ENA */ 143#define WM8991_RON_ENA_BIT 11 144#define WM8991_ROP_ENA 0x0400 /* ROP_ENA */ 145#define WM8991_ROP_ENA_BIT 10 146#define WM8991_LOPGA_ENA 0x0080 /* LOPGA_ENA */ 147#define WM8991_LOPGA_ENA_BIT 7 148#define WM8991_ROPGA_ENA 0x0040 /* ROPGA_ENA */ 149#define WM8991_ROPGA_ENA_BIT 6 150#define WM8991_LOMIX_ENA 0x0020 /* LOMIX_ENA */ 151#define WM8991_LOMIX_ENA_BIT 5 152#define WM8991_ROMIX_ENA 0x0010 /* ROMIX_ENA */ 153#define WM8991_ROMIX_ENA_BIT 4 154#define WM8991_DACL_ENA 0x0002 /* DACL_ENA */ 155#define WM8991_DACL_ENA_BIT 1 156#define WM8991_DACR_ENA 0x0001 /* DACR_ENA */ 157#define WM8991_DACR_ENA_BIT 0 158 159/* 160 * R4 (0x04) - Audio Interface (1) 161 */ 162#define WM8991_AIFADCL_SRC 0x8000 /* AIFADCL_SRC */ 163#define WM8991_AIFADCR_SRC 0x4000 /* AIFADCR_SRC */ 164#define WM8991_AIFADC_TDM 0x2000 /* AIFADC_TDM */ 165#define WM8991_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */ 166#define WM8991_AIF_BCLK_INV 0x0100 /* AIF_BCLK_INV */ 167#define WM8991_AIF_LRCLK_INV 0x0080 /* AIF_LRCLK_INV */ 168#define WM8991_AIF_WL_MASK 0x0060 /* AIF_WL - [6:5] */ 169#define WM8991_AIF_WL_16BITS (0 << 5) 170#define WM8991_AIF_WL_20BITS (1 << 5) 171#define WM8991_AIF_WL_24BITS (2 << 5) 172#define WM8991_AIF_WL_32BITS (3 << 5) 173#define WM8991_AIF_FMT_MASK 0x0018 /* AIF_FMT - [4:3] */ 174#define WM8991_AIF_TMF_RIGHTJ (0 << 3) 175#define WM8991_AIF_TMF_LEFTJ (1 << 3) 176#define WM8991_AIF_TMF_I2S (2 << 3) 177#define WM8991_AIF_TMF_DSP (3 << 3) 178 179/* 180 * R5 (0x05) - Audio Interface (2) 181 */ 182#define WM8991_DACL_SRC 0x8000 /* DACL_SRC */ 183#define WM8991_DACR_SRC 0x4000 /* DACR_SRC */ 184#define WM8991_AIFDAC_TDM 0x2000 /* AIFDAC_TDM */ 185#define WM8991_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */ 186#define WM8991_DAC_BOOST_MASK 0x0C00 /* DAC_BOOST - [11:10] */ 187#define WM8991_DAC_COMP 0x0010 /* DAC_COMP */ 188#define WM8991_DAC_COMPMODE 0x0008 /* DAC_COMPMODE */ 189#define WM8991_ADC_COMP 0x0004 /* ADC_COMP */ 190#define WM8991_ADC_COMPMODE 0x0002 /* ADC_COMPMODE */ 191#define WM8991_LOOPBACK 0x0001 /* LOOPBACK */ 192 193/* 194 * R6 (0x06) - Clocking (1) 195 */ 196#define WM8991_TOCLK_RATE 0x8000 /* TOCLK_RATE */ 197#define WM8991_TOCLK_ENA 0x4000 /* TOCLK_ENA */ 198#define WM8991_OPCLKDIV_MASK 0x1E00 /* OPCLKDIV - [12:9] */ 199#define WM8991_DCLKDIV_MASK 0x01C0 /* DCLKDIV - [8:6] */ 200#define WM8991_BCLK_DIV_MASK 0x001E /* BCLK_DIV - [4:1] */ 201#define WM8991_BCLK_DIV_1 (0x0 << 1) 202#define WM8991_BCLK_DIV_1_5 (0x1 << 1) 203#define WM8991_BCLK_DIV_2 (0x2 << 1) 204#define WM8991_BCLK_DIV_3 (0x3 << 1) 205#define WM8991_BCLK_DIV_4 (0x4 << 1) 206#define WM8991_BCLK_DIV_5_5 (0x5 << 1) 207#define WM8991_BCLK_DIV_6 (0x6 << 1) 208#define WM8991_BCLK_DIV_8 (0x7 << 1) 209#define WM8991_BCLK_DIV_11 (0x8 << 1) 210#define WM8991_BCLK_DIV_12 (0x9 << 1) 211#define WM8991_BCLK_DIV_16 (0xA << 1) 212#define WM8991_BCLK_DIV_22 (0xB << 1) 213#define WM8991_BCLK_DIV_24 (0xC << 1) 214#define WM8991_BCLK_DIV_32 (0xD << 1) 215#define WM8991_BCLK_DIV_44 (0xE << 1) 216#define WM8991_BCLK_DIV_48 (0xF << 1) 217 218/* 219 * R7 (0x07) - Clocking (2) 220 */ 221#define WM8991_MCLK_SRC 0x8000 /* MCLK_SRC */ 222#define WM8991_SYSCLK_SRC 0x4000 /* SYSCLK_SRC */ 223#define WM8991_CLK_FORCE 0x2000 /* CLK_FORCE */ 224#define WM8991_MCLK_DIV_MASK 0x1800 /* MCLK_DIV - [12:11] */ 225#define WM8991_MCLK_DIV_1 (0 << 11) 226#define WM8991_MCLK_DIV_2 ( 2 << 11) 227#define WM8991_MCLK_INV 0x0400 /* MCLK_INV */ 228#define WM8991_ADC_CLKDIV_MASK 0x00E0 /* ADC_CLKDIV - [7:5] */ 229#define WM8991_ADC_CLKDIV_1 (0 << 5) 230#define WM8991_ADC_CLKDIV_1_5 (1 << 5) 231#define WM8991_ADC_CLKDIV_2 (2 << 5) 232#define WM8991_ADC_CLKDIV_3 (3 << 5) 233#define WM8991_ADC_CLKDIV_4 (4 << 5) 234#define WM8991_ADC_CLKDIV_5_5 (5 << 5) 235#define WM8991_ADC_CLKDIV_6 (6 << 5) 236#define WM8991_DAC_CLKDIV_MASK 0x001C /* DAC_CLKDIV - [4:2] */ 237#define WM8991_DAC_CLKDIV_1 (0 << 2) 238#define WM8991_DAC_CLKDIV_1_5 (1 << 2) 239#define WM8991_DAC_CLKDIV_2 (2 << 2) 240#define WM8991_DAC_CLKDIV_3 (3 << 2) 241#define WM8991_DAC_CLKDIV_4 (4 << 2) 242#define WM8991_DAC_CLKDIV_5_5 (5 << 2) 243#define WM8991_DAC_CLKDIV_6 (6 << 2) 244 245/* 246 * R8 (0x08) - Audio Interface (3) 247 */ 248#define WM8991_AIF_MSTR1 0x8000 /* AIF_MSTR1 */ 249#define WM8991_AIF_MSTR2 0x4000 /* AIF_MSTR2 */ 250#define WM8991_AIF_SEL 0x2000 /* AIF_SEL */ 251#define WM8991_ADCLRC_DIR 0x0800 /* ADCLRC_DIR */ 252#define WM8991_ADCLRC_RATE_MASK 0x07FF /* ADCLRC_RATE - [10:0] */ 253 254/* 255 * R9 (0x09) - Audio Interface (4) 256 */ 257#define WM8991_ALRCGPIO1 0x8000 /* ALRCGPIO1 */ 258#define WM8991_ALRCBGPIO6 0x4000 /* ALRCBGPIO6 */ 259#define WM8991_AIF_TRIS 0x2000 /* AIF_TRIS */ 260#define WM8991_DACLRC_DIR 0x0800 /* DACLRC_DIR */ 261#define WM8991_DACLRC_RATE_MASK 0x07FF /* DACLRC_RATE - [10:0] */ 262 263/* 264 * R10 (0x0A) - DAC CTRL 265 */ 266#define WM8991_AIF_LRCLKRATE 0x0400 /* AIF_LRCLKRATE */ 267#define WM8991_DAC_MONO 0x0200 /* DAC_MONO */ 268#define WM8991_DAC_SB_FILT 0x0100 /* DAC_SB_FILT */ 269#define WM8991_DAC_MUTERATE 0x0080 /* DAC_MUTERATE */ 270#define WM8991_DAC_MUTEMODE 0x0040 /* DAC_MUTEMODE */ 271#define WM8991_DEEMP_MASK 0x0030 /* DEEMP - [5:4] */ 272#define WM8991_DAC_MUTE 0x0004 /* DAC_MUTE */ 273#define WM8991_DACL_DATINV 0x0002 /* DACL_DATINV */ 274#define WM8991_DACR_DATINV 0x0001 /* DACR_DATINV */ 275 276/* 277 * R11 (0x0B) - Left DAC Digital Volume 278 */ 279#define WM8991_DAC_VU 0x0100 /* DAC_VU */ 280#define WM8991_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */ 281#define WM8991_DACL_VOL_SHIFT 0 282/* 283 * R12 (0x0C) - Right DAC Digital Volume 284 */ 285#define WM8991_DAC_VU 0x0100 /* DAC_VU */ 286#define WM8991_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */ 287#define WM8991_DACR_VOL_SHIFT 0 288/* 289 * R13 (0x0D) - Digital Side Tone 290 */ 291#define WM8991_ADCL_DAC_SVOL_MASK 0x0F /* ADCL_DAC_SVOL - [12:9] */ 292#define WM8991_ADCL_DAC_SVOL_SHIFT 9 293#define WM8991_ADCR_DAC_SVOL_MASK 0x0F /* ADCR_DAC_SVOL - [8:5] */ 294#define WM8991_ADCR_DAC_SVOL_SHIFT 5 295#define WM8991_ADC_TO_DACL_MASK 0x03 /* ADC_TO_DACL - [3:2] */ 296#define WM8991_ADC_TO_DACL_SHIFT 2 297#define WM8991_ADC_TO_DACR_MASK 0x03 /* ADC_TO_DACR - [1:0] */ 298#define WM8991_ADC_TO_DACR_SHIFT 0 299 300/* 301 * R14 (0x0E) - ADC CTRL 302 */ 303#define WM8991_ADC_HPF_ENA 0x0100 /* ADC_HPF_ENA */ 304#define WM8991_ADC_HPF_ENA_BIT 8 305#define WM8991_ADC_HPF_CUT_MASK 0x03 /* ADC_HPF_CUT - [6:5] */ 306#define WM8991_ADC_HPF_CUT_SHIFT 5 307#define WM8991_ADCL_DATINV 0x0002 /* ADCL_DATINV */ 308#define WM8991_ADCL_DATINV_BIT 1 309#define WM8991_ADCR_DATINV 0x0001 /* ADCR_DATINV */ 310#define WM8991_ADCR_DATINV_BIT 0 311 312/* 313 * R15 (0x0F) - Left ADC Digital Volume 314 */ 315#define WM8991_ADC_VU 0x0100 /* ADC_VU */ 316#define WM8991_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */ 317#define WM8991_ADCL_VOL_SHIFT 0 318 319/* 320 * R16 (0x10) - Right ADC Digital Volume 321 */ 322#define WM8991_ADC_VU 0x0100 /* ADC_VU */ 323#define WM8991_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */ 324#define WM8991_ADCR_VOL_SHIFT 0 325 326/* 327 * R18 (0x12) - GPIO CTRL 1 328 */ 329#define WM8991_IRQ 0x1000 /* IRQ */ 330#define WM8991_TEMPOK 0x0800 /* TEMPOK */ 331#define WM8991_MICSHRT 0x0400 /* MICSHRT */ 332#define WM8991_MICDET 0x0200 /* MICDET */ 333#define WM8991_PLL_LCK 0x0100 /* PLL_LCK */ 334#define WM8991_GPI8_STATUS 0x0080 /* GPI8_STATUS */ 335#define WM8991_GPI7_STATUS 0x0040 /* GPI7_STATUS */ 336#define WM8991_GPIO6_STATUS 0x0020 /* GPIO6_STATUS */ 337#define WM8991_GPIO5_STATUS 0x0010 /* GPIO5_STATUS */ 338#define WM8991_GPIO4_STATUS 0x0008 /* GPIO4_STATUS */ 339#define WM8991_GPIO3_STATUS 0x0004 /* GPIO3_STATUS */ 340#define WM8991_GPIO2_STATUS 0x0002 /* GPIO2_STATUS */ 341#define WM8991_GPIO1_STATUS 0x0001 /* GPIO1_STATUS */ 342 343/* 344 * R19 (0x13) - GPIO1 & GPIO2 345 */ 346#define WM8991_GPIO2_DEB_ENA 0x8000 /* GPIO2_DEB_ENA */ 347#define WM8991_GPIO2_IRQ_ENA 0x4000 /* GPIO2_IRQ_ENA */ 348#define WM8991_GPIO2_PU 0x2000 /* GPIO2_PU */ 349#define WM8991_GPIO2_PD 0x1000 /* GPIO2_PD */ 350#define WM8991_GPIO2_SEL_MASK 0x0F00 /* GPIO2_SEL - [11:8] */ 351#define WM8991_GPIO1_DEB_ENA 0x0080 /* GPIO1_DEB_ENA */ 352#define WM8991_GPIO1_IRQ_ENA 0x0040 /* GPIO1_IRQ_ENA */ 353#define WM8991_GPIO1_PU 0x0020 /* GPIO1_PU */ 354#define WM8991_GPIO1_PD 0x0010 /* GPIO1_PD */ 355#define WM8991_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */ 356 357/* 358 * R20 (0x14) - GPIO3 & GPIO4 359 */ 360#define WM8991_GPIO4_DEB_ENA 0x8000 /* GPIO4_DEB_ENA */ 361#define WM8991_GPIO4_IRQ_ENA 0x4000 /* GPIO4_IRQ_ENA */ 362#define WM8991_GPIO4_PU 0x2000 /* GPIO4_PU */ 363#define WM8991_GPIO4_PD 0x1000 /* GPIO4_PD */ 364#define WM8991_GPIO4_SEL_MASK 0x0F00 /* GPIO4_SEL - [11:8] */ 365#define WM8991_GPIO3_DEB_ENA 0x0080 /* GPIO3_DEB_ENA */ 366#define WM8991_GPIO3_IRQ_ENA 0x0040 /* GPIO3_IRQ_ENA */ 367#define WM8991_GPIO3_PU 0x0020 /* GPIO3_PU */ 368#define WM8991_GPIO3_PD 0x0010 /* GPIO3_PD */ 369#define WM8991_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */ 370 371/* 372 * R21 (0x15) - GPIO5 & GPIO6 373 */ 374#define WM8991_GPIO6_DEB_ENA 0x8000 /* GPIO6_DEB_ENA */ 375#define WM8991_GPIO6_IRQ_ENA 0x4000 /* GPIO6_IRQ_ENA */ 376#define WM8991_GPIO6_PU 0x2000 /* GPIO6_PU */ 377#define WM8991_GPIO6_PD 0x1000 /* GPIO6_PD */ 378#define WM8991_GPIO6_SEL_MASK 0x0F00 /* GPIO6_SEL - [11:8] */ 379#define WM8991_GPIO5_DEB_ENA 0x0080 /* GPIO5_DEB_ENA */ 380#define WM8991_GPIO5_IRQ_ENA 0x0040 /* GPIO5_IRQ_ENA */ 381#define WM8991_GPIO5_PU 0x0020 /* GPIO5_PU */ 382#define WM8991_GPIO5_PD 0x0010 /* GPIO5_PD */ 383#define WM8991_GPIO5_SEL_MASK 0x000F /* GPIO5_SEL - [3:0] */ 384 385/* 386 * R22 (0x16) - GPIOCTRL 2 387 */ 388#define WM8991_RD_3W_ENA 0x8000 /* RD_3W_ENA */ 389#define WM8991_MODE_3W4W 0x4000 /* MODE_3W4W */ 390#define WM8991_TEMPOK_IRQ_ENA 0x0800 /* TEMPOK_IRQ_ENA */ 391#define WM8991_MICSHRT_IRQ_ENA 0x0400 /* MICSHRT_IRQ_ENA */ 392#define WM8991_MICDET_IRQ_ENA 0x0200 /* MICDET_IRQ_ENA */ 393#define WM8991_PLL_LCK_IRQ_ENA 0x0100 /* PLL_LCK_IRQ_ENA */ 394#define WM8991_GPI8_DEB_ENA 0x0080 /* GPI8_DEB_ENA */ 395#define WM8991_GPI8_IRQ_ENA 0x0040 /* GPI8_IRQ_ENA */ 396#define WM8991_GPI8_ENA 0x0010 /* GPI8_ENA */ 397#define WM8991_GPI7_DEB_ENA 0x0008 /* GPI7_DEB_ENA */ 398#define WM8991_GPI7_IRQ_ENA 0x0004 /* GPI7_IRQ_ENA */ 399#define WM8991_GPI7_ENA 0x0001 /* GPI7_ENA */ 400 401/* 402 * R23 (0x17) - GPIO_POL 403 */ 404#define WM8991_IRQ_INV 0x1000 /* IRQ_INV */ 405#define WM8991_TEMPOK_POL 0x0800 /* TEMPOK_POL */ 406#define WM8991_MICSHRT_POL 0x0400 /* MICSHRT_POL */ 407#define WM8991_MICDET_POL 0x0200 /* MICDET_POL */ 408#define WM8991_PLL_LCK_POL 0x0100 /* PLL_LCK_POL */ 409#define WM8991_GPI8_POL 0x0080 /* GPI8_POL */ 410#define WM8991_GPI7_POL 0x0040 /* GPI7_POL */ 411#define WM8991_GPIO6_POL 0x0020 /* GPIO6_POL */ 412#define WM8991_GPIO5_POL 0x0010 /* GPIO5_POL */ 413#define WM8991_GPIO4_POL 0x0008 /* GPIO4_POL */ 414#define WM8991_GPIO3_POL 0x0004 /* GPIO3_POL */ 415#define WM8991_GPIO2_POL 0x0002 /* GPIO2_POL */ 416#define WM8991_GPIO1_POL 0x0001 /* GPIO1_POL */ 417 418/* 419 * R24 (0x18) - Left Line Input 1&2 Volume 420 */ 421#define WM8991_IPVU 0x0100 /* IPVU */ 422#define WM8991_LI12MUTE 0x0080 /* LI12MUTE */ 423#define WM8991_LI12MUTE_BIT 7 424#define WM8991_LI12ZC 0x0040 /* LI12ZC */ 425#define WM8991_LI12ZC_BIT 6 426#define WM8991_LIN12VOL_MASK 0x001F /* LIN12VOL - [4:0] */ 427#define WM8991_LIN12VOL_SHIFT 0 428/* 429 * R25 (0x19) - Left Line Input 3&4 Volume 430 */ 431#define WM8991_IPVU 0x0100 /* IPVU */ 432#define WM8991_LI34MUTE 0x0080 /* LI34MUTE */ 433#define WM8991_LI34MUTE_BIT 7 434#define WM8991_LI34ZC 0x0040 /* LI34ZC */ 435#define WM8991_LI34ZC_BIT 6 436#define WM8991_LIN34VOL_MASK 0x001F /* LIN34VOL - [4:0] */ 437#define WM8991_LIN34VOL_SHIFT 0 438 439/* 440 * R26 (0x1A) - Right Line Input 1&2 Volume 441 */ 442#define WM8991_IPVU 0x0100 /* IPVU */ 443#define WM8991_RI12MUTE 0x0080 /* RI12MUTE */ 444#define WM8991_RI12MUTE_BIT 7 445#define WM8991_RI12ZC 0x0040 /* RI12ZC */ 446#define WM8991_RI12ZC_BIT 6 447#define WM8991_RIN12VOL_MASK 0x001F /* RIN12VOL - [4:0] */ 448#define WM8991_RIN12VOL_SHIFT 0 449 450/* 451 * R27 (0x1B) - Right Line Input 3&4 Volume 452 */ 453#define WM8991_IPVU 0x0100 /* IPVU */ 454#define WM8991_RI34MUTE 0x0080 /* RI34MUTE */ 455#define WM8991_RI34MUTE_BIT 7 456#define WM8991_RI34ZC 0x0040 /* RI34ZC */ 457#define WM8991_RI34ZC_BIT 6 458#define WM8991_RIN34VOL_MASK 0x001F /* RIN34VOL - [4:0] */ 459#define WM8991_RIN34VOL_SHIFT 0 460 461/* 462 * R28 (0x1C) - Left Output Volume 463 */ 464#define WM8991_OPVU 0x0100 /* OPVU */ 465#define WM8991_LOZC 0x0080 /* LOZC */ 466#define WM8991_LOZC_BIT 7 467#define WM8991_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */ 468#define WM8991_LOUTVOL_SHIFT 0 469/* 470 * R29 (0x1D) - Right Output Volume 471 */ 472#define WM8991_OPVU 0x0100 /* OPVU */ 473#define WM8991_ROZC 0x0080 /* ROZC */ 474#define WM8991_ROZC_BIT 7 475#define WM8991_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */ 476#define WM8991_ROUTVOL_SHIFT 0 477/* 478 * R30 (0x1E) - Line Outputs Volume 479 */ 480#define WM8991_LONMUTE 0x0040 /* LONMUTE */ 481#define WM8991_LONMUTE_BIT 6 482#define WM8991_LOPMUTE 0x0020 /* LOPMUTE */ 483#define WM8991_LOPMUTE_BIT 5 484#define WM8991_LOATTN 0x0010 /* LOATTN */ 485#define WM8991_LOATTN_BIT 4 486#define WM8991_RONMUTE 0x0004 /* RONMUTE */ 487#define WM8991_RONMUTE_BIT 2 488#define WM8991_ROPMUTE 0x0002 /* ROPMUTE */ 489#define WM8991_ROPMUTE_BIT 1 490#define WM8991_ROATTN 0x0001 /* ROATTN */ 491#define WM8991_ROATTN_BIT 0 492 493/* 494 * R31 (0x1F) - Out3/4 Volume 495 */ 496#define WM8991_OUT3MUTE 0x0020 /* OUT3MUTE */ 497#define WM8991_OUT3MUTE_BIT 5 498#define WM8991_OUT3ATTN 0x0010 /* OUT3ATTN */ 499#define WM8991_OUT3ATTN_BIT 4 500#define WM8991_OUT4MUTE 0x0002 /* OUT4MUTE */ 501#define WM8991_OUT4MUTE_BIT 1 502#define WM8991_OUT4ATTN 0x0001 /* OUT4ATTN */ 503#define WM8991_OUT4ATTN_BIT 0 504 505/* 506 * R32 (0x20) - Left OPGA Volume 507 */ 508#define WM8991_OPVU 0x0100 /* OPVU */ 509#define WM8991_LOPGAZC 0x0080 /* LOPGAZC */ 510#define WM8991_LOPGAZC_BIT 7 511#define WM8991_LOPGAVOL_MASK 0x007F /* LOPGAVOL - [6:0] */ 512#define WM8991_LOPGAVOL_SHIFT 0 513 514/* 515 * R33 (0x21) - Right OPGA Volume 516 */ 517#define WM8991_OPVU 0x0100 /* OPVU */ 518#define WM8991_ROPGAZC 0x0080 /* ROPGAZC */ 519#define WM8991_ROPGAZC_BIT 7 520#define WM8991_ROPGAVOL_MASK 0x007F /* ROPGAVOL - [6:0] */ 521#define WM8991_ROPGAVOL_SHIFT 0 522/* 523 * R34 (0x22) - Speaker Volume 524 */ 525#define WM8991_SPKVOL_MASK 0x0003 /* SPKVOL - [1:0] */ 526#define WM8991_SPKVOL_SHIFT 0 527 528/* 529 * R35 (0x23) - ClassD1 530 */ 531#define WM8991_CDMODE 0x0100 /* CDMODE */ 532#define WM8991_CDMODE_BIT 8 533 534/* 535 * R37 (0x25) - ClassD3 536 */ 537#define WM8991_DCGAIN_MASK 0x0007 /* DCGAIN - [5:3] */ 538#define WM8991_DCGAIN_SHIFT 3 539#define WM8991_ACGAIN_MASK 0x0007 /* ACGAIN - [2:0] */ 540#define WM8991_ACGAIN_SHIFT 0 541/* 542 * R39 (0x27) - Input Mixer1 543 */ 544#define WM8991_AINLMODE_MASK 0x000C /* AINLMODE - [3:2] */ 545#define WM8991_AINLMODE_SHIFT 2 546#define WM8991_AINRMODE_MASK 0x0003 /* AINRMODE - [1:0] */ 547#define WM8991_AINRMODE_SHIFT 0 548 549/* 550 * R40 (0x28) - Input Mixer2 551 */ 552#define WM8991_LMP4 0x0080 /* LMP4 */ 553#define WM8991_LMP4_BIT 7 /* LMP4 */ 554#define WM8991_LMN3 0x0040 /* LMN3 */ 555#define WM8991_LMN3_BIT 6 /* LMN3 */ 556#define WM8991_LMP2 0x0020 /* LMP2 */ 557#define WM8991_LMP2_BIT 5 /* LMP2 */ 558#define WM8991_LMN1 0x0010 /* LMN1 */ 559#define WM8991_LMN1_BIT 4 /* LMN1 */ 560#define WM8991_RMP4 0x0008 /* RMP4 */ 561#define WM8991_RMP4_BIT 3 /* RMP4 */ 562#define WM8991_RMN3 0x0004 /* RMN3 */ 563#define WM8991_RMN3_BIT 2 /* RMN3 */ 564#define WM8991_RMP2 0x0002 /* RMP2 */ 565#define WM8991_RMP2_BIT 1 /* RMP2 */ 566#define WM8991_RMN1 0x0001 /* RMN1 */ 567#define WM8991_RMN1_BIT 0 /* RMN1 */ 568 569/* 570 * R41 (0x29) - Input Mixer3 571 */ 572#define WM8991_L34MNB 0x0100 /* L34MNB */ 573#define WM8991_L34MNB_BIT 8 574#define WM8991_L34MNBST 0x0080 /* L34MNBST */ 575#define WM8991_L34MNBST_BIT 7 576#define WM8991_L12MNB 0x0020 /* L12MNB */ 577#define WM8991_L12MNB_BIT 5 578#define WM8991_L12MNBST 0x0010 /* L12MNBST */ 579#define WM8991_L12MNBST_BIT 4 580#define WM8991_LDBVOL_MASK 0x0007 /* LDBVOL - [2:0] */ 581#define WM8991_LDBVOL_SHIFT 0 582 583/* 584 * R42 (0x2A) - Input Mixer4 585 */ 586#define WM8991_R34MNB 0x0100 /* R34MNB */ 587#define WM8991_R34MNB_BIT 8 588#define WM8991_R34MNBST 0x0080 /* R34MNBST */ 589#define WM8991_R34MNBST_BIT 7 590#define WM8991_R12MNB 0x0020 /* R12MNB */ 591#define WM8991_R12MNB_BIT 5 592#define WM8991_R12MNBST 0x0010 /* R12MNBST */ 593#define WM8991_R12MNBST_BIT 4 594#define WM8991_RDBVOL_MASK 0x0007 /* RDBVOL - [2:0] */ 595#define WM8991_RDBVOL_SHIFT 0 596 597/* 598 * R43 (0x2B) - Input Mixer5 599 */ 600#define WM8991_LI2BVOL_MASK 0x07 /* LI2BVOL - [8:6] */ 601#define WM8991_LI2BVOL_SHIFT 6 602#define WM8991_LR4BVOL_MASK 0x07 /* LR4BVOL - [5:3] */ 603#define WM8991_LR4BVOL_SHIFT 3 604#define WM8991_LL4BVOL_MASK 0x07 /* LL4BVOL - [2:0] */ 605#define WM8991_LL4BVOL_SHIFT 0 606 607/* 608 * R44 (0x2C) - Input Mixer6 609 */ 610#define WM8991_RI2BVOL_MASK 0x07 /* RI2BVOL - [8:6] */ 611#define WM8991_RI2BVOL_SHIFT 6 612#define WM8991_RL4BVOL_MASK 0x07 /* RL4BVOL - [5:3] */ 613#define WM8991_RL4BVOL_SHIFT 3 614#define WM8991_RR4BVOL_MASK 0x07 /* RR4BVOL - [2:0] */ 615#define WM8991_RR4BVOL_SHIFT 0 616 617/* 618 * R45 (0x2D) - Output Mixer1 619 */ 620#define WM8991_LRBLO 0x0080 /* LRBLO */ 621#define WM8991_LRBLO_BIT 7 622#define WM8991_LLBLO 0x0040 /* LLBLO */ 623#define WM8991_LLBLO_BIT 6 624#define WM8991_LRI3LO 0x0020 /* LRI3LO */ 625#define WM8991_LRI3LO_BIT 5 626#define WM8991_LLI3LO 0x0010 /* LLI3LO */ 627#define WM8991_LLI3LO_BIT 4 628#define WM8991_LR12LO 0x0008 /* LR12LO */ 629#define WM8991_LR12LO_BIT 3 630#define WM8991_LL12LO 0x0004 /* LL12LO */ 631#define WM8991_LL12LO_BIT 2 632#define WM8991_LDLO 0x0001 /* LDLO */ 633#define WM8991_LDLO_BIT 0 634 635/* 636 * R46 (0x2E) - Output Mixer2 637 */ 638#define WM8991_RLBRO 0x0080 /* RLBRO */ 639#define WM8991_RLBRO_BIT 7 640#define WM8991_RRBRO 0x0040 /* RRBRO */ 641#define WM8991_RRBRO_BIT 6 642#define WM8991_RLI3RO 0x0020 /* RLI3RO */ 643#define WM8991_RLI3RO_BIT 5 644#define WM8991_RRI3RO 0x0010 /* RRI3RO */ 645#define WM8991_RRI3RO_BIT 4 646#define WM8991_RL12RO 0x0008 /* RL12RO */ 647#define WM8991_RL12RO_BIT 3 648#define WM8991_RR12RO 0x0004 /* RR12RO */ 649#define WM8991_RR12RO_BIT 2 650#define WM8991_RDRO 0x0001 /* RDRO */ 651#define WM8991_RDRO_BIT 0 652 653/* 654 * R47 (0x2F) - Output Mixer3 655 */ 656#define WM8991_LLI3LOVOL_MASK 0x07 /* LLI3LOVOL - [8:6] */ 657#define WM8991_LLI3LOVOL_SHIFT 6 658#define WM8991_LR12LOVOL_MASK 0x07 /* LR12LOVOL - [5:3] */ 659#define WM8991_LR12LOVOL_SHIFT 3 660#define WM8991_LL12LOVOL_MASK 0x07 /* LL12LOVOL - [2:0] */ 661#define WM8991_LL12LOVOL_SHIFT 0 662 663/* 664 * R48 (0x30) - Output Mixer4 665 */ 666#define WM8991_RRI3ROVOL_MASK 0x07 /* RRI3ROVOL - [8:6] */ 667#define WM8991_RRI3ROVOL_SHIFT 6 668#define WM8991_RL12ROVOL_MASK 0x07 /* RL12ROVOL - [5:3] */ 669#define WM8991_RL12ROVOL_SHIFT 3 670#define WM8991_RR12ROVOL_MASK 0x07 /* RR12ROVOL - [2:0] */ 671#define WM8991_RR12ROVOL_SHIFT 0 672 673/* 674 * R49 (0x31) - Output Mixer5 675 */ 676#define WM8991_LRI3LOVOL_MASK 0x07 /* LRI3LOVOL - [8:6] */ 677#define WM8991_LRI3LOVOL_SHIFT 6 678#define WM8991_LRBLOVOL_MASK 0x07 /* LRBLOVOL - [5:3] */ 679#define WM8991_LRBLOVOL_SHIFT 3 680#define WM8991_LLBLOVOL_MASK 0x07 /* LLBLOVOL - [2:0] */ 681#define WM8991_LLBLOVOL_SHIFT 0 682 683/* 684 * R50 (0x32) - Output Mixer6 685 */ 686#define WM8991_RLI3ROVOL_MASK 0x07 /* RLI3ROVOL - [8:6] */ 687#define WM8991_RLI3ROVOL_SHIFT 6 688#define WM8991_RLBROVOL_MASK 0x07 /* RLBROVOL - [5:3] */ 689#define WM8991_RLBROVOL_SHIFT 3 690#define WM8991_RRBROVOL_MASK 0x07 /* RRBROVOL - [2:0] */ 691#define WM8991_RRBROVOL_SHIFT 0 692 693/* 694 * R51 (0x33) - Out3/4 Mixer 695 */ 696#define WM8991_VSEL_MASK 0x0180 /* VSEL - [8:7] */ 697#define WM8991_LI4O3 0x0020 /* LI4O3 */ 698#define WM8991_LI4O3_BIT 5 699#define WM8991_LPGAO3 0x0010 /* LPGAO3 */ 700#define WM8991_LPGAO3_BIT 4 701#define WM8991_RI4O4 0x0002 /* RI4O4 */ 702#define WM8991_RI4O4_BIT 1 703#define WM8991_RPGAO4 0x0001 /* RPGAO4 */ 704#define WM8991_RPGAO4_BIT 0 705/* 706 * R52 (0x34) - Line Mixer1 707 */ 708#define WM8991_LLOPGALON 0x0040 /* LLOPGALON */ 709#define WM8991_LLOPGALON_BIT 6 710#define WM8991_LROPGALON 0x0020 /* LROPGALON */ 711#define WM8991_LROPGALON_BIT 5 712#define WM8991_LOPLON 0x0010 /* LOPLON */ 713#define WM8991_LOPLON_BIT 4 714#define WM8991_LR12LOP 0x0004 /* LR12LOP */ 715#define WM8991_LR12LOP_BIT 2 716#define WM8991_LL12LOP 0x0002 /* LL12LOP */ 717#define WM8991_LL12LOP_BIT 1 718#define WM8991_LLOPGALOP 0x0001 /* LLOPGALOP */ 719#define WM8991_LLOPGALOP_BIT 0 720/* 721 * R53 (0x35) - Line Mixer2 722 */ 723#define WM8991_RROPGARON 0x0040 /* RROPGARON */ 724#define WM8991_RROPGARON_BIT 6 725#define WM8991_RLOPGARON 0x0020 /* RLOPGARON */ 726#define WM8991_RLOPGARON_BIT 5 727#define WM8991_ROPRON 0x0010 /* ROPRON */ 728#define WM8991_ROPRON_BIT 4 729#define WM8991_RL12ROP 0x0004 /* RL12ROP */ 730#define WM8991_RL12ROP_BIT 2 731#define WM8991_RR12ROP 0x0002 /* RR12ROP */ 732#define WM8991_RR12ROP_BIT 1 733#define WM8991_RROPGAROP 0x0001 /* RROPGAROP */ 734#define WM8991_RROPGAROP_BIT 0 735 736/* 737 * R54 (0x36) - Speaker Mixer 738 */ 739#define WM8991_LB2SPK 0x0080 /* LB2SPK */ 740#define WM8991_LB2SPK_BIT 7 741#define WM8991_RB2SPK 0x0040 /* RB2SPK */ 742#define WM8991_RB2SPK_BIT 6 743#define WM8991_LI2SPK 0x0020 /* LI2SPK */ 744#define WM8991_LI2SPK_BIT 5 745#define WM8991_RI2SPK 0x0010 /* RI2SPK */ 746#define WM8991_RI2SPK_BIT 4 747#define WM8991_LOPGASPK 0x0008 /* LOPGASPK */ 748#define WM8991_LOPGASPK_BIT 3 749#define WM8991_ROPGASPK 0x0004 /* ROPGASPK */ 750#define WM8991_ROPGASPK_BIT 2 751#define WM8991_LDSPK 0x0002 /* LDSPK */ 752#define WM8991_LDSPK_BIT 1 753#define WM8991_RDSPK 0x0001 /* RDSPK */ 754#define WM8991_RDSPK_BIT 0 755 756/* 757 * R55 (0x37) - Additional Control 758 */ 759#define WM8991_VROI 0x0001 /* VROI */ 760 761/* 762 * R56 (0x38) - AntiPOP1 763 */ 764#define WM8991_DIS_LLINE 0x0020 /* DIS_LLINE */ 765#define WM8991_DIS_RLINE 0x0010 /* DIS_RLINE */ 766#define WM8991_DIS_OUT3 0x0008 /* DIS_OUT3 */ 767#define WM8991_DIS_OUT4 0x0004 /* DIS_OUT4 */ 768#define WM8991_DIS_LOUT 0x0002 /* DIS_LOUT */ 769#define WM8991_DIS_ROUT 0x0001 /* DIS_ROUT */ 770 771/* 772 * R57 (0x39) - AntiPOP2 773 */ 774#define WM8991_SOFTST 0x0040 /* SOFTST */ 775#define WM8991_BUFIOEN 0x0008 /* BUFIOEN */ 776#define WM8991_BUFDCOPEN 0x0004 /* BUFDCOPEN */ 777#define WM8991_POBCTRL 0x0002 /* POBCTRL */ 778#define WM8991_VMIDTOG 0x0001 /* VMIDTOG */ 779 780/* 781 * R58 (0x3A) - MICBIAS 782 */ 783#define WM8991_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */ 784#define WM8991_MCDTHR_MASK 0x0038 /* MCDTHR - [5:3] */ 785#define WM8991_MCD 0x0004 /* MCD */ 786#define WM8991_MBSEL 0x0001 /* MBSEL */ 787 788/* 789 * R60 (0x3C) - PLL1 790 */ 791#define WM8991_SDM 0x0080 /* SDM */ 792#define WM8991_PRESCALE 0x0040 /* PRESCALE */ 793#define WM8991_PLLN_MASK 0x000F /* PLLN - [3:0] */ 794 795/* 796 * R61 (0x3D) - PLL2 797 */ 798#define WM8991_PLLK1_MASK 0x00FF /* PLLK1 - [7:0] */ 799 800/* 801 * R62 (0x3E) - PLL3 802 */ 803#define WM8991_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ 804 805#define WM8991_MCLK_DIV 0 806#define WM8991_DACCLK_DIV 1 807#define WM8991_ADCCLK_DIV 2 808#define WM8991_BCLK_DIV 3 809 810#define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ 811 tlv_array) \ 812 SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \ 813 snd_soc_get_volsw, wm899x_outpga_put_volsw_vu, tlv_array) 814 815#endif /* _WM8991_H */ 816