1// SPDX-License-Identifier: GPL-2.0 2// 3// Driver for the TAS5805M Audio Amplifier 4// 5// Author: Andy Liu <andy-liu@ti.com> 6// Author: Daniel Beer <daniel.beer@igorinstitute.com> 7// 8// This is based on a driver originally written by Andy Liu at TI and 9// posted here: 10// 11// https://e2e.ti.com/support/audio-group/audio/f/audio-forum/722027/linux-tas5825m-linux-drivers 12// 13// It has been simplified a little and reworked for the 5.x ALSA SoC API. 14 15#include <linux/module.h> 16#include <linux/moduleparam.h> 17#include <linux/kernel.h> 18#include <linux/firmware.h> 19#include <linux/slab.h> 20#include <linux/of.h> 21#include <linux/init.h> 22#include <linux/i2c.h> 23#include <linux/regmap.h> 24#include <linux/gpio/consumer.h> 25#include <linux/regulator/consumer.h> 26#include <linux/atomic.h> 27#include <linux/workqueue.h> 28 29#include <sound/soc.h> 30#include <sound/pcm.h> 31#include <sound/initval.h> 32 33/* Datasheet-defined registers on page 0, book 0 */ 34#define REG_PAGE 0x00 35#define REG_DEVICE_CTRL_1 0x02 36#define REG_DEVICE_CTRL_2 0x03 37#define REG_SIG_CH_CTRL 0x28 38#define REG_SAP_CTRL_1 0x33 39#define REG_FS_MON 0x37 40#define REG_BCK_MON 0x38 41#define REG_CLKDET_STATUS 0x39 42#define REG_VOL_CTL 0x4c 43#define REG_AGAIN 0x54 44#define REG_ADR_PIN_CTRL 0x60 45#define REG_ADR_PIN_CONFIG 0x61 46#define REG_CHAN_FAULT 0x70 47#define REG_GLOBAL_FAULT1 0x71 48#define REG_GLOBAL_FAULT2 0x72 49#define REG_FAULT 0x78 50#define REG_BOOK 0x7f 51 52/* DEVICE_CTRL_2 register values */ 53#define DCTRL2_MODE_DEEP_SLEEP 0x00 54#define DCTRL2_MODE_SLEEP 0x01 55#define DCTRL2_MODE_HIZ 0x02 56#define DCTRL2_MODE_PLAY 0x03 57 58#define DCTRL2_MUTE 0x08 59#define DCTRL2_DIS_DSP 0x10 60 61/* This sequence of register writes must always be sent, prior to the 62 * 5ms delay while we wait for the DSP to boot. 63 */ 64static const uint8_t dsp_cfg_preboot[] = { 65 0x00, 0x00, 0x7f, 0x00, 0x03, 0x02, 0x01, 0x11, 66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 67 0x00, 0x00, 0x7f, 0x00, 0x03, 0x02, 68}; 69 70static const uint32_t tas5805m_volume[] = { 71 0x0000001B, /* 0, -110dB */ 0x0000001E, /* 1, -109dB */ 72 0x00000021, /* 2, -108dB */ 0x00000025, /* 3, -107dB */ 73 0x0000002A, /* 4, -106dB */ 0x0000002F, /* 5, -105dB */ 74 0x00000035, /* 6, -104dB */ 0x0000003B, /* 7, -103dB */ 75 0x00000043, /* 8, -102dB */ 0x0000004B, /* 9, -101dB */ 76 0x00000054, /* 10, -100dB */ 0x0000005E, /* 11, -99dB */ 77 0x0000006A, /* 12, -98dB */ 0x00000076, /* 13, -97dB */ 78 0x00000085, /* 14, -96dB */ 0x00000095, /* 15, -95dB */ 79 0x000000A7, /* 16, -94dB */ 0x000000BC, /* 17, -93dB */ 80 0x000000D3, /* 18, -92dB */ 0x000000EC, /* 19, -91dB */ 81 0x00000109, /* 20, -90dB */ 0x0000012A, /* 21, -89dB */ 82 0x0000014E, /* 22, -88dB */ 0x00000177, /* 23, -87dB */ 83 0x000001A4, /* 24, -86dB */ 0x000001D8, /* 25, -85dB */ 84 0x00000211, /* 26, -84dB */ 0x00000252, /* 27, -83dB */ 85 0x0000029A, /* 28, -82dB */ 0x000002EC, /* 29, -81dB */ 86 0x00000347, /* 30, -80dB */ 0x000003AD, /* 31, -79dB */ 87 0x00000420, /* 32, -78dB */ 0x000004A1, /* 33, -77dB */ 88 0x00000532, /* 34, -76dB */ 0x000005D4, /* 35, -75dB */ 89 0x0000068A, /* 36, -74dB */ 0x00000756, /* 37, -73dB */ 90 0x0000083B, /* 38, -72dB */ 0x0000093C, /* 39, -71dB */ 91 0x00000A5D, /* 40, -70dB */ 0x00000BA0, /* 41, -69dB */ 92 0x00000D0C, /* 42, -68dB */ 0x00000EA3, /* 43, -67dB */ 93 0x0000106C, /* 44, -66dB */ 0x0000126D, /* 45, -65dB */ 94 0x000014AD, /* 46, -64dB */ 0x00001733, /* 47, -63dB */ 95 0x00001A07, /* 48, -62dB */ 0x00001D34, /* 49, -61dB */ 96 0x000020C5, /* 50, -60dB */ 0x000024C4, /* 51, -59dB */ 97 0x00002941, /* 52, -58dB */ 0x00002E49, /* 53, -57dB */ 98 0x000033EF, /* 54, -56dB */ 0x00003A45, /* 55, -55dB */ 99 0x00004161, /* 56, -54dB */ 0x0000495C, /* 57, -53dB */ 100 0x0000524F, /* 58, -52dB */ 0x00005C5A, /* 59, -51dB */ 101 0x0000679F, /* 60, -50dB */ 0x00007444, /* 61, -49dB */ 102 0x00008274, /* 62, -48dB */ 0x0000925F, /* 63, -47dB */ 103 0x0000A43B, /* 64, -46dB */ 0x0000B845, /* 65, -45dB */ 104 0x0000CEC1, /* 66, -44dB */ 0x0000E7FB, /* 67, -43dB */ 105 0x00010449, /* 68, -42dB */ 0x0001240C, /* 69, -41dB */ 106 0x000147AE, /* 70, -40dB */ 0x00016FAA, /* 71, -39dB */ 107 0x00019C86, /* 72, -38dB */ 0x0001CEDC, /* 73, -37dB */ 108 0x00020756, /* 74, -36dB */ 0x000246B5, /* 75, -35dB */ 109 0x00028DCF, /* 76, -34dB */ 0x0002DD96, /* 77, -33dB */ 110 0x00033718, /* 78, -32dB */ 0x00039B87, /* 79, -31dB */ 111 0x00040C37, /* 80, -30dB */ 0x00048AA7, /* 81, -29dB */ 112 0x00051884, /* 82, -28dB */ 0x0005B7B1, /* 83, -27dB */ 113 0x00066A4A, /* 84, -26dB */ 0x000732AE, /* 85, -25dB */ 114 0x00081385, /* 86, -24dB */ 0x00090FCC, /* 87, -23dB */ 115 0x000A2ADB, /* 88, -22dB */ 0x000B6873, /* 89, -21dB */ 116 0x000CCCCD, /* 90, -20dB */ 0x000E5CA1, /* 91, -19dB */ 117 0x00101D3F, /* 92, -18dB */ 0x0012149A, /* 93, -17dB */ 118 0x00144961, /* 94, -16dB */ 0x0016C311, /* 95, -15dB */ 119 0x00198A13, /* 96, -14dB */ 0x001CA7D7, /* 97, -13dB */ 120 0x002026F3, /* 98, -12dB */ 0x00241347, /* 99, -11dB */ 121 0x00287A27, /* 100, -10dB */ 0x002D6A86, /* 101, -9dB */ 122 0x0032F52D, /* 102, -8dB */ 0x00392CEE, /* 103, -7dB */ 123 0x004026E7, /* 104, -6dB */ 0x0047FACD, /* 105, -5dB */ 124 0x0050C336, /* 106, -4dB */ 0x005A9DF8, /* 107, -3dB */ 125 0x0065AC8C, /* 108, -2dB */ 0x00721483, /* 109, -1dB */ 126 0x00800000, /* 110, 0dB */ 0x008F9E4D, /* 111, 1dB */ 127 0x00A12478, /* 112, 2dB */ 0x00B4CE08, /* 113, 3dB */ 128 0x00CADDC8, /* 114, 4dB */ 0x00E39EA9, /* 115, 5dB */ 129 0x00FF64C1, /* 116, 6dB */ 0x011E8E6A, /* 117, 7dB */ 130 0x0141857F, /* 118, 8dB */ 0x0168C0C6, /* 119, 9dB */ 131 0x0194C584, /* 120, 10dB */ 0x01C62940, /* 121, 11dB */ 132 0x01FD93C2, /* 122, 12dB */ 0x023BC148, /* 123, 13dB */ 133 0x02818508, /* 124, 14dB */ 0x02CFCC01, /* 125, 15dB */ 134 0x0327A01A, /* 126, 16dB */ 0x038A2BAD, /* 127, 17dB */ 135 0x03F8BD7A, /* 128, 18dB */ 0x0474CD1B, /* 129, 19dB */ 136 0x05000000, /* 130, 20dB */ 0x059C2F02, /* 131, 21dB */ 137 0x064B6CAE, /* 132, 22dB */ 0x07100C4D, /* 133, 23dB */ 138 0x07ECA9CD, /* 134, 24dB */ 0x08E43299, /* 135, 25dB */ 139 0x09F9EF8E, /* 136, 26dB */ 0x0B319025, /* 137, 27dB */ 140 0x0C8F36F2, /* 138, 28dB */ 0x0E1787B8, /* 139, 29dB */ 141 0x0FCFB725, /* 140, 30dB */ 0x11BD9C84, /* 141, 31dB */ 142 0x13E7C594, /* 142, 32dB */ 0x16558CCB, /* 143, 33dB */ 143 0x190F3254, /* 144, 34dB */ 0x1C1DF80E, /* 145, 35dB */ 144 0x1F8C4107, /* 146, 36dB */ 0x2365B4BF, /* 147, 37dB */ 145 0x27B766C2, /* 148, 38dB */ 0x2C900313, /* 149, 39dB */ 146 0x32000000, /* 150, 40dB */ 0x3819D612, /* 151, 41dB */ 147 0x3EF23ECA, /* 152, 42dB */ 0x46A07B07, /* 153, 43dB */ 148 0x4F3EA203, /* 154, 44dB */ 0x58E9F9F9, /* 155, 45dB */ 149 0x63C35B8E, /* 156, 46dB */ 0x6FEFA16D, /* 157, 47dB */ 150 0x7D982575, /* 158, 48dB */ 151}; 152 153#define TAS5805M_VOLUME_MAX ((int)ARRAY_SIZE(tas5805m_volume) - 1) 154#define TAS5805M_VOLUME_MIN 0 155 156struct tas5805m_priv { 157 struct i2c_client *i2c; 158 struct regulator *pvdd; 159 struct gpio_desc *gpio_pdn_n; 160 161 uint8_t *dsp_cfg_data; 162 int dsp_cfg_len; 163 164 struct regmap *regmap; 165 166 int vol[2]; 167 bool is_powered; 168 bool is_muted; 169 170 struct work_struct work; 171 struct mutex lock; 172}; 173 174static void set_dsp_scale(struct regmap *rm, int offset, int vol) 175{ 176 uint8_t v[4]; 177 uint32_t x = tas5805m_volume[vol]; 178 int i; 179 180 for (i = 0; i < 4; i++) { 181 v[3 - i] = x; 182 x >>= 8; 183 } 184 185 regmap_bulk_write(rm, offset, v, ARRAY_SIZE(v)); 186} 187 188static void tas5805m_refresh(struct tas5805m_priv *tas5805m) 189{ 190 struct regmap *rm = tas5805m->regmap; 191 192 dev_dbg(&tas5805m->i2c->dev, "refresh: is_muted=%d, vol=%d/%d\n", 193 tas5805m->is_muted, tas5805m->vol[0], tas5805m->vol[1]); 194 195 regmap_write(rm, REG_PAGE, 0x00); 196 regmap_write(rm, REG_BOOK, 0x8c); 197 regmap_write(rm, REG_PAGE, 0x2a); 198 199 /* Refresh volume. The actual volume control documented in the 200 * datasheet doesn't seem to work correctly. This is a pair of 201 * DSP registers which are *not* documented in the datasheet. 202 */ 203 set_dsp_scale(rm, 0x24, tas5805m->vol[0]); 204 set_dsp_scale(rm, 0x28, tas5805m->vol[1]); 205 206 regmap_write(rm, REG_PAGE, 0x00); 207 regmap_write(rm, REG_BOOK, 0x00); 208 209 /* Set/clear digital soft-mute */ 210 regmap_write(rm, REG_DEVICE_CTRL_2, 211 (tas5805m->is_muted ? DCTRL2_MUTE : 0) | 212 DCTRL2_MODE_PLAY); 213} 214 215static int tas5805m_vol_info(struct snd_kcontrol *kcontrol, 216 struct snd_ctl_elem_info *uinfo) 217{ 218 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 219 uinfo->count = 2; 220 221 uinfo->value.integer.min = TAS5805M_VOLUME_MIN; 222 uinfo->value.integer.max = TAS5805M_VOLUME_MAX; 223 return 0; 224} 225 226static int tas5805m_vol_get(struct snd_kcontrol *kcontrol, 227 struct snd_ctl_elem_value *ucontrol) 228{ 229 struct snd_soc_component *component = 230 snd_soc_kcontrol_component(kcontrol); 231 struct tas5805m_priv *tas5805m = 232 snd_soc_component_get_drvdata(component); 233 234 mutex_lock(&tas5805m->lock); 235 ucontrol->value.integer.value[0] = tas5805m->vol[0]; 236 ucontrol->value.integer.value[1] = tas5805m->vol[1]; 237 mutex_unlock(&tas5805m->lock); 238 239 return 0; 240} 241 242static inline int volume_is_valid(int v) 243{ 244 return (v >= TAS5805M_VOLUME_MIN) && (v <= TAS5805M_VOLUME_MAX); 245} 246 247static int tas5805m_vol_put(struct snd_kcontrol *kcontrol, 248 struct snd_ctl_elem_value *ucontrol) 249{ 250 struct snd_soc_component *component = 251 snd_soc_kcontrol_component(kcontrol); 252 struct tas5805m_priv *tas5805m = 253 snd_soc_component_get_drvdata(component); 254 int ret = 0; 255 256 if (!(volume_is_valid(ucontrol->value.integer.value[0]) && 257 volume_is_valid(ucontrol->value.integer.value[1]))) 258 return -EINVAL; 259 260 mutex_lock(&tas5805m->lock); 261 if (tas5805m->vol[0] != ucontrol->value.integer.value[0] || 262 tas5805m->vol[1] != ucontrol->value.integer.value[1]) { 263 tas5805m->vol[0] = ucontrol->value.integer.value[0]; 264 tas5805m->vol[1] = ucontrol->value.integer.value[1]; 265 dev_dbg(component->dev, "set vol=%d/%d (is_powered=%d)\n", 266 tas5805m->vol[0], tas5805m->vol[1], 267 tas5805m->is_powered); 268 if (tas5805m->is_powered) 269 tas5805m_refresh(tas5805m); 270 ret = 1; 271 } 272 mutex_unlock(&tas5805m->lock); 273 274 return ret; 275} 276 277static const struct snd_kcontrol_new tas5805m_snd_controls[] = { 278 { 279 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 280 .name = "Master Playback Volume", 281 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | 282 SNDRV_CTL_ELEM_ACCESS_READWRITE, 283 .info = tas5805m_vol_info, 284 .get = tas5805m_vol_get, 285 .put = tas5805m_vol_put, 286 }, 287}; 288 289static void send_cfg(struct regmap *rm, 290 const uint8_t *s, unsigned int len) 291{ 292 unsigned int i; 293 294 for (i = 0; i + 1 < len; i += 2) 295 regmap_write(rm, s[i], s[i + 1]); 296} 297 298/* The TAS5805M DSP can't be configured until the I2S clock has been 299 * present and stable for 5ms, or else it won't boot and we get no 300 * sound. 301 */ 302static int tas5805m_trigger(struct snd_pcm_substream *substream, int cmd, 303 struct snd_soc_dai *dai) 304{ 305 struct snd_soc_component *component = dai->component; 306 struct tas5805m_priv *tas5805m = 307 snd_soc_component_get_drvdata(component); 308 309 switch (cmd) { 310 case SNDRV_PCM_TRIGGER_START: 311 case SNDRV_PCM_TRIGGER_RESUME: 312 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 313 dev_dbg(component->dev, "clock start\n"); 314 schedule_work(&tas5805m->work); 315 break; 316 317 case SNDRV_PCM_TRIGGER_STOP: 318 case SNDRV_PCM_TRIGGER_SUSPEND: 319 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 320 break; 321 322 default: 323 return -EINVAL; 324 } 325 326 return 0; 327} 328 329static void do_work(struct work_struct *work) 330{ 331 struct tas5805m_priv *tas5805m = 332 container_of(work, struct tas5805m_priv, work); 333 struct regmap *rm = tas5805m->regmap; 334 335 dev_dbg(&tas5805m->i2c->dev, "DSP startup\n"); 336 337 mutex_lock(&tas5805m->lock); 338 /* We mustn't issue any I2C transactions until the I2S 339 * clock is stable. Furthermore, we must allow a 5ms 340 * delay after the first set of register writes to 341 * allow the DSP to boot before configuring it. 342 */ 343 usleep_range(5000, 10000); 344 send_cfg(rm, dsp_cfg_preboot, ARRAY_SIZE(dsp_cfg_preboot)); 345 usleep_range(5000, 15000); 346 send_cfg(rm, tas5805m->dsp_cfg_data, tas5805m->dsp_cfg_len); 347 348 tas5805m->is_powered = true; 349 tas5805m_refresh(tas5805m); 350 mutex_unlock(&tas5805m->lock); 351} 352 353static int tas5805m_dac_event(struct snd_soc_dapm_widget *w, 354 struct snd_kcontrol *kcontrol, int event) 355{ 356 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 357 struct tas5805m_priv *tas5805m = 358 snd_soc_component_get_drvdata(component); 359 struct regmap *rm = tas5805m->regmap; 360 361 if (event & SND_SOC_DAPM_PRE_PMD) { 362 unsigned int chan, global1, global2; 363 364 dev_dbg(component->dev, "DSP shutdown\n"); 365 cancel_work_sync(&tas5805m->work); 366 367 mutex_lock(&tas5805m->lock); 368 if (tas5805m->is_powered) { 369 tas5805m->is_powered = false; 370 371 regmap_write(rm, REG_PAGE, 0x00); 372 regmap_write(rm, REG_BOOK, 0x00); 373 374 regmap_read(rm, REG_CHAN_FAULT, &chan); 375 regmap_read(rm, REG_GLOBAL_FAULT1, &global1); 376 regmap_read(rm, REG_GLOBAL_FAULT2, &global2); 377 378 dev_dbg(component->dev, "fault regs: CHAN=%02x, " 379 "GLOBAL1=%02x, GLOBAL2=%02x\n", 380 chan, global1, global2); 381 382 regmap_write(rm, REG_DEVICE_CTRL_2, DCTRL2_MODE_HIZ); 383 } 384 mutex_unlock(&tas5805m->lock); 385 } 386 387 return 0; 388} 389 390static const struct snd_soc_dapm_route tas5805m_audio_map[] = { 391 { "DAC", NULL, "DAC IN" }, 392 { "OUT", NULL, "DAC" }, 393}; 394 395static const struct snd_soc_dapm_widget tas5805m_dapm_widgets[] = { 396 SND_SOC_DAPM_AIF_IN("DAC IN", "Playback", 0, SND_SOC_NOPM, 0, 0), 397 SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, 398 tas5805m_dac_event, SND_SOC_DAPM_PRE_PMD), 399 SND_SOC_DAPM_OUTPUT("OUT") 400}; 401 402static const struct snd_soc_component_driver soc_codec_dev_tas5805m = { 403 .controls = tas5805m_snd_controls, 404 .num_controls = ARRAY_SIZE(tas5805m_snd_controls), 405 .dapm_widgets = tas5805m_dapm_widgets, 406 .num_dapm_widgets = ARRAY_SIZE(tas5805m_dapm_widgets), 407 .dapm_routes = tas5805m_audio_map, 408 .num_dapm_routes = ARRAY_SIZE(tas5805m_audio_map), 409 .use_pmdown_time = 1, 410 .endianness = 1, 411}; 412 413static int tas5805m_mute(struct snd_soc_dai *dai, int mute, int direction) 414{ 415 struct snd_soc_component *component = dai->component; 416 struct tas5805m_priv *tas5805m = 417 snd_soc_component_get_drvdata(component); 418 419 mutex_lock(&tas5805m->lock); 420 dev_dbg(component->dev, "set mute=%d (is_powered=%d)\n", 421 mute, tas5805m->is_powered); 422 423 tas5805m->is_muted = mute; 424 if (tas5805m->is_powered) 425 tas5805m_refresh(tas5805m); 426 mutex_unlock(&tas5805m->lock); 427 428 return 0; 429} 430 431static const struct snd_soc_dai_ops tas5805m_dai_ops = { 432 .trigger = tas5805m_trigger, 433 .mute_stream = tas5805m_mute, 434 .no_capture_mute = 1, 435}; 436 437static struct snd_soc_dai_driver tas5805m_dai = { 438 .name = "tas5805m-amplifier", 439 .playback = { 440 .stream_name = "Playback", 441 .channels_min = 2, 442 .channels_max = 2, 443 .rates = SNDRV_PCM_RATE_48000, 444 .formats = SNDRV_PCM_FMTBIT_S32_LE, 445 }, 446 .ops = &tas5805m_dai_ops, 447}; 448 449static const struct regmap_config tas5805m_regmap = { 450 .reg_bits = 8, 451 .val_bits = 8, 452 453 /* We have quite a lot of multi-level bank switching and a 454 * relatively small number of register writes between bank 455 * switches. 456 */ 457 .cache_type = REGCACHE_NONE, 458}; 459 460static int tas5805m_i2c_probe(struct i2c_client *i2c) 461{ 462 struct device *dev = &i2c->dev; 463 struct regmap *regmap; 464 struct tas5805m_priv *tas5805m; 465 char filename[128]; 466 const char *config_name; 467 const struct firmware *fw; 468 int ret; 469 470 regmap = devm_regmap_init_i2c(i2c, &tas5805m_regmap); 471 if (IS_ERR(regmap)) { 472 ret = PTR_ERR(regmap); 473 dev_err(dev, "unable to allocate register map: %d\n", ret); 474 return ret; 475 } 476 477 tas5805m = devm_kzalloc(dev, sizeof(struct tas5805m_priv), GFP_KERNEL); 478 if (!tas5805m) 479 return -ENOMEM; 480 481 tas5805m->i2c = i2c; 482 tas5805m->pvdd = devm_regulator_get(dev, "pvdd"); 483 if (IS_ERR(tas5805m->pvdd)) { 484 dev_err(dev, "failed to get pvdd supply: %ld\n", 485 PTR_ERR(tas5805m->pvdd)); 486 return PTR_ERR(tas5805m->pvdd); 487 } 488 489 dev_set_drvdata(dev, tas5805m); 490 tas5805m->regmap = regmap; 491 tas5805m->gpio_pdn_n = devm_gpiod_get(dev, "pdn", GPIOD_OUT_LOW); 492 if (IS_ERR(tas5805m->gpio_pdn_n)) { 493 dev_err(dev, "error requesting PDN gpio: %ld\n", 494 PTR_ERR(tas5805m->gpio_pdn_n)); 495 return PTR_ERR(tas5805m->gpio_pdn_n); 496 } 497 498 /* This configuration must be generated by PPC3. The file loaded 499 * consists of a sequence of register writes, where bytes at 500 * even indices are register addresses and those at odd indices 501 * are register values. 502 * 503 * The fixed portion of PPC3's output prior to the 5ms delay 504 * should be omitted. 505 */ 506 if (device_property_read_string(dev, "ti,dsp-config-name", 507 &config_name)) 508 config_name = "default"; 509 510 snprintf(filename, sizeof(filename), "tas5805m_dsp_%s.bin", 511 config_name); 512 ret = request_firmware(&fw, filename, dev); 513 if (ret) 514 return ret; 515 516 if ((fw->size < 2) || (fw->size & 1)) { 517 dev_err(dev, "firmware is invalid\n"); 518 release_firmware(fw); 519 return -EINVAL; 520 } 521 522 tas5805m->dsp_cfg_len = fw->size; 523 tas5805m->dsp_cfg_data = devm_kmemdup(dev, fw->data, fw->size, GFP_KERNEL); 524 if (!tas5805m->dsp_cfg_data) { 525 release_firmware(fw); 526 return -ENOMEM; 527 } 528 529 release_firmware(fw); 530 531 /* Do the first part of the power-on here, while we can expect 532 * the I2S interface to be quiet. We must raise PDN# and then 533 * wait 5ms before any I2S clock is sent, or else the internal 534 * regulator apparently won't come on. 535 * 536 * Also, we must keep the device in power down for 100ms or so 537 * after PVDD is applied, or else the ADR pin is sampled 538 * incorrectly and the device comes up with an unpredictable I2C 539 * address. 540 */ 541 tas5805m->vol[0] = TAS5805M_VOLUME_MIN; 542 tas5805m->vol[1] = TAS5805M_VOLUME_MIN; 543 544 ret = regulator_enable(tas5805m->pvdd); 545 if (ret < 0) { 546 dev_err(dev, "failed to enable pvdd: %d\n", ret); 547 return ret; 548 } 549 550 usleep_range(100000, 150000); 551 gpiod_set_value(tas5805m->gpio_pdn_n, 1); 552 usleep_range(10000, 15000); 553 554 INIT_WORK(&tas5805m->work, do_work); 555 mutex_init(&tas5805m->lock); 556 557 /* Don't register through devm. We need to be able to unregister 558 * the component prior to deasserting PDN# 559 */ 560 ret = snd_soc_register_component(dev, &soc_codec_dev_tas5805m, 561 &tas5805m_dai, 1); 562 if (ret < 0) { 563 dev_err(dev, "unable to register codec: %d\n", ret); 564 gpiod_set_value(tas5805m->gpio_pdn_n, 0); 565 regulator_disable(tas5805m->pvdd); 566 return ret; 567 } 568 569 return 0; 570} 571 572static void tas5805m_i2c_remove(struct i2c_client *i2c) 573{ 574 struct device *dev = &i2c->dev; 575 struct tas5805m_priv *tas5805m = dev_get_drvdata(dev); 576 577 cancel_work_sync(&tas5805m->work); 578 snd_soc_unregister_component(dev); 579 gpiod_set_value(tas5805m->gpio_pdn_n, 0); 580 usleep_range(10000, 15000); 581 regulator_disable(tas5805m->pvdd); 582} 583 584static const struct i2c_device_id tas5805m_i2c_id[] = { 585 { "tas5805m", }, 586 { } 587}; 588MODULE_DEVICE_TABLE(i2c, tas5805m_i2c_id); 589 590#if IS_ENABLED(CONFIG_OF) 591static const struct of_device_id tas5805m_of_match[] = { 592 { .compatible = "ti,tas5805m", }, 593 { } 594}; 595MODULE_DEVICE_TABLE(of, tas5805m_of_match); 596#endif 597 598static struct i2c_driver tas5805m_i2c_driver = { 599 .probe = tas5805m_i2c_probe, 600 .remove = tas5805m_i2c_remove, 601 .id_table = tas5805m_i2c_id, 602 .driver = { 603 .name = "tas5805m", 604 .of_match_table = of_match_ptr(tas5805m_of_match), 605 }, 606}; 607 608module_i2c_driver(tas5805m_i2c_driver); 609 610MODULE_AUTHOR("Andy Liu <andy-liu@ti.com>"); 611MODULE_AUTHOR("Daniel Beer <daniel.beer@igorinstitute.com>"); 612MODULE_DESCRIPTION("TAS5805M Audio Amplifier Driver"); 613MODULE_LICENSE("GPL v2"); 614