1/* SPDX-License-Identifier: GPL-2.0
2 *
3 * ALSA SoC TAS2770 codec driver
4 *
5 *  Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
6 */
7#ifndef __TAS2770__
8#define __TAS2770__
9
10/* Book Control Register (available in page0 of each book) */
11#define TAS2770_BOOKCTL_PAGE            0
12#define TAS2770_BOOKCTL_REG         127
13#define TAS2770_REG(page, reg)        ((page * 128) + reg)
14    /* Page */
15#define TAS2770_PAGE  TAS2770_REG(0X0, 0x00)
16#define TAS2770_PAGE_PAGE_MASK  255
17    /* Software Reset */
18#define TAS2770_SW_RST  TAS2770_REG(0X0, 0x01)
19#define TAS2770_RST  BIT(0)
20    /* Power Control */
21#define TAS2770_PWR_CTRL  TAS2770_REG(0X0, 0x02)
22#define TAS2770_PWR_CTRL_MASK  GENMASK(1, 0)
23#define TAS2770_PWR_CTRL_ACTIVE  0x0
24#define TAS2770_PWR_CTRL_MUTE  BIT(0)
25#define TAS2770_PWR_CTRL_SHUTDOWN  0x2
26    /* Playback Configuration Reg0 */
27#define TAS2770_PLAY_CFG_REG0  TAS2770_REG(0X0, 0x03)
28    /* Playback Configuration Reg1 */
29#define TAS2770_PLAY_CFG_REG1  TAS2770_REG(0X0, 0x04)
30    /* Playback Configuration Reg2 */
31#define TAS2770_PLAY_CFG_REG2  TAS2770_REG(0X0, 0x05)
32#define TAS2770_PLAY_CFG_REG2_VMAX 0xc9
33    /* Misc Configuration Reg0 */
34#define TAS2770_MSC_CFG_REG0  TAS2770_REG(0X0, 0x07)
35    /* TDM Configuration Reg0 */
36#define TAS2770_TDM_CFG_REG0  TAS2770_REG(0X0, 0x0A)
37#define TAS2770_TDM_CFG_REG0_SMP_MASK  BIT(5)
38#define TAS2770_TDM_CFG_REG0_SMP_48KHZ  0x0
39#define TAS2770_TDM_CFG_REG0_SMP_44_1KHZ  BIT(5)
40#define TAS2770_TDM_CFG_REG0_31_MASK  GENMASK(3, 1)
41#define TAS2770_TDM_CFG_REG0_31_44_1_48KHZ  0x6
42#define TAS2770_TDM_CFG_REG0_31_88_2_96KHZ  0x8
43#define TAS2770_TDM_CFG_REG0_31_176_4_192KHZ  0xa
44#define TAS2770_TDM_CFG_REG0_FPOL_MASK  BIT(0)
45#define TAS2770_TDM_CFG_REG0_FPOL_RSING  0
46#define TAS2770_TDM_CFG_REG0_FPOL_FALING  1
47    /* TDM Configuration Reg1 */
48#define TAS2770_TDM_CFG_REG1  TAS2770_REG(0X0, 0x0B)
49#define TAS2770_TDM_CFG_REG1_MASK	GENMASK(5, 1)
50#define TAS2770_TDM_CFG_REG1_51_SHIFT  1
51#define TAS2770_TDM_CFG_REG1_RX_MASK  BIT(0)
52#define TAS2770_TDM_CFG_REG1_RX_RSING  0x0
53#define TAS2770_TDM_CFG_REG1_RX_FALING  BIT(0)
54    /* TDM Configuration Reg2 */
55#define TAS2770_TDM_CFG_REG2  TAS2770_REG(0X0, 0x0C)
56#define TAS2770_TDM_CFG_REG2_RXW_MASK	GENMASK(3, 2)
57#define TAS2770_TDM_CFG_REG2_RXW_16BITS  0x0
58#define TAS2770_TDM_CFG_REG2_RXW_24BITS  0x8
59#define TAS2770_TDM_CFG_REG2_RXW_32BITS  0xc
60#define TAS2770_TDM_CFG_REG2_RXS_MASK    GENMASK(1, 0)
61#define TAS2770_TDM_CFG_REG2_RXS_16BITS  0x0
62#define TAS2770_TDM_CFG_REG2_RXS_24BITS  BIT(0)
63#define TAS2770_TDM_CFG_REG2_RXS_32BITS  0x2
64    /* TDM Configuration Reg3 */
65#define TAS2770_TDM_CFG_REG3  TAS2770_REG(0X0, 0x0D)
66#define TAS2770_TDM_CFG_REG3_RXS_MASK  GENMASK(7, 4)
67#define TAS2770_TDM_CFG_REG3_RXS_SHIFT 0x4
68#define TAS2770_TDM_CFG_REG3_30_MASK  GENMASK(3, 0)
69#define TAS2770_TDM_CFG_REG3_30_SHIFT 0
70    /* TDM Configuration Reg5 */
71#define TAS2770_TDM_CFG_REG5  TAS2770_REG(0X0, 0x0F)
72#define TAS2770_TDM_CFG_REG5_VSNS_MASK  BIT(6)
73#define TAS2770_TDM_CFG_REG5_VSNS_ENABLE  BIT(6)
74#define TAS2770_TDM_CFG_REG5_50_MASK	GENMASK(5, 0)
75    /* TDM Configuration Reg6 */
76#define TAS2770_TDM_CFG_REG6  TAS2770_REG(0X0, 0x10)
77#define TAS2770_TDM_CFG_REG6_ISNS_MASK  BIT(6)
78#define TAS2770_TDM_CFG_REG6_ISNS_ENABLE  BIT(6)
79#define TAS2770_TDM_CFG_REG6_50_MASK  GENMASK(5, 0)
80    /* Brown Out Prevention Reg0 */
81#define TAS2770_BO_PRV_REG0  TAS2770_REG(0X0, 0x1B)
82    /* Interrupt MASK Reg0 */
83#define TAS2770_INT_MASK_REG0  TAS2770_REG(0X0, 0x20)
84#define TAS2770_INT_REG0_DEFAULT  0xfc
85#define TAS2770_INT_MASK_REG0_DISABLE 0xff
86    /* Interrupt MASK Reg1 */
87#define TAS2770_INT_MASK_REG1  TAS2770_REG(0X0, 0x21)
88#define TAS2770_INT_REG1_DEFAULT  0xb1
89#define TAS2770_INT_MASK_REG1_DISABLE 0xff
90    /* Live-Interrupt Reg0 */
91#define TAS2770_LVE_INT_REG0  TAS2770_REG(0X0, 0x22)
92    /* Live-Interrupt Reg1 */
93#define TAS2770_LVE_INT_REG1  TAS2770_REG(0X0, 0x23)
94    /* Latched-Interrupt Reg0 */
95#define TAS2770_LAT_INT_REG0  TAS2770_REG(0X0, 0x24)
96#define TAS2770_LAT_INT_REG0_OCE_FLG  BIT(1)
97#define TAS2770_LAT_INT_REG0_OTE_FLG  BIT(0)
98    /* Latched-Interrupt Reg1 */
99#define TAS2770_LAT_INT_REG1  TAS2770_REG(0X0, 0x25)
100#define TAS2770_LAT_INT_REG1_VBA_TOV  BIT(3)
101#define TAS2770_LAT_INT_REG1_VBA_TUV  BIT(2)
102#define TAS2770_LAT_INT_REG1_BOUT_FLG  BIT(1)
103    /* VBAT MSB */
104#define TAS2770_VBAT_MSB  TAS2770_REG(0X0, 0x27)
105    /* VBAT LSB */
106#define TAS2770_VBAT_LSB  TAS2770_REG(0X0, 0x28)
107    /* TEMP MSB */
108#define TAS2770_TEMP_MSB  TAS2770_REG(0X0, 0x29)
109    /* TEMP LSB */
110#define TAS2770_TEMP_LSB  TAS2770_REG(0X0, 0x2A)
111    /* Interrupt Configuration */
112#define TAS2770_INT_CFG  TAS2770_REG(0X0, 0x30)
113    /* Misc IRQ */
114#define TAS2770_MISC_IRQ  TAS2770_REG(0X0, 0x32)
115    /* Clock Configuration */
116#define TAS2770_CLK_CGF  TAS2770_REG(0X0, 0x3C)
117    /* TDM Clock detection monitor */
118#define TAS2770_TDM_CLK_DETC  TAS2770_REG(0X0, 0x77)
119    /* Revision and PG ID */
120#define TAS2770_REV_AND_GPID  TAS2770_REG(0X0, 0x7D)
121
122#define TAS2770_POWER_ACTIVE	0
123#define TAS2770_POWER_MUTE	BIT(0)
124#define TAS2770_POWER_SHUTDOWN	BIT(1)
125
126#define ERROR_OVER_CURRENT  BIT(0)
127#define ERROR_DIE_OVERTEMP  BIT(1)
128#define ERROR_OVER_VOLTAGE  BIT(2)
129#define ERROR_UNDER_VOLTAGE BIT(3)
130#define ERROR_BROWNOUT      BIT(4)
131#define ERROR_CLASSD_PWR    BIT(5)
132
133struct tas2770_priv {
134	struct snd_soc_component *component;
135	struct gpio_desc *reset_gpio;
136	struct gpio_desc *sdz_gpio;
137	struct regmap *regmap;
138	struct device *dev;
139	int v_sense_slot;
140	int i_sense_slot;
141	bool dac_powered;
142	bool unmuted;
143};
144
145#endif /* __TAS2770__ */
146