1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Universal Interface for Intel High Definition Audio Codec 4 * 5 * HD audio interface patch for SigmaTel STAC92xx 6 * 7 * Copyright (c) 2005 Embedded Alley Solutions, Inc. 8 * Matt Porter <mporter@embeddedalley.com> 9 * 10 * Based on patch_cmedia.c and patch_realtek.c 11 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 12 */ 13 14#include <linux/init.h> 15#include <linux/delay.h> 16#include <linux/slab.h> 17#include <linux/pci.h> 18#include <linux/dmi.h> 19#include <linux/module.h> 20#include <sound/core.h> 21#include <sound/jack.h> 22#include <sound/hda_codec.h> 23#include "hda_local.h" 24#include "hda_auto_parser.h" 25#include "hda_beep.h" 26#include "hda_jack.h" 27#include "hda_generic.h" 28 29enum { 30 STAC_REF, 31 STAC_9200_OQO, 32 STAC_9200_DELL_D21, 33 STAC_9200_DELL_D22, 34 STAC_9200_DELL_D23, 35 STAC_9200_DELL_M21, 36 STAC_9200_DELL_M22, 37 STAC_9200_DELL_M23, 38 STAC_9200_DELL_M24, 39 STAC_9200_DELL_M25, 40 STAC_9200_DELL_M26, 41 STAC_9200_DELL_M27, 42 STAC_9200_M4, 43 STAC_9200_M4_2, 44 STAC_9200_PANASONIC, 45 STAC_9200_EAPD_INIT, 46 STAC_9200_MODELS 47}; 48 49enum { 50 STAC_9205_REF, 51 STAC_9205_DELL_M42, 52 STAC_9205_DELL_M43, 53 STAC_9205_DELL_M44, 54 STAC_9205_EAPD, 55 STAC_9205_MODELS 56}; 57 58enum { 59 STAC_92HD73XX_NO_JD, /* no jack-detection */ 60 STAC_92HD73XX_REF, 61 STAC_92HD73XX_INTEL, 62 STAC_DELL_M6_AMIC, 63 STAC_DELL_M6_DMIC, 64 STAC_DELL_M6_BOTH, 65 STAC_DELL_EQ, 66 STAC_ALIENWARE_M17X, 67 STAC_ELO_VUPOINT_15MX, 68 STAC_92HD89XX_HP_FRONT_JACK, 69 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK, 70 STAC_92HD73XX_ASUS_MOBO, 71 STAC_92HD73XX_MODELS 72}; 73 74enum { 75 STAC_92HD83XXX_REF, 76 STAC_92HD83XXX_PWR_REF, 77 STAC_DELL_S14, 78 STAC_DELL_VOSTRO_3500, 79 STAC_92HD83XXX_HP_cNB11_INTQUAD, 80 STAC_HP_DV7_4000, 81 STAC_HP_ZEPHYR, 82 STAC_92HD83XXX_HP_LED, 83 STAC_92HD83XXX_HP_INV_LED, 84 STAC_92HD83XXX_HP_MIC_LED, 85 STAC_HP_LED_GPIO10, 86 STAC_92HD83XXX_HEADSET_JACK, 87 STAC_92HD83XXX_HP, 88 STAC_HP_ENVY_BASS, 89 STAC_HP_BNB13_EQ, 90 STAC_HP_ENVY_TS_BASS, 91 STAC_HP_ENVY_TS_DAC_BIND, 92 STAC_92HD83XXX_GPIO10_EAPD, 93 STAC_92HD83XXX_MODELS 94}; 95 96enum { 97 STAC_92HD71BXX_REF, 98 STAC_DELL_M4_1, 99 STAC_DELL_M4_2, 100 STAC_DELL_M4_3, 101 STAC_HP_M4, 102 STAC_HP_DV4, 103 STAC_HP_DV5, 104 STAC_HP_HDX, 105 STAC_92HD71BXX_HP, 106 STAC_92HD71BXX_NO_DMIC, 107 STAC_92HD71BXX_NO_SMUX, 108 STAC_92HD71BXX_MODELS 109}; 110 111enum { 112 STAC_92HD95_HP_LED, 113 STAC_92HD95_HP_BASS, 114 STAC_92HD95_MODELS 115}; 116 117enum { 118 STAC_925x_REF, 119 STAC_M1, 120 STAC_M1_2, 121 STAC_M2, 122 STAC_M2_2, 123 STAC_M3, 124 STAC_M5, 125 STAC_M6, 126 STAC_925x_MODELS 127}; 128 129enum { 130 STAC_D945_REF, 131 STAC_D945GTP3, 132 STAC_D945GTP5, 133 STAC_INTEL_MAC_V1, 134 STAC_INTEL_MAC_V2, 135 STAC_INTEL_MAC_V3, 136 STAC_INTEL_MAC_V4, 137 STAC_INTEL_MAC_V5, 138 STAC_INTEL_MAC_AUTO, 139 STAC_ECS_202, 140 STAC_922X_DELL_D81, 141 STAC_922X_DELL_D82, 142 STAC_922X_DELL_M81, 143 STAC_922X_DELL_M82, 144 STAC_922X_INTEL_MAC_GPIO, 145 STAC_922X_MODELS 146}; 147 148enum { 149 STAC_D965_REF_NO_JD, /* no jack-detection */ 150 STAC_D965_REF, 151 STAC_D965_3ST, 152 STAC_D965_5ST, 153 STAC_D965_5ST_NO_FP, 154 STAC_D965_VERBS, 155 STAC_DELL_3ST, 156 STAC_DELL_BIOS, 157 STAC_NEMO_DEFAULT, 158 STAC_DELL_BIOS_AMIC, 159 STAC_DELL_BIOS_SPDIF, 160 STAC_927X_DELL_DMIC, 161 STAC_927X_VOLKNOB, 162 STAC_927X_MODELS 163}; 164 165enum { 166 STAC_9872_VAIO, 167 STAC_9872_MODELS 168}; 169 170struct sigmatel_spec { 171 struct hda_gen_spec gen; 172 173 unsigned int eapd_switch: 1; 174 unsigned int linear_tone_beep:1; 175 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */ 176 unsigned int volknob_init:1; /* special volume-knob initialization */ 177 unsigned int powerdown_adcs:1; 178 unsigned int have_spdif_mux:1; 179 180 /* gpio lines */ 181 unsigned int eapd_mask; 182 unsigned int gpio_mask; 183 unsigned int gpio_dir; 184 unsigned int gpio_data; 185 unsigned int gpio_mute; 186 unsigned int gpio_led; 187 unsigned int gpio_led_polarity; 188 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */ 189 unsigned int vref_led; 190 int default_polarity; 191 192 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */ 193 unsigned int mic_enabled; /* current mic mute state (bitmask) */ 194 195 /* stream */ 196 unsigned int stream_delay; 197 198 /* analog loopback */ 199 const struct snd_kcontrol_new *aloopback_ctl; 200 unsigned int aloopback; 201 unsigned char aloopback_mask; 202 unsigned char aloopback_shift; 203 204 /* power management */ 205 unsigned int power_map_bits; 206 unsigned int num_pwrs; 207 const hda_nid_t *pwr_nids; 208 unsigned int active_adcs; 209 210 /* beep widgets */ 211 hda_nid_t anabeep_nid; 212 bool beep_power_on; 213 214 /* SPDIF-out mux */ 215 const char * const *spdif_labels; 216 struct hda_input_mux spdif_mux; 217 unsigned int cur_smux[2]; 218}; 219 220#define AC_VERB_IDT_SET_POWER_MAP 0x7ec 221#define AC_VERB_IDT_GET_POWER_MAP 0xfec 222 223static const hda_nid_t stac92hd73xx_pwr_nids[8] = { 224 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 225 0x0f, 0x10, 0x11 226}; 227 228static const hda_nid_t stac92hd83xxx_pwr_nids[7] = { 229 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 230 0x0f, 0x10 231}; 232 233static const hda_nid_t stac92hd71bxx_pwr_nids[3] = { 234 0x0a, 0x0d, 0x0f 235}; 236 237 238/* 239 * PCM hooks 240 */ 241static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo, 242 struct hda_codec *codec, 243 struct snd_pcm_substream *substream, 244 int action) 245{ 246 struct sigmatel_spec *spec = codec->spec; 247 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay) 248 msleep(spec->stream_delay); 249} 250 251static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo, 252 struct hda_codec *codec, 253 struct snd_pcm_substream *substream, 254 int action) 255{ 256 struct sigmatel_spec *spec = codec->spec; 257 int i, idx = 0; 258 259 if (!spec->powerdown_adcs) 260 return; 261 262 for (i = 0; i < spec->gen.num_all_adcs; i++) { 263 if (spec->gen.all_adcs[i] == hinfo->nid) { 264 idx = i; 265 break; 266 } 267 } 268 269 switch (action) { 270 case HDA_GEN_PCM_ACT_OPEN: 271 msleep(40); 272 snd_hda_codec_write(codec, hinfo->nid, 0, 273 AC_VERB_SET_POWER_STATE, AC_PWRST_D0); 274 spec->active_adcs |= (1 << idx); 275 break; 276 case HDA_GEN_PCM_ACT_CLOSE: 277 snd_hda_codec_write(codec, hinfo->nid, 0, 278 AC_VERB_SET_POWER_STATE, AC_PWRST_D3); 279 spec->active_adcs &= ~(1 << idx); 280 break; 281 } 282} 283 284/* 285 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a 286 * funky external mute control using GPIO pins. 287 */ 288 289static void stac_gpio_set(struct hda_codec *codec, unsigned int mask, 290 unsigned int dir_mask, unsigned int data) 291{ 292 unsigned int gpiostate, gpiomask, gpiodir; 293 hda_nid_t fg = codec->core.afg; 294 295 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data); 296 297 gpiostate = snd_hda_codec_read(codec, fg, 0, 298 AC_VERB_GET_GPIO_DATA, 0); 299 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask); 300 301 gpiomask = snd_hda_codec_read(codec, fg, 0, 302 AC_VERB_GET_GPIO_MASK, 0); 303 gpiomask |= mask; 304 305 gpiodir = snd_hda_codec_read(codec, fg, 0, 306 AC_VERB_GET_GPIO_DIRECTION, 0); 307 gpiodir |= dir_mask; 308 309 /* Configure GPIOx as CMOS */ 310 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0); 311 312 snd_hda_codec_write(codec, fg, 0, 313 AC_VERB_SET_GPIO_MASK, gpiomask); 314 snd_hda_codec_read(codec, fg, 0, 315 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */ 316 317 msleep(1); 318 319 snd_hda_codec_read(codec, fg, 0, 320 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ 321} 322 323/* hook for controlling mic-mute LED GPIO */ 324static int stac_capture_led_update(struct led_classdev *led_cdev, 325 enum led_brightness brightness) 326{ 327 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent); 328 struct sigmatel_spec *spec = codec->spec; 329 330 if (brightness) 331 spec->gpio_data |= spec->mic_mute_led_gpio; 332 else 333 spec->gpio_data &= ~spec->mic_mute_led_gpio; 334 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 335 return 0; 336} 337 338static int stac_vrefout_set(struct hda_codec *codec, 339 hda_nid_t nid, unsigned int new_vref) 340{ 341 int error, pinctl; 342 343 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref); 344 pinctl = snd_hda_codec_read(codec, nid, 0, 345 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 346 347 if (pinctl < 0) 348 return pinctl; 349 350 pinctl &= 0xff; 351 pinctl &= ~AC_PINCTL_VREFEN; 352 pinctl |= (new_vref & AC_PINCTL_VREFEN); 353 354 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl); 355 if (error < 0) 356 return error; 357 358 return 1; 359} 360 361/* prevent codec AFG to D3 state when vref-out pin is used for mute LED */ 362/* this hook is set in stac_setup_gpio() */ 363static unsigned int stac_vref_led_power_filter(struct hda_codec *codec, 364 hda_nid_t nid, 365 unsigned int power_state) 366{ 367 if (nid == codec->core.afg && power_state == AC_PWRST_D3) 368 return AC_PWRST_D1; 369 return snd_hda_gen_path_power_filter(codec, nid, power_state); 370} 371 372/* update mute-LED accoring to the master switch */ 373static void stac_update_led_status(struct hda_codec *codec, bool muted) 374{ 375 struct sigmatel_spec *spec = codec->spec; 376 377 if (!spec->gpio_led) 378 return; 379 380 /* LED state is inverted on these systems */ 381 if (spec->gpio_led_polarity) 382 muted = !muted; 383 384 if (!spec->vref_mute_led_nid) { 385 if (muted) 386 spec->gpio_data |= spec->gpio_led; 387 else 388 spec->gpio_data &= ~spec->gpio_led; 389 stac_gpio_set(codec, spec->gpio_mask, 390 spec->gpio_dir, spec->gpio_data); 391 } else { 392 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD; 393 stac_vrefout_set(codec, spec->vref_mute_led_nid, 394 spec->vref_led); 395 } 396} 397 398/* vmaster hook to update mute LED */ 399static int stac_vmaster_hook(struct led_classdev *led_cdev, 400 enum led_brightness brightness) 401{ 402 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent); 403 404 stac_update_led_status(codec, brightness); 405 return 0; 406} 407 408/* automute hook to handle GPIO mute and EAPD updates */ 409static void stac_update_outputs(struct hda_codec *codec) 410{ 411 struct sigmatel_spec *spec = codec->spec; 412 413 if (spec->gpio_mute) 414 spec->gen.master_mute = 415 !(snd_hda_codec_read(codec, codec->core.afg, 0, 416 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute); 417 418 snd_hda_gen_update_outputs(codec); 419 420 if (spec->eapd_mask && spec->eapd_switch) { 421 unsigned int val = spec->gpio_data; 422 if (spec->gen.speaker_muted) 423 val &= ~spec->eapd_mask; 424 else 425 val |= spec->eapd_mask; 426 if (spec->gpio_data != val) { 427 spec->gpio_data = val; 428 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, 429 val); 430 } 431 } 432} 433 434static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, 435 bool enable, bool do_write) 436{ 437 struct sigmatel_spec *spec = codec->spec; 438 unsigned int idx, val; 439 440 for (idx = 0; idx < spec->num_pwrs; idx++) { 441 if (spec->pwr_nids[idx] == nid) 442 break; 443 } 444 if (idx >= spec->num_pwrs) 445 return; 446 447 idx = 1 << idx; 448 449 val = spec->power_map_bits; 450 if (enable) 451 val &= ~idx; 452 else 453 val |= idx; 454 455 /* power down unused output ports */ 456 if (val != spec->power_map_bits) { 457 spec->power_map_bits = val; 458 if (do_write) 459 snd_hda_codec_write(codec, codec->core.afg, 0, 460 AC_VERB_IDT_SET_POWER_MAP, val); 461 } 462} 463 464/* update power bit per jack plug/unplug */ 465static void jack_update_power(struct hda_codec *codec, 466 struct hda_jack_callback *jack) 467{ 468 struct sigmatel_spec *spec = codec->spec; 469 int i; 470 471 if (!spec->num_pwrs) 472 return; 473 474 if (jack && jack->nid) { 475 stac_toggle_power_map(codec, jack->nid, 476 snd_hda_jack_detect(codec, jack->nid), 477 true); 478 return; 479 } 480 481 /* update all jacks */ 482 for (i = 0; i < spec->num_pwrs; i++) { 483 hda_nid_t nid = spec->pwr_nids[i]; 484 if (!snd_hda_jack_tbl_get(codec, nid)) 485 continue; 486 stac_toggle_power_map(codec, nid, 487 snd_hda_jack_detect(codec, nid), 488 false); 489 } 490 491 snd_hda_codec_write(codec, codec->core.afg, 0, 492 AC_VERB_IDT_SET_POWER_MAP, 493 spec->power_map_bits); 494} 495 496static void stac_vref_event(struct hda_codec *codec, 497 struct hda_jack_callback *event) 498{ 499 unsigned int data; 500 501 data = snd_hda_codec_read(codec, codec->core.afg, 0, 502 AC_VERB_GET_GPIO_DATA, 0); 503 /* toggle VREF state based on GPIOx status */ 504 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0, 505 !!(data & (1 << event->private_data))); 506} 507 508/* initialize the power map and enable the power event to jacks that 509 * haven't been assigned to automute 510 */ 511static void stac_init_power_map(struct hda_codec *codec) 512{ 513 struct sigmatel_spec *spec = codec->spec; 514 int i; 515 516 for (i = 0; i < spec->num_pwrs; i++) { 517 hda_nid_t nid = spec->pwr_nids[i]; 518 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid); 519 def_conf = get_defcfg_connect(def_conf); 520 if (def_conf == AC_JACK_PORT_COMPLEX && 521 spec->vref_mute_led_nid != nid && 522 is_jack_detectable(codec, nid)) { 523 snd_hda_jack_detect_enable_callback(codec, nid, 524 jack_update_power); 525 } else { 526 if (def_conf == AC_JACK_PORT_NONE) 527 stac_toggle_power_map(codec, nid, false, false); 528 else 529 stac_toggle_power_map(codec, nid, true, false); 530 } 531 } 532} 533 534/* 535 */ 536 537static inline bool get_int_hint(struct hda_codec *codec, const char *key, 538 int *valp) 539{ 540 return !snd_hda_get_int_hint(codec, key, valp); 541} 542 543/* override some hints from the hwdep entry */ 544static void stac_store_hints(struct hda_codec *codec) 545{ 546 struct sigmatel_spec *spec = codec->spec; 547 int val; 548 549 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) { 550 spec->eapd_mask = spec->gpio_dir = spec->gpio_data = 551 spec->gpio_mask; 552 } 553 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir)) 554 spec->gpio_dir &= spec->gpio_mask; 555 if (get_int_hint(codec, "gpio_data", &spec->gpio_data)) 556 spec->gpio_data &= spec->gpio_mask; 557 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask)) 558 spec->eapd_mask &= spec->gpio_mask; 559 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute)) 560 spec->gpio_mute &= spec->gpio_mask; 561 val = snd_hda_get_bool_hint(codec, "eapd_switch"); 562 if (val >= 0) 563 spec->eapd_switch = val; 564} 565 566/* 567 * loopback controls 568 */ 569 570#define stac_aloopback_info snd_ctl_boolean_mono_info 571 572static int stac_aloopback_get(struct snd_kcontrol *kcontrol, 573 struct snd_ctl_elem_value *ucontrol) 574{ 575 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 576 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 577 struct sigmatel_spec *spec = codec->spec; 578 579 ucontrol->value.integer.value[0] = !!(spec->aloopback & 580 (spec->aloopback_mask << idx)); 581 return 0; 582} 583 584static int stac_aloopback_put(struct snd_kcontrol *kcontrol, 585 struct snd_ctl_elem_value *ucontrol) 586{ 587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 588 struct sigmatel_spec *spec = codec->spec; 589 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 590 unsigned int dac_mode; 591 unsigned int val, idx_val; 592 593 idx_val = spec->aloopback_mask << idx; 594 if (ucontrol->value.integer.value[0]) 595 val = spec->aloopback | idx_val; 596 else 597 val = spec->aloopback & ~idx_val; 598 if (spec->aloopback == val) 599 return 0; 600 601 spec->aloopback = val; 602 603 /* Only return the bits defined by the shift value of the 604 * first two bytes of the mask 605 */ 606 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0, 607 kcontrol->private_value & 0xFFFF, 0x0); 608 dac_mode >>= spec->aloopback_shift; 609 610 if (spec->aloopback & idx_val) { 611 snd_hda_power_up(codec); 612 dac_mode |= idx_val; 613 } else { 614 snd_hda_power_down(codec); 615 dac_mode &= ~idx_val; 616 } 617 618 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 619 kcontrol->private_value >> 16, dac_mode); 620 621 return 1; 622} 623 624#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ 625 { \ 626 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 627 .name = "Analog Loopback", \ 628 .count = cnt, \ 629 .info = stac_aloopback_info, \ 630 .get = stac_aloopback_get, \ 631 .put = stac_aloopback_put, \ 632 .private_value = verb_read | (verb_write << 16), \ 633 } 634 635/* 636 * Mute LED handling on HP laptops 637 */ 638 639/* check whether it's a HP laptop with a docking port */ 640static bool hp_bnb2011_with_dock(struct hda_codec *codec) 641{ 642 if (codec->core.vendor_id != 0x111d7605 && 643 codec->core.vendor_id != 0x111d76d1) 644 return false; 645 646 switch (codec->core.subsystem_id) { 647 case 0x103c1618: 648 case 0x103c1619: 649 case 0x103c161a: 650 case 0x103c161b: 651 case 0x103c161c: 652 case 0x103c161d: 653 case 0x103c161e: 654 case 0x103c161f: 655 656 case 0x103c162a: 657 case 0x103c162b: 658 659 case 0x103c1630: 660 case 0x103c1631: 661 662 case 0x103c1633: 663 case 0x103c1634: 664 case 0x103c1635: 665 666 case 0x103c3587: 667 case 0x103c3588: 668 case 0x103c3589: 669 case 0x103c358a: 670 671 case 0x103c3667: 672 case 0x103c3668: 673 case 0x103c3669: 674 675 return true; 676 } 677 return false; 678} 679 680static bool hp_blike_system(u32 subsystem_id) 681{ 682 switch (subsystem_id) { 683 case 0x103c1473: /* HP ProBook 6550b */ 684 case 0x103c1520: 685 case 0x103c1521: 686 case 0x103c1523: 687 case 0x103c1524: 688 case 0x103c1525: 689 case 0x103c1722: 690 case 0x103c1723: 691 case 0x103c1724: 692 case 0x103c1725: 693 case 0x103c1726: 694 case 0x103c1727: 695 case 0x103c1728: 696 case 0x103c1729: 697 case 0x103c172a: 698 case 0x103c172b: 699 case 0x103c307e: 700 case 0x103c307f: 701 case 0x103c3080: 702 case 0x103c3081: 703 case 0x103c7007: 704 case 0x103c7008: 705 return true; 706 } 707 return false; 708} 709 710static void set_hp_led_gpio(struct hda_codec *codec) 711{ 712 struct sigmatel_spec *spec = codec->spec; 713 unsigned int gpio; 714 715 if (spec->gpio_led) 716 return; 717 718 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP); 719 gpio &= AC_GPIO_IO_COUNT; 720 if (gpio > 3) 721 spec->gpio_led = 0x08; /* GPIO 3 */ 722 else 723 spec->gpio_led = 0x01; /* GPIO 0 */ 724} 725 726/* 727 * This method searches for the mute LED GPIO configuration 728 * provided as OEM string in SMBIOS. The format of that string 729 * is HP_Mute_LED_P_G or HP_Mute_LED_P 730 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high) 731 * that corresponds to the NOT muted state of the master volume 732 * and G is the index of the GPIO to use as the mute LED control (0..9) 733 * If _G portion is missing it is assigned based on the codec ID 734 * 735 * So, HP B-series like systems may have HP_Mute_LED_0 (current models) 736 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings 737 * 738 * 739 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in 740 * SMBIOS - at least the ones I have seen do not have them - which include 741 * my own system (HP Pavilion dv6-1110ax) and my cousin's 742 * HP Pavilion dv9500t CTO. 743 * Need more information on whether it is true across the entire series. 744 * -- kunal 745 */ 746static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity) 747{ 748 struct sigmatel_spec *spec = codec->spec; 749 const struct dmi_device *dev = NULL; 750 751 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) { 752 get_int_hint(codec, "gpio_led_polarity", 753 &spec->gpio_led_polarity); 754 return 1; 755 } 756 757 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) { 758 if (sscanf(dev->name, "HP_Mute_LED_%u_%x", 759 &spec->gpio_led_polarity, 760 &spec->gpio_led) == 2) { 761 unsigned int max_gpio; 762 max_gpio = snd_hda_param_read(codec, codec->core.afg, 763 AC_PAR_GPIO_CAP); 764 max_gpio &= AC_GPIO_IO_COUNT; 765 if (spec->gpio_led < max_gpio) 766 spec->gpio_led = 1 << spec->gpio_led; 767 else 768 spec->vref_mute_led_nid = spec->gpio_led; 769 return 1; 770 } 771 if (sscanf(dev->name, "HP_Mute_LED_%u", 772 &spec->gpio_led_polarity) == 1) { 773 set_hp_led_gpio(codec); 774 return 1; 775 } 776 /* BIOS bug: unfilled OEM string */ 777 if (strstr(dev->name, "HP_Mute_LED_P_G")) { 778 set_hp_led_gpio(codec); 779 if (default_polarity >= 0) 780 spec->gpio_led_polarity = default_polarity; 781 else 782 spec->gpio_led_polarity = 1; 783 return 1; 784 } 785 } 786 787 /* 788 * Fallback case - if we don't find the DMI strings, 789 * we statically set the GPIO - if not a B-series system 790 * and default polarity is provided 791 */ 792 if (!hp_blike_system(codec->core.subsystem_id) && 793 (default_polarity == 0 || default_polarity == 1)) { 794 set_hp_led_gpio(codec); 795 spec->gpio_led_polarity = default_polarity; 796 return 1; 797 } 798 return 0; 799} 800 801/* check whether a built-in speaker is included in parsed pins */ 802static bool has_builtin_speaker(struct hda_codec *codec) 803{ 804 struct sigmatel_spec *spec = codec->spec; 805 const hda_nid_t *nid_pin; 806 int nids, i; 807 808 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) { 809 nid_pin = spec->gen.autocfg.line_out_pins; 810 nids = spec->gen.autocfg.line_outs; 811 } else { 812 nid_pin = spec->gen.autocfg.speaker_pins; 813 nids = spec->gen.autocfg.speaker_outs; 814 } 815 816 for (i = 0; i < nids; i++) { 817 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]); 818 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT) 819 return true; 820 } 821 return false; 822} 823 824/* 825 * PC beep controls 826 */ 827 828/* create PC beep volume controls */ 829static int stac_auto_create_beep_ctls(struct hda_codec *codec, 830 hda_nid_t nid) 831{ 832 struct sigmatel_spec *spec = codec->spec; 833 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 834 struct snd_kcontrol_new *knew; 835 static const struct snd_kcontrol_new abeep_mute_ctl = 836 HDA_CODEC_MUTE(NULL, 0, 0, 0); 837 static const struct snd_kcontrol_new dbeep_mute_ctl = 838 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0); 839 static const struct snd_kcontrol_new beep_vol_ctl = 840 HDA_CODEC_VOLUME(NULL, 0, 0, 0); 841 842 /* check for mute support for the amp */ 843 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) { 844 const struct snd_kcontrol_new *temp; 845 if (spec->anabeep_nid == nid) 846 temp = &abeep_mute_ctl; 847 else 848 temp = &dbeep_mute_ctl; 849 knew = snd_hda_gen_add_kctl(&spec->gen, 850 "Beep Playback Switch", temp); 851 if (!knew) 852 return -ENOMEM; 853 knew->private_value = 854 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 855 } 856 857 /* check to see if there is volume support for the amp */ 858 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) { 859 knew = snd_hda_gen_add_kctl(&spec->gen, 860 "Beep Playback Volume", 861 &beep_vol_ctl); 862 if (!knew) 863 return -ENOMEM; 864 knew->private_value = 865 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 866 } 867 return 0; 868} 869 870#ifdef CONFIG_SND_HDA_INPUT_BEEP 871#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info 872 873static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol, 874 struct snd_ctl_elem_value *ucontrol) 875{ 876 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 877 ucontrol->value.integer.value[0] = codec->beep->enabled; 878 return 0; 879} 880 881static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol, 882 struct snd_ctl_elem_value *ucontrol) 883{ 884 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 885 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); 886} 887 888static const struct snd_kcontrol_new stac_dig_beep_ctrl = { 889 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 890 .name = "Beep Playback Switch", 891 .info = stac_dig_beep_switch_info, 892 .get = stac_dig_beep_switch_get, 893 .put = stac_dig_beep_switch_put, 894}; 895 896static int stac_beep_switch_ctl(struct hda_codec *codec) 897{ 898 struct sigmatel_spec *spec = codec->spec; 899 900 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl)) 901 return -ENOMEM; 902 return 0; 903} 904#endif 905 906/* 907 * SPDIF-out mux controls 908 */ 909 910static int stac_smux_enum_info(struct snd_kcontrol *kcontrol, 911 struct snd_ctl_elem_info *uinfo) 912{ 913 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 914 struct sigmatel_spec *spec = codec->spec; 915 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo); 916} 917 918static int stac_smux_enum_get(struct snd_kcontrol *kcontrol, 919 struct snd_ctl_elem_value *ucontrol) 920{ 921 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 922 struct sigmatel_spec *spec = codec->spec; 923 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 924 925 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx]; 926 return 0; 927} 928 929static int stac_smux_enum_put(struct snd_kcontrol *kcontrol, 930 struct snd_ctl_elem_value *ucontrol) 931{ 932 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 933 struct sigmatel_spec *spec = codec->spec; 934 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 935 936 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol, 937 spec->gen.autocfg.dig_out_pins[smux_idx], 938 &spec->cur_smux[smux_idx]); 939} 940 941static const struct snd_kcontrol_new stac_smux_mixer = { 942 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 943 .name = "IEC958 Playback Source", 944 /* count set later */ 945 .info = stac_smux_enum_info, 946 .get = stac_smux_enum_get, 947 .put = stac_smux_enum_put, 948}; 949 950static const char * const stac_spdif_labels[] = { 951 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL 952}; 953 954static int stac_create_spdif_mux_ctls(struct hda_codec *codec) 955{ 956 struct sigmatel_spec *spec = codec->spec; 957 struct auto_pin_cfg *cfg = &spec->gen.autocfg; 958 const char * const *labels = spec->spdif_labels; 959 struct snd_kcontrol_new *kctl; 960 int i, num_cons; 961 962 if (cfg->dig_outs < 1) 963 return 0; 964 965 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]); 966 if (num_cons <= 1) 967 return 0; 968 969 if (!labels) 970 labels = stac_spdif_labels; 971 for (i = 0; i < num_cons; i++) { 972 if (snd_BUG_ON(!labels[i])) 973 return -EINVAL; 974 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL); 975 } 976 977 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer); 978 if (!kctl) 979 return -ENOMEM; 980 kctl->count = cfg->dig_outs; 981 982 return 0; 983} 984 985static const struct hda_verb stac9200_eapd_init[] = { 986 /* set dac0mux for dac converter */ 987 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 988 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 989 {} 990}; 991 992static const struct hda_verb dell_eq_core_init[] = { 993 /* set master volume to max value without distortion 994 * and direct control */ 995 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, 996 {} 997}; 998 999static const struct hda_verb stac92hd73xx_core_init[] = { 1000 /* set master volume and direct control */ 1001 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1002 {} 1003}; 1004 1005static const struct hda_verb stac92hd83xxx_core_init[] = { 1006 /* power state controls amps */ 1007 { 0x01, AC_VERB_SET_EAPD, 1 << 2}, 1008 {} 1009}; 1010 1011static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = { 1012 { 0x22, 0x785, 0x43 }, 1013 { 0x22, 0x782, 0xe0 }, 1014 { 0x22, 0x795, 0x00 }, 1015 {} 1016}; 1017 1018static const struct hda_verb stac92hd71bxx_core_init[] = { 1019 /* set master volume and direct control */ 1020 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1021 {} 1022}; 1023 1024static const hda_nid_t stac92hd71bxx_unmute_nids[] = { 1025 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ 1026 0x0f, 0x0a, 0x0d, 0 1027}; 1028 1029static const struct hda_verb stac925x_core_init[] = { 1030 /* set dac0mux for dac converter */ 1031 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, 1032 /* mute the master volume */ 1033 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE }, 1034 {} 1035}; 1036 1037static const struct hda_verb stac922x_core_init[] = { 1038 /* set master volume and direct control */ 1039 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1040 {} 1041}; 1042 1043static const struct hda_verb d965_core_init[] = { 1044 /* unmute node 0x1b */ 1045 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1046 /* select node 0x03 as DAC */ 1047 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1048 {} 1049}; 1050 1051static const struct hda_verb dell_3st_core_init[] = { 1052 /* don't set delta bit */ 1053 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1054 /* unmute node 0x1b */ 1055 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1056 /* select node 0x03 as DAC */ 1057 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1058 {} 1059}; 1060 1061static const struct hda_verb stac927x_core_init[] = { 1062 /* set master volume and direct control */ 1063 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1064 /* enable analog pc beep path */ 1065 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1066 {} 1067}; 1068 1069static const struct hda_verb stac927x_volknob_core_init[] = { 1070 /* don't set delta bit */ 1071 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1072 /* enable analog pc beep path */ 1073 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1074 {} 1075}; 1076 1077static const struct hda_verb stac9205_core_init[] = { 1078 /* set master volume and direct control */ 1079 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1080 /* enable analog pc beep path */ 1081 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1082 {} 1083}; 1084 1085static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback = 1086 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3); 1087 1088static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback = 1089 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4); 1090 1091static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback = 1092 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5); 1093 1094static const struct snd_kcontrol_new stac92hd71bxx_loopback = 1095 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2); 1096 1097static const struct snd_kcontrol_new stac9205_loopback = 1098 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1); 1099 1100static const struct snd_kcontrol_new stac927x_loopback = 1101 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1); 1102 1103static const struct hda_pintbl ref9200_pin_configs[] = { 1104 { 0x08, 0x01c47010 }, 1105 { 0x09, 0x01447010 }, 1106 { 0x0d, 0x0221401f }, 1107 { 0x0e, 0x01114010 }, 1108 { 0x0f, 0x02a19020 }, 1109 { 0x10, 0x01a19021 }, 1110 { 0x11, 0x90100140 }, 1111 { 0x12, 0x01813122 }, 1112 {} 1113}; 1114 1115static const struct hda_pintbl gateway9200_m4_pin_configs[] = { 1116 { 0x08, 0x400000fe }, 1117 { 0x09, 0x404500f4 }, 1118 { 0x0d, 0x400100f0 }, 1119 { 0x0e, 0x90110010 }, 1120 { 0x0f, 0x400100f1 }, 1121 { 0x10, 0x02a1902e }, 1122 { 0x11, 0x500000f2 }, 1123 { 0x12, 0x500000f3 }, 1124 {} 1125}; 1126 1127static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = { 1128 { 0x08, 0x400000fe }, 1129 { 0x09, 0x404500f4 }, 1130 { 0x0d, 0x400100f0 }, 1131 { 0x0e, 0x90110010 }, 1132 { 0x0f, 0x400100f1 }, 1133 { 0x10, 0x02a1902e }, 1134 { 0x11, 0x500000f2 }, 1135 { 0x12, 0x500000f3 }, 1136 {} 1137}; 1138 1139/* 1140 STAC 9200 pin configs for 1141 102801A8 1142 102801DE 1143 102801E8 1144*/ 1145static const struct hda_pintbl dell9200_d21_pin_configs[] = { 1146 { 0x08, 0x400001f0 }, 1147 { 0x09, 0x400001f1 }, 1148 { 0x0d, 0x02214030 }, 1149 { 0x0e, 0x01014010 }, 1150 { 0x0f, 0x02a19020 }, 1151 { 0x10, 0x01a19021 }, 1152 { 0x11, 0x90100140 }, 1153 { 0x12, 0x01813122 }, 1154 {} 1155}; 1156 1157/* 1158 STAC 9200 pin configs for 1159 102801C0 1160 102801C1 1161*/ 1162static const struct hda_pintbl dell9200_d22_pin_configs[] = { 1163 { 0x08, 0x400001f0 }, 1164 { 0x09, 0x400001f1 }, 1165 { 0x0d, 0x0221401f }, 1166 { 0x0e, 0x01014010 }, 1167 { 0x0f, 0x01813020 }, 1168 { 0x10, 0x02a19021 }, 1169 { 0x11, 0x90100140 }, 1170 { 0x12, 0x400001f2 }, 1171 {} 1172}; 1173 1174/* 1175 STAC 9200 pin configs for 1176 102801C4 (Dell Dimension E310) 1177 102801C5 1178 102801C7 1179 102801D9 1180 102801DA 1181 102801E3 1182*/ 1183static const struct hda_pintbl dell9200_d23_pin_configs[] = { 1184 { 0x08, 0x400001f0 }, 1185 { 0x09, 0x400001f1 }, 1186 { 0x0d, 0x0221401f }, 1187 { 0x0e, 0x01014010 }, 1188 { 0x0f, 0x01813020 }, 1189 { 0x10, 0x01a19021 }, 1190 { 0x11, 0x90100140 }, 1191 { 0x12, 0x400001f2 }, 1192 {} 1193}; 1194 1195 1196/* 1197 STAC 9200-32 pin configs for 1198 102801B5 (Dell Inspiron 630m) 1199 102801D8 (Dell Inspiron 640m) 1200*/ 1201static const struct hda_pintbl dell9200_m21_pin_configs[] = { 1202 { 0x08, 0x40c003fa }, 1203 { 0x09, 0x03441340 }, 1204 { 0x0d, 0x0321121f }, 1205 { 0x0e, 0x90170310 }, 1206 { 0x0f, 0x408003fb }, 1207 { 0x10, 0x03a11020 }, 1208 { 0x11, 0x401003fc }, 1209 { 0x12, 0x403003fd }, 1210 {} 1211}; 1212 1213/* 1214 STAC 9200-32 pin configs for 1215 102801C2 (Dell Latitude D620) 1216 102801C8 1217 102801CC (Dell Latitude D820) 1218 102801D4 1219 102801D6 1220*/ 1221static const struct hda_pintbl dell9200_m22_pin_configs[] = { 1222 { 0x08, 0x40c003fa }, 1223 { 0x09, 0x0144131f }, 1224 { 0x0d, 0x0321121f }, 1225 { 0x0e, 0x90170310 }, 1226 { 0x0f, 0x90a70321 }, 1227 { 0x10, 0x03a11020 }, 1228 { 0x11, 0x401003fb }, 1229 { 0x12, 0x40f000fc }, 1230 {} 1231}; 1232 1233/* 1234 STAC 9200-32 pin configs for 1235 102801CE (Dell XPS M1710) 1236 102801CF (Dell Precision M90) 1237*/ 1238static const struct hda_pintbl dell9200_m23_pin_configs[] = { 1239 { 0x08, 0x40c003fa }, 1240 { 0x09, 0x01441340 }, 1241 { 0x0d, 0x0421421f }, 1242 { 0x0e, 0x90170310 }, 1243 { 0x0f, 0x408003fb }, 1244 { 0x10, 0x04a1102e }, 1245 { 0x11, 0x90170311 }, 1246 { 0x12, 0x403003fc }, 1247 {} 1248}; 1249 1250/* 1251 STAC 9200-32 pin configs for 1252 102801C9 1253 102801CA 1254 102801CB (Dell Latitude 120L) 1255 102801D3 1256*/ 1257static const struct hda_pintbl dell9200_m24_pin_configs[] = { 1258 { 0x08, 0x40c003fa }, 1259 { 0x09, 0x404003fb }, 1260 { 0x0d, 0x0321121f }, 1261 { 0x0e, 0x90170310 }, 1262 { 0x0f, 0x408003fc }, 1263 { 0x10, 0x03a11020 }, 1264 { 0x11, 0x401003fd }, 1265 { 0x12, 0x403003fe }, 1266 {} 1267}; 1268 1269/* 1270 STAC 9200-32 pin configs for 1271 102801BD (Dell Inspiron E1505n) 1272 102801EE 1273 102801EF 1274*/ 1275static const struct hda_pintbl dell9200_m25_pin_configs[] = { 1276 { 0x08, 0x40c003fa }, 1277 { 0x09, 0x01441340 }, 1278 { 0x0d, 0x0421121f }, 1279 { 0x0e, 0x90170310 }, 1280 { 0x0f, 0x408003fb }, 1281 { 0x10, 0x04a11020 }, 1282 { 0x11, 0x401003fc }, 1283 { 0x12, 0x403003fd }, 1284 {} 1285}; 1286 1287/* 1288 STAC 9200-32 pin configs for 1289 102801F5 (Dell Inspiron 1501) 1290 102801F6 1291*/ 1292static const struct hda_pintbl dell9200_m26_pin_configs[] = { 1293 { 0x08, 0x40c003fa }, 1294 { 0x09, 0x404003fb }, 1295 { 0x0d, 0x0421121f }, 1296 { 0x0e, 0x90170310 }, 1297 { 0x0f, 0x408003fc }, 1298 { 0x10, 0x04a11020 }, 1299 { 0x11, 0x401003fd }, 1300 { 0x12, 0x403003fe }, 1301 {} 1302}; 1303 1304/* 1305 STAC 9200-32 1306 102801CD (Dell Inspiron E1705/9400) 1307*/ 1308static const struct hda_pintbl dell9200_m27_pin_configs[] = { 1309 { 0x08, 0x40c003fa }, 1310 { 0x09, 0x01441340 }, 1311 { 0x0d, 0x0421121f }, 1312 { 0x0e, 0x90170310 }, 1313 { 0x0f, 0x90170310 }, 1314 { 0x10, 0x04a11020 }, 1315 { 0x11, 0x90170310 }, 1316 { 0x12, 0x40f003fc }, 1317 {} 1318}; 1319 1320static const struct hda_pintbl oqo9200_pin_configs[] = { 1321 { 0x08, 0x40c000f0 }, 1322 { 0x09, 0x404000f1 }, 1323 { 0x0d, 0x0221121f }, 1324 { 0x0e, 0x02211210 }, 1325 { 0x0f, 0x90170111 }, 1326 { 0x10, 0x90a70120 }, 1327 { 0x11, 0x400000f2 }, 1328 { 0x12, 0x400000f3 }, 1329 {} 1330}; 1331 1332/* 1333 * STAC 92HD700 1334 * 18881000 Amigaone X1000 1335 */ 1336static const struct hda_pintbl nemo_pin_configs[] = { 1337 { 0x0a, 0x02214020 }, /* Front panel HP socket */ 1338 { 0x0b, 0x02a19080 }, /* Front Mic */ 1339 { 0x0c, 0x0181304e }, /* Line in */ 1340 { 0x0d, 0x01014010 }, /* Line out */ 1341 { 0x0e, 0x01a19040 }, /* Rear Mic */ 1342 { 0x0f, 0x01011012 }, /* Rear speakers */ 1343 { 0x10, 0x01016011 }, /* Center speaker */ 1344 { 0x11, 0x01012014 }, /* Side speakers (7.1) */ 1345 { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */ 1346 { 0x13, 0x411111f0 }, /* Unused */ 1347 { 0x14, 0x411111f0 }, /* Unused */ 1348 { 0x21, 0x01442170 }, /* S/PDIF line out */ 1349 { 0x22, 0x411111f0 }, /* Unused */ 1350 { 0x23, 0x411111f0 }, /* Unused */ 1351 {} 1352}; 1353 1354static void stac9200_fixup_panasonic(struct hda_codec *codec, 1355 const struct hda_fixup *fix, int action) 1356{ 1357 struct sigmatel_spec *spec = codec->spec; 1358 1359 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 1360 spec->gpio_mask = spec->gpio_dir = 0x09; 1361 spec->gpio_data = 0x00; 1362 /* CF-74 has no headphone detection, and the driver should *NOT* 1363 * do detection and HP/speaker toggle because the hardware does it. 1364 */ 1365 spec->gen.suppress_auto_mute = 1; 1366 } 1367} 1368 1369 1370static const struct hda_fixup stac9200_fixups[] = { 1371 [STAC_REF] = { 1372 .type = HDA_FIXUP_PINS, 1373 .v.pins = ref9200_pin_configs, 1374 }, 1375 [STAC_9200_OQO] = { 1376 .type = HDA_FIXUP_PINS, 1377 .v.pins = oqo9200_pin_configs, 1378 .chained = true, 1379 .chain_id = STAC_9200_EAPD_INIT, 1380 }, 1381 [STAC_9200_DELL_D21] = { 1382 .type = HDA_FIXUP_PINS, 1383 .v.pins = dell9200_d21_pin_configs, 1384 }, 1385 [STAC_9200_DELL_D22] = { 1386 .type = HDA_FIXUP_PINS, 1387 .v.pins = dell9200_d22_pin_configs, 1388 }, 1389 [STAC_9200_DELL_D23] = { 1390 .type = HDA_FIXUP_PINS, 1391 .v.pins = dell9200_d23_pin_configs, 1392 }, 1393 [STAC_9200_DELL_M21] = { 1394 .type = HDA_FIXUP_PINS, 1395 .v.pins = dell9200_m21_pin_configs, 1396 }, 1397 [STAC_9200_DELL_M22] = { 1398 .type = HDA_FIXUP_PINS, 1399 .v.pins = dell9200_m22_pin_configs, 1400 }, 1401 [STAC_9200_DELL_M23] = { 1402 .type = HDA_FIXUP_PINS, 1403 .v.pins = dell9200_m23_pin_configs, 1404 }, 1405 [STAC_9200_DELL_M24] = { 1406 .type = HDA_FIXUP_PINS, 1407 .v.pins = dell9200_m24_pin_configs, 1408 }, 1409 [STAC_9200_DELL_M25] = { 1410 .type = HDA_FIXUP_PINS, 1411 .v.pins = dell9200_m25_pin_configs, 1412 }, 1413 [STAC_9200_DELL_M26] = { 1414 .type = HDA_FIXUP_PINS, 1415 .v.pins = dell9200_m26_pin_configs, 1416 }, 1417 [STAC_9200_DELL_M27] = { 1418 .type = HDA_FIXUP_PINS, 1419 .v.pins = dell9200_m27_pin_configs, 1420 }, 1421 [STAC_9200_M4] = { 1422 .type = HDA_FIXUP_PINS, 1423 .v.pins = gateway9200_m4_pin_configs, 1424 .chained = true, 1425 .chain_id = STAC_9200_EAPD_INIT, 1426 }, 1427 [STAC_9200_M4_2] = { 1428 .type = HDA_FIXUP_PINS, 1429 .v.pins = gateway9200_m4_2_pin_configs, 1430 .chained = true, 1431 .chain_id = STAC_9200_EAPD_INIT, 1432 }, 1433 [STAC_9200_PANASONIC] = { 1434 .type = HDA_FIXUP_FUNC, 1435 .v.func = stac9200_fixup_panasonic, 1436 }, 1437 [STAC_9200_EAPD_INIT] = { 1438 .type = HDA_FIXUP_VERBS, 1439 .v.verbs = (const struct hda_verb[]) { 1440 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1441 {} 1442 }, 1443 }, 1444}; 1445 1446static const struct hda_model_fixup stac9200_models[] = { 1447 { .id = STAC_REF, .name = "ref" }, 1448 { .id = STAC_9200_OQO, .name = "oqo" }, 1449 { .id = STAC_9200_DELL_D21, .name = "dell-d21" }, 1450 { .id = STAC_9200_DELL_D22, .name = "dell-d22" }, 1451 { .id = STAC_9200_DELL_D23, .name = "dell-d23" }, 1452 { .id = STAC_9200_DELL_M21, .name = "dell-m21" }, 1453 { .id = STAC_9200_DELL_M22, .name = "dell-m22" }, 1454 { .id = STAC_9200_DELL_M23, .name = "dell-m23" }, 1455 { .id = STAC_9200_DELL_M24, .name = "dell-m24" }, 1456 { .id = STAC_9200_DELL_M25, .name = "dell-m25" }, 1457 { .id = STAC_9200_DELL_M26, .name = "dell-m26" }, 1458 { .id = STAC_9200_DELL_M27, .name = "dell-m27" }, 1459 { .id = STAC_9200_M4, .name = "gateway-m4" }, 1460 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" }, 1461 { .id = STAC_9200_PANASONIC, .name = "panasonic" }, 1462 {} 1463}; 1464 1465static const struct snd_pci_quirk stac9200_fixup_tbl[] = { 1466 /* SigmaTel reference board */ 1467 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1468 "DFI LanParty", STAC_REF), 1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1470 "DFI LanParty", STAC_REF), 1471 /* Dell laptops have BIOS problem */ 1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, 1473 "unknown Dell", STAC_9200_DELL_D21), 1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, 1475 "Dell Inspiron 630m", STAC_9200_DELL_M21), 1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, 1477 "Dell Inspiron E1505n", STAC_9200_DELL_M25), 1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, 1479 "unknown Dell", STAC_9200_DELL_D22), 1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, 1481 "unknown Dell", STAC_9200_DELL_D22), 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, 1483 "Dell Latitude D620", STAC_9200_DELL_M22), 1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, 1485 "unknown Dell", STAC_9200_DELL_D23), 1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, 1487 "unknown Dell", STAC_9200_DELL_D23), 1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, 1489 "unknown Dell", STAC_9200_DELL_M22), 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, 1491 "unknown Dell", STAC_9200_DELL_M24), 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, 1493 "unknown Dell", STAC_9200_DELL_M24), 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, 1495 "Dell Latitude 120L", STAC_9200_DELL_M24), 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, 1497 "Dell Latitude D820", STAC_9200_DELL_M22), 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, 1499 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, 1501 "Dell XPS M1710", STAC_9200_DELL_M23), 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, 1503 "Dell Precision M90", STAC_9200_DELL_M23), 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, 1505 "unknown Dell", STAC_9200_DELL_M22), 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, 1507 "unknown Dell", STAC_9200_DELL_M22), 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, 1509 "unknown Dell", STAC_9200_DELL_M22), 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, 1511 "Dell Inspiron 640m", STAC_9200_DELL_M21), 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, 1513 "unknown Dell", STAC_9200_DELL_D23), 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, 1515 "unknown Dell", STAC_9200_DELL_D23), 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, 1517 "unknown Dell", STAC_9200_DELL_D21), 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, 1519 "unknown Dell", STAC_9200_DELL_D23), 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, 1521 "unknown Dell", STAC_9200_DELL_D21), 1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, 1523 "unknown Dell", STAC_9200_DELL_M25), 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, 1525 "unknown Dell", STAC_9200_DELL_M25), 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, 1527 "Dell Inspiron 1501", STAC_9200_DELL_M26), 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, 1529 "unknown Dell", STAC_9200_DELL_M26), 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201, 1531 "Dell Latitude D430", STAC_9200_DELL_M22), 1532 /* Panasonic */ 1533 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC), 1534 /* Gateway machines needs EAPD to be set on resume */ 1535 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4), 1536 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2), 1537 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2), 1538 /* OQO Mobile */ 1539 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO), 1540 {} /* terminator */ 1541}; 1542 1543static const struct hda_pintbl ref925x_pin_configs[] = { 1544 { 0x07, 0x40c003f0 }, 1545 { 0x08, 0x424503f2 }, 1546 { 0x0a, 0x01813022 }, 1547 { 0x0b, 0x02a19021 }, 1548 { 0x0c, 0x90a70320 }, 1549 { 0x0d, 0x02214210 }, 1550 { 0x10, 0x01019020 }, 1551 { 0x11, 0x9033032e }, 1552 {} 1553}; 1554 1555static const struct hda_pintbl stac925xM1_pin_configs[] = { 1556 { 0x07, 0x40c003f4 }, 1557 { 0x08, 0x424503f2 }, 1558 { 0x0a, 0x400000f3 }, 1559 { 0x0b, 0x02a19020 }, 1560 { 0x0c, 0x40a000f0 }, 1561 { 0x0d, 0x90100210 }, 1562 { 0x10, 0x400003f1 }, 1563 { 0x11, 0x9033032e }, 1564 {} 1565}; 1566 1567static const struct hda_pintbl stac925xM1_2_pin_configs[] = { 1568 { 0x07, 0x40c003f4 }, 1569 { 0x08, 0x424503f2 }, 1570 { 0x0a, 0x400000f3 }, 1571 { 0x0b, 0x02a19020 }, 1572 { 0x0c, 0x40a000f0 }, 1573 { 0x0d, 0x90100210 }, 1574 { 0x10, 0x400003f1 }, 1575 { 0x11, 0x9033032e }, 1576 {} 1577}; 1578 1579static const struct hda_pintbl stac925xM2_pin_configs[] = { 1580 { 0x07, 0x40c003f4 }, 1581 { 0x08, 0x424503f2 }, 1582 { 0x0a, 0x400000f3 }, 1583 { 0x0b, 0x02a19020 }, 1584 { 0x0c, 0x40a000f0 }, 1585 { 0x0d, 0x90100210 }, 1586 { 0x10, 0x400003f1 }, 1587 { 0x11, 0x9033032e }, 1588 {} 1589}; 1590 1591static const struct hda_pintbl stac925xM2_2_pin_configs[] = { 1592 { 0x07, 0x40c003f4 }, 1593 { 0x08, 0x424503f2 }, 1594 { 0x0a, 0x400000f3 }, 1595 { 0x0b, 0x02a19020 }, 1596 { 0x0c, 0x40a000f0 }, 1597 { 0x0d, 0x90100210 }, 1598 { 0x10, 0x400003f1 }, 1599 { 0x11, 0x9033032e }, 1600 {} 1601}; 1602 1603static const struct hda_pintbl stac925xM3_pin_configs[] = { 1604 { 0x07, 0x40c003f4 }, 1605 { 0x08, 0x424503f2 }, 1606 { 0x0a, 0x400000f3 }, 1607 { 0x0b, 0x02a19020 }, 1608 { 0x0c, 0x40a000f0 }, 1609 { 0x0d, 0x90100210 }, 1610 { 0x10, 0x400003f1 }, 1611 { 0x11, 0x503303f3 }, 1612 {} 1613}; 1614 1615static const struct hda_pintbl stac925xM5_pin_configs[] = { 1616 { 0x07, 0x40c003f4 }, 1617 { 0x08, 0x424503f2 }, 1618 { 0x0a, 0x400000f3 }, 1619 { 0x0b, 0x02a19020 }, 1620 { 0x0c, 0x40a000f0 }, 1621 { 0x0d, 0x90100210 }, 1622 { 0x10, 0x400003f1 }, 1623 { 0x11, 0x9033032e }, 1624 {} 1625}; 1626 1627static const struct hda_pintbl stac925xM6_pin_configs[] = { 1628 { 0x07, 0x40c003f4 }, 1629 { 0x08, 0x424503f2 }, 1630 { 0x0a, 0x400000f3 }, 1631 { 0x0b, 0x02a19020 }, 1632 { 0x0c, 0x40a000f0 }, 1633 { 0x0d, 0x90100210 }, 1634 { 0x10, 0x400003f1 }, 1635 { 0x11, 0x90330320 }, 1636 {} 1637}; 1638 1639static const struct hda_fixup stac925x_fixups[] = { 1640 [STAC_REF] = { 1641 .type = HDA_FIXUP_PINS, 1642 .v.pins = ref925x_pin_configs, 1643 }, 1644 [STAC_M1] = { 1645 .type = HDA_FIXUP_PINS, 1646 .v.pins = stac925xM1_pin_configs, 1647 }, 1648 [STAC_M1_2] = { 1649 .type = HDA_FIXUP_PINS, 1650 .v.pins = stac925xM1_2_pin_configs, 1651 }, 1652 [STAC_M2] = { 1653 .type = HDA_FIXUP_PINS, 1654 .v.pins = stac925xM2_pin_configs, 1655 }, 1656 [STAC_M2_2] = { 1657 .type = HDA_FIXUP_PINS, 1658 .v.pins = stac925xM2_2_pin_configs, 1659 }, 1660 [STAC_M3] = { 1661 .type = HDA_FIXUP_PINS, 1662 .v.pins = stac925xM3_pin_configs, 1663 }, 1664 [STAC_M5] = { 1665 .type = HDA_FIXUP_PINS, 1666 .v.pins = stac925xM5_pin_configs, 1667 }, 1668 [STAC_M6] = { 1669 .type = HDA_FIXUP_PINS, 1670 .v.pins = stac925xM6_pin_configs, 1671 }, 1672}; 1673 1674static const struct hda_model_fixup stac925x_models[] = { 1675 { .id = STAC_REF, .name = "ref" }, 1676 { .id = STAC_M1, .name = "m1" }, 1677 { .id = STAC_M1_2, .name = "m1-2" }, 1678 { .id = STAC_M2, .name = "m2" }, 1679 { .id = STAC_M2_2, .name = "m2-2" }, 1680 { .id = STAC_M3, .name = "m3" }, 1681 { .id = STAC_M5, .name = "m5" }, 1682 { .id = STAC_M6, .name = "m6" }, 1683 {} 1684}; 1685 1686static const struct snd_pci_quirk stac925x_fixup_tbl[] = { 1687 /* SigmaTel reference board */ 1688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), 1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), 1690 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), 1691 1692 /* Default table for unknown ID */ 1693 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2), 1694 1695 /* gateway machines are checked via codec ssid */ 1696 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), 1697 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), 1698 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), 1699 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2), 1700 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2), 1701 /* Not sure about the brand name for those */ 1702 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1), 1703 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3), 1704 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6), 1705 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2), 1706 {} /* terminator */ 1707}; 1708 1709static const struct hda_pintbl ref92hd73xx_pin_configs[] = { 1710 // Port A-H 1711 { 0x0a, 0x02214030 }, 1712 { 0x0b, 0x02a19040 }, 1713 { 0x0c, 0x01a19020 }, 1714 { 0x0d, 0x02214030 }, 1715 { 0x0e, 0x0181302e }, 1716 { 0x0f, 0x01014010 }, 1717 { 0x10, 0x01014020 }, 1718 { 0x11, 0x01014030 }, 1719 // CD in 1720 { 0x12, 0x02319040 }, 1721 // Digial Mic ins 1722 { 0x13, 0x90a000f0 }, 1723 { 0x14, 0x90a000f0 }, 1724 // Digital outs 1725 { 0x22, 0x01452050 }, 1726 { 0x23, 0x01452050 }, 1727 {} 1728}; 1729 1730static const struct hda_pintbl dell_m6_pin_configs[] = { 1731 { 0x0a, 0x0321101f }, 1732 { 0x0b, 0x4f00000f }, 1733 { 0x0c, 0x4f0000f0 }, 1734 { 0x0d, 0x90170110 }, 1735 { 0x0e, 0x03a11020 }, 1736 { 0x0f, 0x0321101f }, 1737 { 0x10, 0x4f0000f0 }, 1738 { 0x11, 0x4f0000f0 }, 1739 { 0x12, 0x4f0000f0 }, 1740 { 0x13, 0x90a60160 }, 1741 { 0x14, 0x4f0000f0 }, 1742 { 0x22, 0x4f0000f0 }, 1743 { 0x23, 0x4f0000f0 }, 1744 {} 1745}; 1746 1747static const struct hda_pintbl alienware_m17x_pin_configs[] = { 1748 { 0x0a, 0x0321101f }, 1749 { 0x0b, 0x0321101f }, 1750 { 0x0c, 0x03a11020 }, 1751 { 0x0d, 0x03014020 }, 1752 { 0x0e, 0x90170110 }, 1753 { 0x0f, 0x4f0000f0 }, 1754 { 0x10, 0x4f0000f0 }, 1755 { 0x11, 0x4f0000f0 }, 1756 { 0x12, 0x4f0000f0 }, 1757 { 0x13, 0x90a60160 }, 1758 { 0x14, 0x4f0000f0 }, 1759 { 0x22, 0x4f0000f0 }, 1760 { 0x23, 0x904601b0 }, 1761 {} 1762}; 1763 1764static const struct hda_pintbl intel_dg45id_pin_configs[] = { 1765 // Analog outputs 1766 { 0x0a, 0x02214230 }, 1767 { 0x0b, 0x02A19240 }, 1768 { 0x0c, 0x01013214 }, 1769 { 0x0d, 0x01014210 }, 1770 { 0x0e, 0x01A19250 }, 1771 { 0x0f, 0x01011212 }, 1772 { 0x10, 0x01016211 }, 1773 // Digital output 1774 { 0x22, 0x01451380 }, 1775 { 0x23, 0x40f000f0 }, 1776 {} 1777}; 1778 1779static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = { 1780 { 0x0a, 0x02214030 }, 1781 { 0x0b, 0x02A19010 }, 1782 {} 1783}; 1784 1785static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = { 1786 { 0x0e, 0x400000f0 }, 1787 {} 1788}; 1789 1790static void stac92hd73xx_fixup_ref(struct hda_codec *codec, 1791 const struct hda_fixup *fix, int action) 1792{ 1793 struct sigmatel_spec *spec = codec->spec; 1794 1795 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1796 return; 1797 1798 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs); 1799 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 1800} 1801 1802static void stac92hd73xx_fixup_dell(struct hda_codec *codec) 1803{ 1804 struct sigmatel_spec *spec = codec->spec; 1805 1806 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs); 1807 spec->eapd_switch = 0; 1808} 1809 1810static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec, 1811 const struct hda_fixup *fix, int action) 1812{ 1813 struct sigmatel_spec *spec = codec->spec; 1814 1815 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1816 return; 1817 1818 stac92hd73xx_fixup_dell(codec); 1819 snd_hda_add_verbs(codec, dell_eq_core_init); 1820 spec->volknob_init = 1; 1821} 1822 1823/* Analog Mics */ 1824static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec, 1825 const struct hda_fixup *fix, int action) 1826{ 1827 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1828 return; 1829 1830 stac92hd73xx_fixup_dell(codec); 1831 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1832} 1833 1834/* Digital Mics */ 1835static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec, 1836 const struct hda_fixup *fix, int action) 1837{ 1838 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1839 return; 1840 1841 stac92hd73xx_fixup_dell(codec); 1842 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1843} 1844 1845/* Both */ 1846static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec, 1847 const struct hda_fixup *fix, int action) 1848{ 1849 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1850 return; 1851 1852 stac92hd73xx_fixup_dell(codec); 1853 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1854 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1855} 1856 1857static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec, 1858 const struct hda_fixup *fix, int action) 1859{ 1860 struct sigmatel_spec *spec = codec->spec; 1861 1862 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1863 return; 1864 1865 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs); 1866 spec->eapd_switch = 0; 1867} 1868 1869static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec, 1870 const struct hda_fixup *fix, int action) 1871{ 1872 if (action == HDA_FIXUP_ACT_PRE_PROBE) 1873 codec->no_jack_detect = 1; 1874} 1875 1876 1877static void stac92hd73xx_disable_automute(struct hda_codec *codec, 1878 const struct hda_fixup *fix, int action) 1879{ 1880 struct sigmatel_spec *spec = codec->spec; 1881 1882 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1883 return; 1884 1885 spec->gen.suppress_auto_mute = 1; 1886} 1887 1888static const struct hda_fixup stac92hd73xx_fixups[] = { 1889 [STAC_92HD73XX_REF] = { 1890 .type = HDA_FIXUP_FUNC, 1891 .v.func = stac92hd73xx_fixup_ref, 1892 }, 1893 [STAC_DELL_M6_AMIC] = { 1894 .type = HDA_FIXUP_FUNC, 1895 .v.func = stac92hd73xx_fixup_dell_m6_amic, 1896 }, 1897 [STAC_DELL_M6_DMIC] = { 1898 .type = HDA_FIXUP_FUNC, 1899 .v.func = stac92hd73xx_fixup_dell_m6_dmic, 1900 }, 1901 [STAC_DELL_M6_BOTH] = { 1902 .type = HDA_FIXUP_FUNC, 1903 .v.func = stac92hd73xx_fixup_dell_m6_both, 1904 }, 1905 [STAC_DELL_EQ] = { 1906 .type = HDA_FIXUP_FUNC, 1907 .v.func = stac92hd73xx_fixup_dell_eq, 1908 }, 1909 [STAC_ALIENWARE_M17X] = { 1910 .type = HDA_FIXUP_FUNC, 1911 .v.func = stac92hd73xx_fixup_alienware_m17x, 1912 }, 1913 [STAC_ELO_VUPOINT_15MX] = { 1914 .type = HDA_FIXUP_FUNC, 1915 .v.func = stac92hd73xx_disable_automute, 1916 }, 1917 [STAC_92HD73XX_INTEL] = { 1918 .type = HDA_FIXUP_PINS, 1919 .v.pins = intel_dg45id_pin_configs, 1920 }, 1921 [STAC_92HD73XX_NO_JD] = { 1922 .type = HDA_FIXUP_FUNC, 1923 .v.func = stac92hd73xx_fixup_no_jd, 1924 }, 1925 [STAC_92HD89XX_HP_FRONT_JACK] = { 1926 .type = HDA_FIXUP_PINS, 1927 .v.pins = stac92hd89xx_hp_front_jack_pin_configs, 1928 }, 1929 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = { 1930 .type = HDA_FIXUP_PINS, 1931 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs, 1932 }, 1933 [STAC_92HD73XX_ASUS_MOBO] = { 1934 .type = HDA_FIXUP_PINS, 1935 .v.pins = (const struct hda_pintbl[]) { 1936 /* enable 5.1 and SPDIF out */ 1937 { 0x0c, 0x01014411 }, 1938 { 0x0d, 0x01014410 }, 1939 { 0x0e, 0x01014412 }, 1940 { 0x22, 0x014b1180 }, 1941 { } 1942 } 1943 }, 1944}; 1945 1946static const struct hda_model_fixup stac92hd73xx_models[] = { 1947 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" }, 1948 { .id = STAC_92HD73XX_REF, .name = "ref" }, 1949 { .id = STAC_92HD73XX_INTEL, .name = "intel" }, 1950 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" }, 1951 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" }, 1952 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" }, 1953 { .id = STAC_DELL_EQ, .name = "dell-eq" }, 1954 { .id = STAC_ALIENWARE_M17X, .name = "alienware" }, 1955 { .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" }, 1956 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" }, 1957 {} 1958}; 1959 1960static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = { 1961 /* SigmaTel reference board */ 1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1963 "DFI LanParty", STAC_92HD73XX_REF), 1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1965 "DFI LanParty", STAC_92HD73XX_REF), 1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5001, 1967 "Intel DP45SG", STAC_92HD73XX_INTEL), 1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002, 1969 "Intel DG45ID", STAC_92HD73XX_INTEL), 1970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003, 1971 "Intel DG45FC", STAC_92HD73XX_INTEL), 1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254, 1973 "Dell Studio 1535", STAC_DELL_M6_DMIC), 1974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255, 1975 "unknown Dell", STAC_DELL_M6_DMIC), 1976 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256, 1977 "unknown Dell", STAC_DELL_M6_BOTH), 1978 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257, 1979 "unknown Dell", STAC_DELL_M6_BOTH), 1980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e, 1981 "unknown Dell", STAC_DELL_M6_AMIC), 1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f, 1983 "unknown Dell", STAC_DELL_M6_AMIC), 1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271, 1985 "unknown Dell", STAC_DELL_M6_DMIC), 1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272, 1987 "unknown Dell", STAC_DELL_M6_DMIC), 1988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f, 1989 "Dell Studio 1537", STAC_DELL_M6_DMIC), 1990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0, 1991 "Dell Studio 17", STAC_DELL_M6_DMIC), 1992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be, 1993 "Dell Studio 1555", STAC_DELL_M6_DMIC), 1994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd, 1995 "Dell Studio 1557", STAC_DELL_M6_DMIC), 1996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe, 1997 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC), 1998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413, 1999 "Dell Studio 1558", STAC_DELL_M6_DMIC), 2000 /* codec SSID matching */ 2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, 2002 "Alienware M17x", STAC_ALIENWARE_M17X), 2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, 2004 "Alienware M17x", STAC_ALIENWARE_M17X), 2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490, 2006 "Alienware M17x R3", STAC_DELL_EQ), 2007 SND_PCI_QUIRK(0x1059, 0x1011, 2008 "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX), 2009 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927, 2010 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK), 2011 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17, 2012 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK), 2013 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10", 2014 STAC_92HD73XX_ASUS_MOBO), 2015 {} /* terminator */ 2016}; 2017 2018static const struct hda_pintbl ref92hd83xxx_pin_configs[] = { 2019 { 0x0a, 0x02214030 }, 2020 { 0x0b, 0x02211010 }, 2021 { 0x0c, 0x02a19020 }, 2022 { 0x0d, 0x02170130 }, 2023 { 0x0e, 0x01014050 }, 2024 { 0x0f, 0x01819040 }, 2025 { 0x10, 0x01014020 }, 2026 { 0x11, 0x90a3014e }, 2027 { 0x1f, 0x01451160 }, 2028 { 0x20, 0x98560170 }, 2029 {} 2030}; 2031 2032static const struct hda_pintbl dell_s14_pin_configs[] = { 2033 { 0x0a, 0x0221403f }, 2034 { 0x0b, 0x0221101f }, 2035 { 0x0c, 0x02a19020 }, 2036 { 0x0d, 0x90170110 }, 2037 { 0x0e, 0x40f000f0 }, 2038 { 0x0f, 0x40f000f0 }, 2039 { 0x10, 0x40f000f0 }, 2040 { 0x11, 0x90a60160 }, 2041 { 0x1f, 0x40f000f0 }, 2042 { 0x20, 0x40f000f0 }, 2043 {} 2044}; 2045 2046static const struct hda_pintbl dell_vostro_3500_pin_configs[] = { 2047 { 0x0a, 0x02a11020 }, 2048 { 0x0b, 0x0221101f }, 2049 { 0x0c, 0x400000f0 }, 2050 { 0x0d, 0x90170110 }, 2051 { 0x0e, 0x400000f1 }, 2052 { 0x0f, 0x400000f2 }, 2053 { 0x10, 0x400000f3 }, 2054 { 0x11, 0x90a60160 }, 2055 { 0x1f, 0x400000f4 }, 2056 { 0x20, 0x400000f5 }, 2057 {} 2058}; 2059 2060static const struct hda_pintbl hp_dv7_4000_pin_configs[] = { 2061 { 0x0a, 0x03a12050 }, 2062 { 0x0b, 0x0321201f }, 2063 { 0x0c, 0x40f000f0 }, 2064 { 0x0d, 0x90170110 }, 2065 { 0x0e, 0x40f000f0 }, 2066 { 0x0f, 0x40f000f0 }, 2067 { 0x10, 0x90170110 }, 2068 { 0x11, 0xd5a30140 }, 2069 { 0x1f, 0x40f000f0 }, 2070 { 0x20, 0x40f000f0 }, 2071 {} 2072}; 2073 2074static const struct hda_pintbl hp_zephyr_pin_configs[] = { 2075 { 0x0a, 0x01813050 }, 2076 { 0x0b, 0x0421201f }, 2077 { 0x0c, 0x04a1205e }, 2078 { 0x0d, 0x96130310 }, 2079 { 0x0e, 0x96130310 }, 2080 { 0x0f, 0x0101401f }, 2081 { 0x10, 0x1111611f }, 2082 { 0x11, 0xd5a30130 }, 2083 {} 2084}; 2085 2086static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = { 2087 { 0x0a, 0x40f000f0 }, 2088 { 0x0b, 0x0221101f }, 2089 { 0x0c, 0x02a11020 }, 2090 { 0x0d, 0x92170110 }, 2091 { 0x0e, 0x40f000f0 }, 2092 { 0x0f, 0x92170110 }, 2093 { 0x10, 0x40f000f0 }, 2094 { 0x11, 0xd5a30130 }, 2095 { 0x1f, 0x40f000f0 }, 2096 { 0x20, 0x40f000f0 }, 2097 {} 2098}; 2099 2100static void stac92hd83xxx_fixup_hp(struct hda_codec *codec, 2101 const struct hda_fixup *fix, int action) 2102{ 2103 struct sigmatel_spec *spec = codec->spec; 2104 2105 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2106 return; 2107 2108 if (hp_bnb2011_with_dock(codec)) { 2109 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f); 2110 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e); 2111 } 2112 2113 if (find_mute_led_cfg(codec, spec->default_polarity)) 2114 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 2115 spec->gpio_led, 2116 spec->gpio_led_polarity); 2117 2118 /* allow auto-switching of dock line-in */ 2119 spec->gen.line_in_auto_switch = true; 2120} 2121 2122static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec, 2123 const struct hda_fixup *fix, int action) 2124{ 2125 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2126 return; 2127 2128 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs); 2129 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init); 2130} 2131 2132static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec, 2133 const struct hda_fixup *fix, int action) 2134{ 2135 struct sigmatel_spec *spec = codec->spec; 2136 2137 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2138 spec->default_polarity = 0; 2139} 2140 2141static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec, 2142 const struct hda_fixup *fix, int action) 2143{ 2144 struct sigmatel_spec *spec = codec->spec; 2145 2146 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2147 spec->default_polarity = 1; 2148} 2149 2150static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, 2151 const struct hda_fixup *fix, int action) 2152{ 2153 struct sigmatel_spec *spec = codec->spec; 2154 2155 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2156 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ 2157#ifdef CONFIG_PM 2158 /* resetting controller clears GPIO, so we need to keep on */ 2159 codec->core.power_caps &= ~AC_PWRST_CLKSTOP; 2160#endif 2161 } 2162} 2163 2164static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec, 2165 const struct hda_fixup *fix, int action) 2166{ 2167 struct sigmatel_spec *spec = codec->spec; 2168 2169 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2170 spec->gpio_led = 0x10; /* GPIO4 */ 2171 spec->default_polarity = 0; 2172 } 2173} 2174 2175static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, 2176 const struct hda_fixup *fix, int action) 2177{ 2178 struct sigmatel_spec *spec = codec->spec; 2179 2180 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2181 spec->headset_jack = 1; 2182} 2183 2184static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec, 2185 const struct hda_fixup *fix, 2186 int action) 2187{ 2188 struct sigmatel_spec *spec = codec->spec; 2189 2190 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2191 return; 2192 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 2193 spec->gpio_data = 0x10; 2194 spec->eapd_switch = 0; 2195} 2196 2197static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec, 2198 const struct hda_fixup *fix, 2199 int action) 2200{ 2201 struct sigmatel_spec *spec = codec->spec; 2202 static const hda_nid_t preferred_pairs[] = { 2203 0xd, 0x13, 2204 0 2205 }; 2206 2207 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2208 return; 2209 2210 spec->gen.preferred_dacs = preferred_pairs; 2211} 2212 2213static const struct hda_verb hp_bnb13_eq_verbs[] = { 2214 /* 44.1KHz base */ 2215 { 0x22, 0x7A6, 0x3E }, 2216 { 0x22, 0x7A7, 0x68 }, 2217 { 0x22, 0x7A8, 0x17 }, 2218 { 0x22, 0x7A9, 0x3E }, 2219 { 0x22, 0x7AA, 0x68 }, 2220 { 0x22, 0x7AB, 0x17 }, 2221 { 0x22, 0x7AC, 0x00 }, 2222 { 0x22, 0x7AD, 0x80 }, 2223 { 0x22, 0x7A6, 0x83 }, 2224 { 0x22, 0x7A7, 0x2F }, 2225 { 0x22, 0x7A8, 0xD1 }, 2226 { 0x22, 0x7A9, 0x83 }, 2227 { 0x22, 0x7AA, 0x2F }, 2228 { 0x22, 0x7AB, 0xD1 }, 2229 { 0x22, 0x7AC, 0x01 }, 2230 { 0x22, 0x7AD, 0x80 }, 2231 { 0x22, 0x7A6, 0x3E }, 2232 { 0x22, 0x7A7, 0x68 }, 2233 { 0x22, 0x7A8, 0x17 }, 2234 { 0x22, 0x7A9, 0x3E }, 2235 { 0x22, 0x7AA, 0x68 }, 2236 { 0x22, 0x7AB, 0x17 }, 2237 { 0x22, 0x7AC, 0x02 }, 2238 { 0x22, 0x7AD, 0x80 }, 2239 { 0x22, 0x7A6, 0x7C }, 2240 { 0x22, 0x7A7, 0xC6 }, 2241 { 0x22, 0x7A8, 0x0C }, 2242 { 0x22, 0x7A9, 0x7C }, 2243 { 0x22, 0x7AA, 0xC6 }, 2244 { 0x22, 0x7AB, 0x0C }, 2245 { 0x22, 0x7AC, 0x03 }, 2246 { 0x22, 0x7AD, 0x80 }, 2247 { 0x22, 0x7A6, 0xC3 }, 2248 { 0x22, 0x7A7, 0x25 }, 2249 { 0x22, 0x7A8, 0xAF }, 2250 { 0x22, 0x7A9, 0xC3 }, 2251 { 0x22, 0x7AA, 0x25 }, 2252 { 0x22, 0x7AB, 0xAF }, 2253 { 0x22, 0x7AC, 0x04 }, 2254 { 0x22, 0x7AD, 0x80 }, 2255 { 0x22, 0x7A6, 0x3E }, 2256 { 0x22, 0x7A7, 0x85 }, 2257 { 0x22, 0x7A8, 0x73 }, 2258 { 0x22, 0x7A9, 0x3E }, 2259 { 0x22, 0x7AA, 0x85 }, 2260 { 0x22, 0x7AB, 0x73 }, 2261 { 0x22, 0x7AC, 0x05 }, 2262 { 0x22, 0x7AD, 0x80 }, 2263 { 0x22, 0x7A6, 0x85 }, 2264 { 0x22, 0x7A7, 0x39 }, 2265 { 0x22, 0x7A8, 0xC7 }, 2266 { 0x22, 0x7A9, 0x85 }, 2267 { 0x22, 0x7AA, 0x39 }, 2268 { 0x22, 0x7AB, 0xC7 }, 2269 { 0x22, 0x7AC, 0x06 }, 2270 { 0x22, 0x7AD, 0x80 }, 2271 { 0x22, 0x7A6, 0x3C }, 2272 { 0x22, 0x7A7, 0x90 }, 2273 { 0x22, 0x7A8, 0xB0 }, 2274 { 0x22, 0x7A9, 0x3C }, 2275 { 0x22, 0x7AA, 0x90 }, 2276 { 0x22, 0x7AB, 0xB0 }, 2277 { 0x22, 0x7AC, 0x07 }, 2278 { 0x22, 0x7AD, 0x80 }, 2279 { 0x22, 0x7A6, 0x7A }, 2280 { 0x22, 0x7A7, 0xC6 }, 2281 { 0x22, 0x7A8, 0x39 }, 2282 { 0x22, 0x7A9, 0x7A }, 2283 { 0x22, 0x7AA, 0xC6 }, 2284 { 0x22, 0x7AB, 0x39 }, 2285 { 0x22, 0x7AC, 0x08 }, 2286 { 0x22, 0x7AD, 0x80 }, 2287 { 0x22, 0x7A6, 0xC4 }, 2288 { 0x22, 0x7A7, 0xE9 }, 2289 { 0x22, 0x7A8, 0xDC }, 2290 { 0x22, 0x7A9, 0xC4 }, 2291 { 0x22, 0x7AA, 0xE9 }, 2292 { 0x22, 0x7AB, 0xDC }, 2293 { 0x22, 0x7AC, 0x09 }, 2294 { 0x22, 0x7AD, 0x80 }, 2295 { 0x22, 0x7A6, 0x3D }, 2296 { 0x22, 0x7A7, 0xE1 }, 2297 { 0x22, 0x7A8, 0x0D }, 2298 { 0x22, 0x7A9, 0x3D }, 2299 { 0x22, 0x7AA, 0xE1 }, 2300 { 0x22, 0x7AB, 0x0D }, 2301 { 0x22, 0x7AC, 0x0A }, 2302 { 0x22, 0x7AD, 0x80 }, 2303 { 0x22, 0x7A6, 0x89 }, 2304 { 0x22, 0x7A7, 0xB6 }, 2305 { 0x22, 0x7A8, 0xEB }, 2306 { 0x22, 0x7A9, 0x89 }, 2307 { 0x22, 0x7AA, 0xB6 }, 2308 { 0x22, 0x7AB, 0xEB }, 2309 { 0x22, 0x7AC, 0x0B }, 2310 { 0x22, 0x7AD, 0x80 }, 2311 { 0x22, 0x7A6, 0x39 }, 2312 { 0x22, 0x7A7, 0x9D }, 2313 { 0x22, 0x7A8, 0xFE }, 2314 { 0x22, 0x7A9, 0x39 }, 2315 { 0x22, 0x7AA, 0x9D }, 2316 { 0x22, 0x7AB, 0xFE }, 2317 { 0x22, 0x7AC, 0x0C }, 2318 { 0x22, 0x7AD, 0x80 }, 2319 { 0x22, 0x7A6, 0x76 }, 2320 { 0x22, 0x7A7, 0x49 }, 2321 { 0x22, 0x7A8, 0x15 }, 2322 { 0x22, 0x7A9, 0x76 }, 2323 { 0x22, 0x7AA, 0x49 }, 2324 { 0x22, 0x7AB, 0x15 }, 2325 { 0x22, 0x7AC, 0x0D }, 2326 { 0x22, 0x7AD, 0x80 }, 2327 { 0x22, 0x7A6, 0xC8 }, 2328 { 0x22, 0x7A7, 0x80 }, 2329 { 0x22, 0x7A8, 0xF5 }, 2330 { 0x22, 0x7A9, 0xC8 }, 2331 { 0x22, 0x7AA, 0x80 }, 2332 { 0x22, 0x7AB, 0xF5 }, 2333 { 0x22, 0x7AC, 0x0E }, 2334 { 0x22, 0x7AD, 0x80 }, 2335 { 0x22, 0x7A6, 0x40 }, 2336 { 0x22, 0x7A7, 0x00 }, 2337 { 0x22, 0x7A8, 0x00 }, 2338 { 0x22, 0x7A9, 0x40 }, 2339 { 0x22, 0x7AA, 0x00 }, 2340 { 0x22, 0x7AB, 0x00 }, 2341 { 0x22, 0x7AC, 0x0F }, 2342 { 0x22, 0x7AD, 0x80 }, 2343 { 0x22, 0x7A6, 0x90 }, 2344 { 0x22, 0x7A7, 0x68 }, 2345 { 0x22, 0x7A8, 0xF1 }, 2346 { 0x22, 0x7A9, 0x90 }, 2347 { 0x22, 0x7AA, 0x68 }, 2348 { 0x22, 0x7AB, 0xF1 }, 2349 { 0x22, 0x7AC, 0x10 }, 2350 { 0x22, 0x7AD, 0x80 }, 2351 { 0x22, 0x7A6, 0x34 }, 2352 { 0x22, 0x7A7, 0x47 }, 2353 { 0x22, 0x7A8, 0x6C }, 2354 { 0x22, 0x7A9, 0x34 }, 2355 { 0x22, 0x7AA, 0x47 }, 2356 { 0x22, 0x7AB, 0x6C }, 2357 { 0x22, 0x7AC, 0x11 }, 2358 { 0x22, 0x7AD, 0x80 }, 2359 { 0x22, 0x7A6, 0x6F }, 2360 { 0x22, 0x7A7, 0x97 }, 2361 { 0x22, 0x7A8, 0x0F }, 2362 { 0x22, 0x7A9, 0x6F }, 2363 { 0x22, 0x7AA, 0x97 }, 2364 { 0x22, 0x7AB, 0x0F }, 2365 { 0x22, 0x7AC, 0x12 }, 2366 { 0x22, 0x7AD, 0x80 }, 2367 { 0x22, 0x7A6, 0xCB }, 2368 { 0x22, 0x7A7, 0xB8 }, 2369 { 0x22, 0x7A8, 0x94 }, 2370 { 0x22, 0x7A9, 0xCB }, 2371 { 0x22, 0x7AA, 0xB8 }, 2372 { 0x22, 0x7AB, 0x94 }, 2373 { 0x22, 0x7AC, 0x13 }, 2374 { 0x22, 0x7AD, 0x80 }, 2375 { 0x22, 0x7A6, 0x40 }, 2376 { 0x22, 0x7A7, 0x00 }, 2377 { 0x22, 0x7A8, 0x00 }, 2378 { 0x22, 0x7A9, 0x40 }, 2379 { 0x22, 0x7AA, 0x00 }, 2380 { 0x22, 0x7AB, 0x00 }, 2381 { 0x22, 0x7AC, 0x14 }, 2382 { 0x22, 0x7AD, 0x80 }, 2383 { 0x22, 0x7A6, 0x95 }, 2384 { 0x22, 0x7A7, 0x76 }, 2385 { 0x22, 0x7A8, 0x5B }, 2386 { 0x22, 0x7A9, 0x95 }, 2387 { 0x22, 0x7AA, 0x76 }, 2388 { 0x22, 0x7AB, 0x5B }, 2389 { 0x22, 0x7AC, 0x15 }, 2390 { 0x22, 0x7AD, 0x80 }, 2391 { 0x22, 0x7A6, 0x31 }, 2392 { 0x22, 0x7A7, 0xAC }, 2393 { 0x22, 0x7A8, 0x31 }, 2394 { 0x22, 0x7A9, 0x31 }, 2395 { 0x22, 0x7AA, 0xAC }, 2396 { 0x22, 0x7AB, 0x31 }, 2397 { 0x22, 0x7AC, 0x16 }, 2398 { 0x22, 0x7AD, 0x80 }, 2399 { 0x22, 0x7A6, 0x6A }, 2400 { 0x22, 0x7A7, 0x89 }, 2401 { 0x22, 0x7A8, 0xA5 }, 2402 { 0x22, 0x7A9, 0x6A }, 2403 { 0x22, 0x7AA, 0x89 }, 2404 { 0x22, 0x7AB, 0xA5 }, 2405 { 0x22, 0x7AC, 0x17 }, 2406 { 0x22, 0x7AD, 0x80 }, 2407 { 0x22, 0x7A6, 0xCE }, 2408 { 0x22, 0x7A7, 0x53 }, 2409 { 0x22, 0x7A8, 0xCF }, 2410 { 0x22, 0x7A9, 0xCE }, 2411 { 0x22, 0x7AA, 0x53 }, 2412 { 0x22, 0x7AB, 0xCF }, 2413 { 0x22, 0x7AC, 0x18 }, 2414 { 0x22, 0x7AD, 0x80 }, 2415 { 0x22, 0x7A6, 0x40 }, 2416 { 0x22, 0x7A7, 0x00 }, 2417 { 0x22, 0x7A8, 0x00 }, 2418 { 0x22, 0x7A9, 0x40 }, 2419 { 0x22, 0x7AA, 0x00 }, 2420 { 0x22, 0x7AB, 0x00 }, 2421 { 0x22, 0x7AC, 0x19 }, 2422 { 0x22, 0x7AD, 0x80 }, 2423 /* 48KHz base */ 2424 { 0x22, 0x7A6, 0x3E }, 2425 { 0x22, 0x7A7, 0x88 }, 2426 { 0x22, 0x7A8, 0xDC }, 2427 { 0x22, 0x7A9, 0x3E }, 2428 { 0x22, 0x7AA, 0x88 }, 2429 { 0x22, 0x7AB, 0xDC }, 2430 { 0x22, 0x7AC, 0x1A }, 2431 { 0x22, 0x7AD, 0x80 }, 2432 { 0x22, 0x7A6, 0x82 }, 2433 { 0x22, 0x7A7, 0xEE }, 2434 { 0x22, 0x7A8, 0x46 }, 2435 { 0x22, 0x7A9, 0x82 }, 2436 { 0x22, 0x7AA, 0xEE }, 2437 { 0x22, 0x7AB, 0x46 }, 2438 { 0x22, 0x7AC, 0x1B }, 2439 { 0x22, 0x7AD, 0x80 }, 2440 { 0x22, 0x7A6, 0x3E }, 2441 { 0x22, 0x7A7, 0x88 }, 2442 { 0x22, 0x7A8, 0xDC }, 2443 { 0x22, 0x7A9, 0x3E }, 2444 { 0x22, 0x7AA, 0x88 }, 2445 { 0x22, 0x7AB, 0xDC }, 2446 { 0x22, 0x7AC, 0x1C }, 2447 { 0x22, 0x7AD, 0x80 }, 2448 { 0x22, 0x7A6, 0x7D }, 2449 { 0x22, 0x7A7, 0x09 }, 2450 { 0x22, 0x7A8, 0x28 }, 2451 { 0x22, 0x7A9, 0x7D }, 2452 { 0x22, 0x7AA, 0x09 }, 2453 { 0x22, 0x7AB, 0x28 }, 2454 { 0x22, 0x7AC, 0x1D }, 2455 { 0x22, 0x7AD, 0x80 }, 2456 { 0x22, 0x7A6, 0xC2 }, 2457 { 0x22, 0x7A7, 0xE5 }, 2458 { 0x22, 0x7A8, 0xB4 }, 2459 { 0x22, 0x7A9, 0xC2 }, 2460 { 0x22, 0x7AA, 0xE5 }, 2461 { 0x22, 0x7AB, 0xB4 }, 2462 { 0x22, 0x7AC, 0x1E }, 2463 { 0x22, 0x7AD, 0x80 }, 2464 { 0x22, 0x7A6, 0x3E }, 2465 { 0x22, 0x7A7, 0xA3 }, 2466 { 0x22, 0x7A8, 0x1F }, 2467 { 0x22, 0x7A9, 0x3E }, 2468 { 0x22, 0x7AA, 0xA3 }, 2469 { 0x22, 0x7AB, 0x1F }, 2470 { 0x22, 0x7AC, 0x1F }, 2471 { 0x22, 0x7AD, 0x80 }, 2472 { 0x22, 0x7A6, 0x84 }, 2473 { 0x22, 0x7A7, 0xCA }, 2474 { 0x22, 0x7A8, 0xF1 }, 2475 { 0x22, 0x7A9, 0x84 }, 2476 { 0x22, 0x7AA, 0xCA }, 2477 { 0x22, 0x7AB, 0xF1 }, 2478 { 0x22, 0x7AC, 0x20 }, 2479 { 0x22, 0x7AD, 0x80 }, 2480 { 0x22, 0x7A6, 0x3C }, 2481 { 0x22, 0x7A7, 0xD5 }, 2482 { 0x22, 0x7A8, 0x9C }, 2483 { 0x22, 0x7A9, 0x3C }, 2484 { 0x22, 0x7AA, 0xD5 }, 2485 { 0x22, 0x7AB, 0x9C }, 2486 { 0x22, 0x7AC, 0x21 }, 2487 { 0x22, 0x7AD, 0x80 }, 2488 { 0x22, 0x7A6, 0x7B }, 2489 { 0x22, 0x7A7, 0x35 }, 2490 { 0x22, 0x7A8, 0x0F }, 2491 { 0x22, 0x7A9, 0x7B }, 2492 { 0x22, 0x7AA, 0x35 }, 2493 { 0x22, 0x7AB, 0x0F }, 2494 { 0x22, 0x7AC, 0x22 }, 2495 { 0x22, 0x7AD, 0x80 }, 2496 { 0x22, 0x7A6, 0xC4 }, 2497 { 0x22, 0x7A7, 0x87 }, 2498 { 0x22, 0x7A8, 0x45 }, 2499 { 0x22, 0x7A9, 0xC4 }, 2500 { 0x22, 0x7AA, 0x87 }, 2501 { 0x22, 0x7AB, 0x45 }, 2502 { 0x22, 0x7AC, 0x23 }, 2503 { 0x22, 0x7AD, 0x80 }, 2504 { 0x22, 0x7A6, 0x3E }, 2505 { 0x22, 0x7A7, 0x0A }, 2506 { 0x22, 0x7A8, 0x78 }, 2507 { 0x22, 0x7A9, 0x3E }, 2508 { 0x22, 0x7AA, 0x0A }, 2509 { 0x22, 0x7AB, 0x78 }, 2510 { 0x22, 0x7AC, 0x24 }, 2511 { 0x22, 0x7AD, 0x80 }, 2512 { 0x22, 0x7A6, 0x88 }, 2513 { 0x22, 0x7A7, 0xE2 }, 2514 { 0x22, 0x7A8, 0x05 }, 2515 { 0x22, 0x7A9, 0x88 }, 2516 { 0x22, 0x7AA, 0xE2 }, 2517 { 0x22, 0x7AB, 0x05 }, 2518 { 0x22, 0x7AC, 0x25 }, 2519 { 0x22, 0x7AD, 0x80 }, 2520 { 0x22, 0x7A6, 0x3A }, 2521 { 0x22, 0x7A7, 0x1A }, 2522 { 0x22, 0x7A8, 0xA3 }, 2523 { 0x22, 0x7A9, 0x3A }, 2524 { 0x22, 0x7AA, 0x1A }, 2525 { 0x22, 0x7AB, 0xA3 }, 2526 { 0x22, 0x7AC, 0x26 }, 2527 { 0x22, 0x7AD, 0x80 }, 2528 { 0x22, 0x7A6, 0x77 }, 2529 { 0x22, 0x7A7, 0x1D }, 2530 { 0x22, 0x7A8, 0xFB }, 2531 { 0x22, 0x7A9, 0x77 }, 2532 { 0x22, 0x7AA, 0x1D }, 2533 { 0x22, 0x7AB, 0xFB }, 2534 { 0x22, 0x7AC, 0x27 }, 2535 { 0x22, 0x7AD, 0x80 }, 2536 { 0x22, 0x7A6, 0xC7 }, 2537 { 0x22, 0x7A7, 0xDA }, 2538 { 0x22, 0x7A8, 0xE5 }, 2539 { 0x22, 0x7A9, 0xC7 }, 2540 { 0x22, 0x7AA, 0xDA }, 2541 { 0x22, 0x7AB, 0xE5 }, 2542 { 0x22, 0x7AC, 0x28 }, 2543 { 0x22, 0x7AD, 0x80 }, 2544 { 0x22, 0x7A6, 0x40 }, 2545 { 0x22, 0x7A7, 0x00 }, 2546 { 0x22, 0x7A8, 0x00 }, 2547 { 0x22, 0x7A9, 0x40 }, 2548 { 0x22, 0x7AA, 0x00 }, 2549 { 0x22, 0x7AB, 0x00 }, 2550 { 0x22, 0x7AC, 0x29 }, 2551 { 0x22, 0x7AD, 0x80 }, 2552 { 0x22, 0x7A6, 0x8E }, 2553 { 0x22, 0x7A7, 0xD7 }, 2554 { 0x22, 0x7A8, 0x22 }, 2555 { 0x22, 0x7A9, 0x8E }, 2556 { 0x22, 0x7AA, 0xD7 }, 2557 { 0x22, 0x7AB, 0x22 }, 2558 { 0x22, 0x7AC, 0x2A }, 2559 { 0x22, 0x7AD, 0x80 }, 2560 { 0x22, 0x7A6, 0x35 }, 2561 { 0x22, 0x7A7, 0x26 }, 2562 { 0x22, 0x7A8, 0xC6 }, 2563 { 0x22, 0x7A9, 0x35 }, 2564 { 0x22, 0x7AA, 0x26 }, 2565 { 0x22, 0x7AB, 0xC6 }, 2566 { 0x22, 0x7AC, 0x2B }, 2567 { 0x22, 0x7AD, 0x80 }, 2568 { 0x22, 0x7A6, 0x71 }, 2569 { 0x22, 0x7A7, 0x28 }, 2570 { 0x22, 0x7A8, 0xDE }, 2571 { 0x22, 0x7A9, 0x71 }, 2572 { 0x22, 0x7AA, 0x28 }, 2573 { 0x22, 0x7AB, 0xDE }, 2574 { 0x22, 0x7AC, 0x2C }, 2575 { 0x22, 0x7AD, 0x80 }, 2576 { 0x22, 0x7A6, 0xCA }, 2577 { 0x22, 0x7A7, 0xD9 }, 2578 { 0x22, 0x7A8, 0x3A }, 2579 { 0x22, 0x7A9, 0xCA }, 2580 { 0x22, 0x7AA, 0xD9 }, 2581 { 0x22, 0x7AB, 0x3A }, 2582 { 0x22, 0x7AC, 0x2D }, 2583 { 0x22, 0x7AD, 0x80 }, 2584 { 0x22, 0x7A6, 0x40 }, 2585 { 0x22, 0x7A7, 0x00 }, 2586 { 0x22, 0x7A8, 0x00 }, 2587 { 0x22, 0x7A9, 0x40 }, 2588 { 0x22, 0x7AA, 0x00 }, 2589 { 0x22, 0x7AB, 0x00 }, 2590 { 0x22, 0x7AC, 0x2E }, 2591 { 0x22, 0x7AD, 0x80 }, 2592 { 0x22, 0x7A6, 0x93 }, 2593 { 0x22, 0x7A7, 0x5E }, 2594 { 0x22, 0x7A8, 0xD8 }, 2595 { 0x22, 0x7A9, 0x93 }, 2596 { 0x22, 0x7AA, 0x5E }, 2597 { 0x22, 0x7AB, 0xD8 }, 2598 { 0x22, 0x7AC, 0x2F }, 2599 { 0x22, 0x7AD, 0x80 }, 2600 { 0x22, 0x7A6, 0x32 }, 2601 { 0x22, 0x7A7, 0xB7 }, 2602 { 0x22, 0x7A8, 0xB1 }, 2603 { 0x22, 0x7A9, 0x32 }, 2604 { 0x22, 0x7AA, 0xB7 }, 2605 { 0x22, 0x7AB, 0xB1 }, 2606 { 0x22, 0x7AC, 0x30 }, 2607 { 0x22, 0x7AD, 0x80 }, 2608 { 0x22, 0x7A6, 0x6C }, 2609 { 0x22, 0x7A7, 0xA1 }, 2610 { 0x22, 0x7A8, 0x28 }, 2611 { 0x22, 0x7A9, 0x6C }, 2612 { 0x22, 0x7AA, 0xA1 }, 2613 { 0x22, 0x7AB, 0x28 }, 2614 { 0x22, 0x7AC, 0x31 }, 2615 { 0x22, 0x7AD, 0x80 }, 2616 { 0x22, 0x7A6, 0xCD }, 2617 { 0x22, 0x7A7, 0x48 }, 2618 { 0x22, 0x7A8, 0x4F }, 2619 { 0x22, 0x7A9, 0xCD }, 2620 { 0x22, 0x7AA, 0x48 }, 2621 { 0x22, 0x7AB, 0x4F }, 2622 { 0x22, 0x7AC, 0x32 }, 2623 { 0x22, 0x7AD, 0x80 }, 2624 { 0x22, 0x7A6, 0x40 }, 2625 { 0x22, 0x7A7, 0x00 }, 2626 { 0x22, 0x7A8, 0x00 }, 2627 { 0x22, 0x7A9, 0x40 }, 2628 { 0x22, 0x7AA, 0x00 }, 2629 { 0x22, 0x7AB, 0x00 }, 2630 { 0x22, 0x7AC, 0x33 }, 2631 { 0x22, 0x7AD, 0x80 }, 2632 /* common */ 2633 { 0x22, 0x782, 0xC1 }, 2634 { 0x22, 0x771, 0x2C }, 2635 { 0x22, 0x772, 0x2C }, 2636 { 0x22, 0x788, 0x04 }, 2637 { 0x01, 0x7B0, 0x08 }, 2638 {} 2639}; 2640 2641static const struct hda_fixup stac92hd83xxx_fixups[] = { 2642 [STAC_92HD83XXX_REF] = { 2643 .type = HDA_FIXUP_PINS, 2644 .v.pins = ref92hd83xxx_pin_configs, 2645 }, 2646 [STAC_92HD83XXX_PWR_REF] = { 2647 .type = HDA_FIXUP_PINS, 2648 .v.pins = ref92hd83xxx_pin_configs, 2649 }, 2650 [STAC_DELL_S14] = { 2651 .type = HDA_FIXUP_PINS, 2652 .v.pins = dell_s14_pin_configs, 2653 }, 2654 [STAC_DELL_VOSTRO_3500] = { 2655 .type = HDA_FIXUP_PINS, 2656 .v.pins = dell_vostro_3500_pin_configs, 2657 }, 2658 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = { 2659 .type = HDA_FIXUP_PINS, 2660 .v.pins = hp_cNB11_intquad_pin_configs, 2661 .chained = true, 2662 .chain_id = STAC_92HD83XXX_HP, 2663 }, 2664 [STAC_92HD83XXX_HP] = { 2665 .type = HDA_FIXUP_FUNC, 2666 .v.func = stac92hd83xxx_fixup_hp, 2667 }, 2668 [STAC_HP_DV7_4000] = { 2669 .type = HDA_FIXUP_PINS, 2670 .v.pins = hp_dv7_4000_pin_configs, 2671 .chained = true, 2672 .chain_id = STAC_92HD83XXX_HP, 2673 }, 2674 [STAC_HP_ZEPHYR] = { 2675 .type = HDA_FIXUP_FUNC, 2676 .v.func = stac92hd83xxx_fixup_hp_zephyr, 2677 .chained = true, 2678 .chain_id = STAC_92HD83XXX_HP, 2679 }, 2680 [STAC_92HD83XXX_HP_LED] = { 2681 .type = HDA_FIXUP_FUNC, 2682 .v.func = stac92hd83xxx_fixup_hp_led, 2683 .chained = true, 2684 .chain_id = STAC_92HD83XXX_HP, 2685 }, 2686 [STAC_92HD83XXX_HP_INV_LED] = { 2687 .type = HDA_FIXUP_FUNC, 2688 .v.func = stac92hd83xxx_fixup_hp_inv_led, 2689 .chained = true, 2690 .chain_id = STAC_92HD83XXX_HP, 2691 }, 2692 [STAC_92HD83XXX_HP_MIC_LED] = { 2693 .type = HDA_FIXUP_FUNC, 2694 .v.func = stac92hd83xxx_fixup_hp_mic_led, 2695 .chained = true, 2696 .chain_id = STAC_92HD83XXX_HP, 2697 }, 2698 [STAC_HP_LED_GPIO10] = { 2699 .type = HDA_FIXUP_FUNC, 2700 .v.func = stac92hd83xxx_fixup_hp_led_gpio10, 2701 .chained = true, 2702 .chain_id = STAC_92HD83XXX_HP, 2703 }, 2704 [STAC_92HD83XXX_HEADSET_JACK] = { 2705 .type = HDA_FIXUP_FUNC, 2706 .v.func = stac92hd83xxx_fixup_headset_jack, 2707 }, 2708 [STAC_HP_ENVY_BASS] = { 2709 .type = HDA_FIXUP_PINS, 2710 .v.pins = (const struct hda_pintbl[]) { 2711 { 0x0f, 0x90170111 }, 2712 {} 2713 }, 2714 }, 2715 [STAC_HP_BNB13_EQ] = { 2716 .type = HDA_FIXUP_VERBS, 2717 .v.verbs = hp_bnb13_eq_verbs, 2718 .chained = true, 2719 .chain_id = STAC_92HD83XXX_HP_MIC_LED, 2720 }, 2721 [STAC_HP_ENVY_TS_BASS] = { 2722 .type = HDA_FIXUP_PINS, 2723 .v.pins = (const struct hda_pintbl[]) { 2724 { 0x10, 0x92170111 }, 2725 {} 2726 }, 2727 }, 2728 [STAC_HP_ENVY_TS_DAC_BIND] = { 2729 .type = HDA_FIXUP_FUNC, 2730 .v.func = hp_envy_ts_fixup_dac_bind, 2731 .chained = true, 2732 .chain_id = STAC_HP_ENVY_TS_BASS, 2733 }, 2734 [STAC_92HD83XXX_GPIO10_EAPD] = { 2735 .type = HDA_FIXUP_FUNC, 2736 .v.func = stac92hd83xxx_fixup_gpio10_eapd, 2737 }, 2738}; 2739 2740static const struct hda_model_fixup stac92hd83xxx_models[] = { 2741 { .id = STAC_92HD83XXX_REF, .name = "ref" }, 2742 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" }, 2743 { .id = STAC_DELL_S14, .name = "dell-s14" }, 2744 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" }, 2745 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" }, 2746 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" }, 2747 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" }, 2748 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" }, 2749 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" }, 2750 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" }, 2751 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" }, 2752 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" }, 2753 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" }, 2754 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" }, 2755 {} 2756}; 2757 2758static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { 2759 /* SigmaTel reference board */ 2760 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2761 "DFI LanParty", STAC_92HD83XXX_REF), 2762 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2763 "DFI LanParty", STAC_92HD83XXX_REF), 2764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba, 2765 "unknown Dell", STAC_DELL_S14), 2766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532, 2767 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK), 2768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533, 2769 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK), 2770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534, 2771 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK), 2772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535, 2773 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK), 2774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c, 2775 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d, 2777 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK), 2778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549, 2779 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d, 2781 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK), 2782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584, 2783 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK), 2784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028, 2785 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500), 2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656, 2787 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657, 2789 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658, 2791 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659, 2793 "HP Pavilion dv7", STAC_HP_DV7_4000), 2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A, 2795 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B, 2797 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888, 2799 "HP Envy Spectre", STAC_HP_ENVY_BASS), 2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899, 2801 "HP Folio 13", STAC_HP_LED_GPIO10), 2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df, 2803 "HP Folio", STAC_HP_BNB13_EQ), 2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8, 2805 "HP bNB13", STAC_HP_BNB13_EQ), 2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909, 2807 "HP bNB13", STAC_HP_BNB13_EQ), 2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A, 2809 "HP bNB13", STAC_HP_BNB13_EQ), 2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e, 2811 "HP ENVY TS", STAC_HP_ENVY_TS_BASS), 2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967, 2813 "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND), 2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940, 2815 "HP bNB13", STAC_HP_BNB13_EQ), 2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941, 2817 "HP bNB13", STAC_HP_BNB13_EQ), 2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942, 2819 "HP bNB13", STAC_HP_BNB13_EQ), 2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943, 2821 "HP bNB13", STAC_HP_BNB13_EQ), 2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944, 2823 "HP bNB13", STAC_HP_BNB13_EQ), 2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945, 2825 "HP bNB13", STAC_HP_BNB13_EQ), 2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946, 2827 "HP bNB13", STAC_HP_BNB13_EQ), 2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948, 2829 "HP bNB13", STAC_HP_BNB13_EQ), 2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949, 2831 "HP bNB13", STAC_HP_BNB13_EQ), 2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A, 2833 "HP bNB13", STAC_HP_BNB13_EQ), 2834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B, 2835 "HP bNB13", STAC_HP_BNB13_EQ), 2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C, 2837 "HP bNB13", STAC_HP_BNB13_EQ), 2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E, 2839 "HP bNB13", STAC_HP_BNB13_EQ), 2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F, 2841 "HP bNB13", STAC_HP_BNB13_EQ), 2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950, 2843 "HP bNB13", STAC_HP_BNB13_EQ), 2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951, 2845 "HP bNB13", STAC_HP_BNB13_EQ), 2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A, 2847 "HP bNB13", STAC_HP_BNB13_EQ), 2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B, 2849 "HP bNB13", STAC_HP_BNB13_EQ), 2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C, 2851 "HP bNB13", STAC_HP_BNB13_EQ), 2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991, 2853 "HP bNB13", STAC_HP_BNB13_EQ), 2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103, 2855 "HP bNB13", STAC_HP_BNB13_EQ), 2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104, 2857 "HP bNB13", STAC_HP_BNB13_EQ), 2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105, 2859 "HP bNB13", STAC_HP_BNB13_EQ), 2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106, 2861 "HP bNB13", STAC_HP_BNB13_EQ), 2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107, 2863 "HP bNB13", STAC_HP_BNB13_EQ), 2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108, 2865 "HP bNB13", STAC_HP_BNB13_EQ), 2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109, 2867 "HP bNB13", STAC_HP_BNB13_EQ), 2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A, 2869 "HP bNB13", STAC_HP_BNB13_EQ), 2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B, 2871 "HP bNB13", STAC_HP_BNB13_EQ), 2872 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C, 2873 "HP bNB13", STAC_HP_BNB13_EQ), 2874 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D, 2875 "HP bNB13", STAC_HP_BNB13_EQ), 2876 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E, 2877 "HP bNB13", STAC_HP_BNB13_EQ), 2878 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F, 2879 "HP bNB13", STAC_HP_BNB13_EQ), 2880 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120, 2881 "HP bNB13", STAC_HP_BNB13_EQ), 2882 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121, 2883 "HP bNB13", STAC_HP_BNB13_EQ), 2884 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122, 2885 "HP bNB13", STAC_HP_BNB13_EQ), 2886 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123, 2887 "HP bNB13", STAC_HP_BNB13_EQ), 2888 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E, 2889 "HP bNB13", STAC_HP_BNB13_EQ), 2890 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F, 2891 "HP bNB13", STAC_HP_BNB13_EQ), 2892 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140, 2893 "HP bNB13", STAC_HP_BNB13_EQ), 2894 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2, 2895 "HP bNB13", STAC_HP_BNB13_EQ), 2896 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3, 2897 "HP bNB13", STAC_HP_BNB13_EQ), 2898 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5, 2899 "HP bNB13", STAC_HP_BNB13_EQ), 2900 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6, 2901 "HP bNB13", STAC_HP_BNB13_EQ), 2902 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900, 2903 "HP", STAC_92HD83XXX_HP_MIC_LED), 2904 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000, 2905 "HP", STAC_92HD83XXX_HP_MIC_LED), 2906 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100, 2907 "HP", STAC_92HD83XXX_HP_MIC_LED), 2908 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388, 2909 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2910 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389, 2911 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2912 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B, 2913 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2914 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C, 2915 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2916 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D, 2917 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2918 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E, 2919 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2920 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F, 2921 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2922 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560, 2923 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2924 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B, 2925 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2926 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C, 2927 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2928 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D, 2929 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2930 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591, 2931 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2932 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592, 2933 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2934 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593, 2935 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2936 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561, 2937 "HP", STAC_HP_ZEPHYR), 2938 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, 2939 "HP Mini", STAC_92HD83XXX_HP_LED), 2940 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E, 2941 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED), 2942 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a, 2943 "HP Mini", STAC_92HD83XXX_HP_LED), 2944 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP), 2945 /* match both for 0xfa91 and 0xfa93 */ 2946 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91, 2947 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD), 2948 {} /* terminator */ 2949}; 2950 2951/* HP dv7 bass switch - GPIO5 */ 2952#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info 2953static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol, 2954 struct snd_ctl_elem_value *ucontrol) 2955{ 2956 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2957 struct sigmatel_spec *spec = codec->spec; 2958 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20); 2959 return 0; 2960} 2961 2962static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol, 2963 struct snd_ctl_elem_value *ucontrol) 2964{ 2965 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2966 struct sigmatel_spec *spec = codec->spec; 2967 unsigned int gpio_data; 2968 2969 gpio_data = (spec->gpio_data & ~0x20) | 2970 (ucontrol->value.integer.value[0] ? 0x20 : 0); 2971 if (gpio_data == spec->gpio_data) 2972 return 0; 2973 spec->gpio_data = gpio_data; 2974 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 2975 return 1; 2976} 2977 2978static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { 2979 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2980 .info = stac_hp_bass_gpio_info, 2981 .get = stac_hp_bass_gpio_get, 2982 .put = stac_hp_bass_gpio_put, 2983}; 2984 2985static int stac_add_hp_bass_switch(struct hda_codec *codec) 2986{ 2987 struct sigmatel_spec *spec = codec->spec; 2988 2989 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch", 2990 &stac_hp_bass_sw_ctrl)) 2991 return -ENOMEM; 2992 2993 spec->gpio_mask |= 0x20; 2994 spec->gpio_dir |= 0x20; 2995 spec->gpio_data |= 0x20; 2996 return 0; 2997} 2998 2999static const struct hda_pintbl ref92hd71bxx_pin_configs[] = { 3000 { 0x0a, 0x02214030 }, 3001 { 0x0b, 0x02a19040 }, 3002 { 0x0c, 0x01a19020 }, 3003 { 0x0d, 0x01014010 }, 3004 { 0x0e, 0x0181302e }, 3005 { 0x0f, 0x01014010 }, 3006 { 0x14, 0x01019020 }, 3007 { 0x18, 0x90a000f0 }, 3008 { 0x19, 0x90a000f0 }, 3009 { 0x1e, 0x01452050 }, 3010 { 0x1f, 0x01452050 }, 3011 {} 3012}; 3013 3014static const struct hda_pintbl dell_m4_1_pin_configs[] = { 3015 { 0x0a, 0x0421101f }, 3016 { 0x0b, 0x04a11221 }, 3017 { 0x0c, 0x40f000f0 }, 3018 { 0x0d, 0x90170110 }, 3019 { 0x0e, 0x23a1902e }, 3020 { 0x0f, 0x23014250 }, 3021 { 0x14, 0x40f000f0 }, 3022 { 0x18, 0x90a000f0 }, 3023 { 0x19, 0x40f000f0 }, 3024 { 0x1e, 0x4f0000f0 }, 3025 { 0x1f, 0x4f0000f0 }, 3026 {} 3027}; 3028 3029static const struct hda_pintbl dell_m4_2_pin_configs[] = { 3030 { 0x0a, 0x0421101f }, 3031 { 0x0b, 0x04a11221 }, 3032 { 0x0c, 0x90a70330 }, 3033 { 0x0d, 0x90170110 }, 3034 { 0x0e, 0x23a1902e }, 3035 { 0x0f, 0x23014250 }, 3036 { 0x14, 0x40f000f0 }, 3037 { 0x18, 0x40f000f0 }, 3038 { 0x19, 0x40f000f0 }, 3039 { 0x1e, 0x044413b0 }, 3040 { 0x1f, 0x044413b0 }, 3041 {} 3042}; 3043 3044static const struct hda_pintbl dell_m4_3_pin_configs[] = { 3045 { 0x0a, 0x0421101f }, 3046 { 0x0b, 0x04a11221 }, 3047 { 0x0c, 0x90a70330 }, 3048 { 0x0d, 0x90170110 }, 3049 { 0x0e, 0x40f000f0 }, 3050 { 0x0f, 0x40f000f0 }, 3051 { 0x14, 0x40f000f0 }, 3052 { 0x18, 0x90a000f0 }, 3053 { 0x19, 0x40f000f0 }, 3054 { 0x1e, 0x044413b0 }, 3055 { 0x1f, 0x044413b0 }, 3056 {} 3057}; 3058 3059static void stac92hd71bxx_fixup_ref(struct hda_codec *codec, 3060 const struct hda_fixup *fix, int action) 3061{ 3062 struct sigmatel_spec *spec = codec->spec; 3063 3064 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3065 return; 3066 3067 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs); 3068 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 3069} 3070 3071static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec, 3072 const struct hda_fixup *fix, int action) 3073{ 3074 struct sigmatel_spec *spec = codec->spec; 3075 struct hda_jack_callback *jack; 3076 3077 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3078 return; 3079 3080 /* Enable VREF power saving on GPIO1 detect */ 3081 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 3082 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02); 3083 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg, 3084 stac_vref_event); 3085 if (!IS_ERR(jack)) 3086 jack->private_data = 0x02; 3087 3088 spec->gpio_mask |= 0x02; 3089 3090 /* enable internal microphone */ 3091 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040); 3092} 3093 3094static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec, 3095 const struct hda_fixup *fix, int action) 3096{ 3097 struct sigmatel_spec *spec = codec->spec; 3098 3099 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3100 return; 3101 spec->gpio_led = 0x01; 3102} 3103 3104static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec, 3105 const struct hda_fixup *fix, int action) 3106{ 3107 unsigned int cap; 3108 3109 switch (action) { 3110 case HDA_FIXUP_ACT_PRE_PROBE: 3111 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010); 3112 break; 3113 3114 case HDA_FIXUP_ACT_PROBE: 3115 /* enable bass on HP dv7 */ 3116 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP); 3117 cap &= AC_GPIO_IO_COUNT; 3118 if (cap >= 6) 3119 stac_add_hp_bass_switch(codec); 3120 break; 3121 } 3122} 3123 3124static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec, 3125 const struct hda_fixup *fix, int action) 3126{ 3127 struct sigmatel_spec *spec = codec->spec; 3128 3129 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3130 return; 3131 spec->gpio_led = 0x08; 3132} 3133 3134static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin) 3135{ 3136 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin); 3137 3138 /* count line-out, too, as BIOS sets often so */ 3139 return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE && 3140 (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT || 3141 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT); 3142} 3143 3144static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin) 3145{ 3146 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin); 3147 3148 /* It was changed in the BIOS to just satisfy MS DTM. 3149 * Lets turn it back into follower HP 3150 */ 3151 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) | 3152 (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT); 3153 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) | 3154 0x1f; 3155 snd_hda_codec_set_pincfg(codec, pin, pin_cfg); 3156} 3157 3158static void stac92hd71bxx_fixup_hp(struct hda_codec *codec, 3159 const struct hda_fixup *fix, int action) 3160{ 3161 struct sigmatel_spec *spec = codec->spec; 3162 3163 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3164 return; 3165 3166 /* when both output A and F are assigned, these are supposedly 3167 * dock and built-in headphones; fix both pin configs 3168 */ 3169 if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) { 3170 fixup_hp_headphone(codec, 0x0a); 3171 fixup_hp_headphone(codec, 0x0f); 3172 } 3173 3174 if (find_mute_led_cfg(codec, 1)) 3175 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 3176 spec->gpio_led, 3177 spec->gpio_led_polarity); 3178 3179} 3180 3181static const struct hda_fixup stac92hd71bxx_fixups[] = { 3182 [STAC_92HD71BXX_REF] = { 3183 .type = HDA_FIXUP_FUNC, 3184 .v.func = stac92hd71bxx_fixup_ref, 3185 }, 3186 [STAC_DELL_M4_1] = { 3187 .type = HDA_FIXUP_PINS, 3188 .v.pins = dell_m4_1_pin_configs, 3189 }, 3190 [STAC_DELL_M4_2] = { 3191 .type = HDA_FIXUP_PINS, 3192 .v.pins = dell_m4_2_pin_configs, 3193 }, 3194 [STAC_DELL_M4_3] = { 3195 .type = HDA_FIXUP_PINS, 3196 .v.pins = dell_m4_3_pin_configs, 3197 }, 3198 [STAC_HP_M4] = { 3199 .type = HDA_FIXUP_FUNC, 3200 .v.func = stac92hd71bxx_fixup_hp_m4, 3201 .chained = true, 3202 .chain_id = STAC_92HD71BXX_HP, 3203 }, 3204 [STAC_HP_DV4] = { 3205 .type = HDA_FIXUP_FUNC, 3206 .v.func = stac92hd71bxx_fixup_hp_dv4, 3207 .chained = true, 3208 .chain_id = STAC_HP_DV5, 3209 }, 3210 [STAC_HP_DV5] = { 3211 .type = HDA_FIXUP_FUNC, 3212 .v.func = stac92hd71bxx_fixup_hp_dv5, 3213 .chained = true, 3214 .chain_id = STAC_92HD71BXX_HP, 3215 }, 3216 [STAC_HP_HDX] = { 3217 .type = HDA_FIXUP_FUNC, 3218 .v.func = stac92hd71bxx_fixup_hp_hdx, 3219 .chained = true, 3220 .chain_id = STAC_92HD71BXX_HP, 3221 }, 3222 [STAC_92HD71BXX_HP] = { 3223 .type = HDA_FIXUP_FUNC, 3224 .v.func = stac92hd71bxx_fixup_hp, 3225 }, 3226}; 3227 3228static const struct hda_model_fixup stac92hd71bxx_models[] = { 3229 { .id = STAC_92HD71BXX_REF, .name = "ref" }, 3230 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" }, 3231 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" }, 3232 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" }, 3233 { .id = STAC_HP_M4, .name = "hp-m4" }, 3234 { .id = STAC_HP_DV4, .name = "hp-dv4" }, 3235 { .id = STAC_HP_DV5, .name = "hp-dv5" }, 3236 { .id = STAC_HP_HDX, .name = "hp-hdx" }, 3237 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" }, 3238 {} 3239}; 3240 3241static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = { 3242 /* SigmaTel reference board */ 3243 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3244 "DFI LanParty", STAC_92HD71BXX_REF), 3245 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3246 "DFI LanParty", STAC_92HD71BXX_REF), 3247 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720, 3248 "HP", STAC_HP_DV5), 3249 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080, 3250 "HP", STAC_HP_DV5), 3251 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0, 3252 "HP dv4-7", STAC_HP_DV4), 3253 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600, 3254 "HP dv4-7", STAC_HP_DV5), 3255 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610, 3256 "HP HDX", STAC_HP_HDX), /* HDX18 */ 3257 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a, 3258 "HP mini 1000", STAC_HP_M4), 3259 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b, 3260 "HP HDX", STAC_HP_HDX), /* HDX16 */ 3261 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620, 3262 "HP dv6", STAC_HP_DV5), 3263 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, 3264 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ 3265 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e, 3266 "HP DV6", STAC_HP_DV5), 3267 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, 3268 "HP", STAC_HP_DV5), 3269 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP), 3270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, 3271 "unknown Dell", STAC_DELL_M4_1), 3272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, 3273 "unknown Dell", STAC_DELL_M4_1), 3274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250, 3275 "unknown Dell", STAC_DELL_M4_1), 3276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f, 3277 "unknown Dell", STAC_DELL_M4_1), 3278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d, 3279 "unknown Dell", STAC_DELL_M4_1), 3280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251, 3281 "unknown Dell", STAC_DELL_M4_1), 3282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277, 3283 "unknown Dell", STAC_DELL_M4_1), 3284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263, 3285 "unknown Dell", STAC_DELL_M4_2), 3286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265, 3287 "unknown Dell", STAC_DELL_M4_2), 3288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262, 3289 "unknown Dell", STAC_DELL_M4_2), 3290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264, 3291 "unknown Dell", STAC_DELL_M4_2), 3292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa, 3293 "unknown Dell", STAC_DELL_M4_3), 3294 {} /* terminator */ 3295}; 3296 3297static const struct hda_pintbl ref922x_pin_configs[] = { 3298 { 0x0a, 0x01014010 }, 3299 { 0x0b, 0x01016011 }, 3300 { 0x0c, 0x01012012 }, 3301 { 0x0d, 0x0221401f }, 3302 { 0x0e, 0x01813122 }, 3303 { 0x0f, 0x01011014 }, 3304 { 0x10, 0x01441030 }, 3305 { 0x11, 0x01c41030 }, 3306 { 0x15, 0x40000100 }, 3307 { 0x1b, 0x40000100 }, 3308 {} 3309}; 3310 3311/* 3312 STAC 922X pin configs for 3313 102801A7 3314 102801AB 3315 102801A9 3316 102801D1 3317 102801D2 3318*/ 3319static const struct hda_pintbl dell_922x_d81_pin_configs[] = { 3320 { 0x0a, 0x02214030 }, 3321 { 0x0b, 0x01a19021 }, 3322 { 0x0c, 0x01111012 }, 3323 { 0x0d, 0x01114010 }, 3324 { 0x0e, 0x02a19020 }, 3325 { 0x0f, 0x01117011 }, 3326 { 0x10, 0x400001f0 }, 3327 { 0x11, 0x400001f1 }, 3328 { 0x15, 0x01813122 }, 3329 { 0x1b, 0x400001f2 }, 3330 {} 3331}; 3332 3333/* 3334 STAC 922X pin configs for 3335 102801AC 3336 102801D0 3337*/ 3338static const struct hda_pintbl dell_922x_d82_pin_configs[] = { 3339 { 0x0a, 0x02214030 }, 3340 { 0x0b, 0x01a19021 }, 3341 { 0x0c, 0x01111012 }, 3342 { 0x0d, 0x01114010 }, 3343 { 0x0e, 0x02a19020 }, 3344 { 0x0f, 0x01117011 }, 3345 { 0x10, 0x01451140 }, 3346 { 0x11, 0x400001f0 }, 3347 { 0x15, 0x01813122 }, 3348 { 0x1b, 0x400001f1 }, 3349 {} 3350}; 3351 3352/* 3353 STAC 922X pin configs for 3354 102801BF 3355*/ 3356static const struct hda_pintbl dell_922x_m81_pin_configs[] = { 3357 { 0x0a, 0x0321101f }, 3358 { 0x0b, 0x01112024 }, 3359 { 0x0c, 0x01111222 }, 3360 { 0x0d, 0x91174220 }, 3361 { 0x0e, 0x03a11050 }, 3362 { 0x0f, 0x01116221 }, 3363 { 0x10, 0x90a70330 }, 3364 { 0x11, 0x01452340 }, 3365 { 0x15, 0x40C003f1 }, 3366 { 0x1b, 0x405003f0 }, 3367 {} 3368}; 3369 3370/* 3371 STAC 9221 A1 pin configs for 3372 102801D7 (Dell XPS M1210) 3373*/ 3374static const struct hda_pintbl dell_922x_m82_pin_configs[] = { 3375 { 0x0a, 0x02211211 }, 3376 { 0x0b, 0x408103ff }, 3377 { 0x0c, 0x02a1123e }, 3378 { 0x0d, 0x90100310 }, 3379 { 0x0e, 0x408003f1 }, 3380 { 0x0f, 0x0221121f }, 3381 { 0x10, 0x03451340 }, 3382 { 0x11, 0x40c003f2 }, 3383 { 0x15, 0x508003f3 }, 3384 { 0x1b, 0x405003f4 }, 3385 {} 3386}; 3387 3388static const struct hda_pintbl d945gtp3_pin_configs[] = { 3389 { 0x0a, 0x0221401f }, 3390 { 0x0b, 0x01a19022 }, 3391 { 0x0c, 0x01813021 }, 3392 { 0x0d, 0x01014010 }, 3393 { 0x0e, 0x40000100 }, 3394 { 0x0f, 0x40000100 }, 3395 { 0x10, 0x40000100 }, 3396 { 0x11, 0x40000100 }, 3397 { 0x15, 0x02a19120 }, 3398 { 0x1b, 0x40000100 }, 3399 {} 3400}; 3401 3402static const struct hda_pintbl d945gtp5_pin_configs[] = { 3403 { 0x0a, 0x0221401f }, 3404 { 0x0b, 0x01011012 }, 3405 { 0x0c, 0x01813024 }, 3406 { 0x0d, 0x01014010 }, 3407 { 0x0e, 0x01a19021 }, 3408 { 0x0f, 0x01016011 }, 3409 { 0x10, 0x01452130 }, 3410 { 0x11, 0x40000100 }, 3411 { 0x15, 0x02a19320 }, 3412 { 0x1b, 0x40000100 }, 3413 {} 3414}; 3415 3416static const struct hda_pintbl intel_mac_v1_pin_configs[] = { 3417 { 0x0a, 0x0121e21f }, 3418 { 0x0b, 0x400000ff }, 3419 { 0x0c, 0x9017e110 }, 3420 { 0x0d, 0x400000fd }, 3421 { 0x0e, 0x400000fe }, 3422 { 0x0f, 0x0181e020 }, 3423 { 0x10, 0x1145e030 }, 3424 { 0x11, 0x11c5e240 }, 3425 { 0x15, 0x400000fc }, 3426 { 0x1b, 0x400000fb }, 3427 {} 3428}; 3429 3430static const struct hda_pintbl intel_mac_v2_pin_configs[] = { 3431 { 0x0a, 0x0121e21f }, 3432 { 0x0b, 0x90a7012e }, 3433 { 0x0c, 0x9017e110 }, 3434 { 0x0d, 0x400000fd }, 3435 { 0x0e, 0x400000fe }, 3436 { 0x0f, 0x0181e020 }, 3437 { 0x10, 0x1145e230 }, 3438 { 0x11, 0x500000fa }, 3439 { 0x15, 0x400000fc }, 3440 { 0x1b, 0x400000fb }, 3441 {} 3442}; 3443 3444static const struct hda_pintbl intel_mac_v3_pin_configs[] = { 3445 { 0x0a, 0x0121e21f }, 3446 { 0x0b, 0x90a7012e }, 3447 { 0x0c, 0x9017e110 }, 3448 { 0x0d, 0x400000fd }, 3449 { 0x0e, 0x400000fe }, 3450 { 0x0f, 0x0181e020 }, 3451 { 0x10, 0x1145e230 }, 3452 { 0x11, 0x11c5e240 }, 3453 { 0x15, 0x400000fc }, 3454 { 0x1b, 0x400000fb }, 3455 {} 3456}; 3457 3458static const struct hda_pintbl intel_mac_v4_pin_configs[] = { 3459 { 0x0a, 0x0321e21f }, 3460 { 0x0b, 0x03a1e02e }, 3461 { 0x0c, 0x9017e110 }, 3462 { 0x0d, 0x9017e11f }, 3463 { 0x0e, 0x400000fe }, 3464 { 0x0f, 0x0381e020 }, 3465 { 0x10, 0x1345e230 }, 3466 { 0x11, 0x13c5e240 }, 3467 { 0x15, 0x400000fc }, 3468 { 0x1b, 0x400000fb }, 3469 {} 3470}; 3471 3472static const struct hda_pintbl intel_mac_v5_pin_configs[] = { 3473 { 0x0a, 0x0321e21f }, 3474 { 0x0b, 0x03a1e02e }, 3475 { 0x0c, 0x9017e110 }, 3476 { 0x0d, 0x9017e11f }, 3477 { 0x0e, 0x400000fe }, 3478 { 0x0f, 0x0381e020 }, 3479 { 0x10, 0x1345e230 }, 3480 { 0x11, 0x13c5e240 }, 3481 { 0x15, 0x400000fc }, 3482 { 0x1b, 0x400000fb }, 3483 {} 3484}; 3485 3486static const struct hda_pintbl ecs202_pin_configs[] = { 3487 { 0x0a, 0x0221401f }, 3488 { 0x0b, 0x02a19020 }, 3489 { 0x0c, 0x01a19020 }, 3490 { 0x0d, 0x01114010 }, 3491 { 0x0e, 0x408000f0 }, 3492 { 0x0f, 0x01813022 }, 3493 { 0x10, 0x074510a0 }, 3494 { 0x11, 0x40c400f1 }, 3495 { 0x15, 0x9037012e }, 3496 { 0x1b, 0x40e000f2 }, 3497 {} 3498}; 3499 3500/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */ 3501static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = { 3502 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3), 3503 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1), 3504 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2), 3505 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2), 3506 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3), 3507 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3), 3508 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3), 3509 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3), 3510 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3), 3511 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3), 3512 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4), 3513 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5), 3514 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5), 3515 {} 3516}; 3517 3518static const struct hda_fixup stac922x_fixups[]; 3519 3520/* remap the fixup from codec SSID and apply it */ 3521static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec, 3522 const struct hda_fixup *fix, 3523 int action) 3524{ 3525 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3526 return; 3527 3528 codec->fixup_id = HDA_FIXUP_ID_NOT_SET; 3529 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl, 3530 stac922x_fixups); 3531 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET) 3532 snd_hda_apply_fixup(codec, action); 3533} 3534 3535static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec, 3536 const struct hda_fixup *fix, 3537 int action) 3538{ 3539 struct sigmatel_spec *spec = codec->spec; 3540 3541 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3542 spec->gpio_mask = spec->gpio_dir = 0x03; 3543 spec->gpio_data = 0x03; 3544 } 3545} 3546 3547static const struct hda_fixup stac922x_fixups[] = { 3548 [STAC_D945_REF] = { 3549 .type = HDA_FIXUP_PINS, 3550 .v.pins = ref922x_pin_configs, 3551 }, 3552 [STAC_D945GTP3] = { 3553 .type = HDA_FIXUP_PINS, 3554 .v.pins = d945gtp3_pin_configs, 3555 }, 3556 [STAC_D945GTP5] = { 3557 .type = HDA_FIXUP_PINS, 3558 .v.pins = d945gtp5_pin_configs, 3559 }, 3560 [STAC_INTEL_MAC_AUTO] = { 3561 .type = HDA_FIXUP_FUNC, 3562 .v.func = stac922x_fixup_intel_mac_auto, 3563 }, 3564 [STAC_INTEL_MAC_V1] = { 3565 .type = HDA_FIXUP_PINS, 3566 .v.pins = intel_mac_v1_pin_configs, 3567 .chained = true, 3568 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3569 }, 3570 [STAC_INTEL_MAC_V2] = { 3571 .type = HDA_FIXUP_PINS, 3572 .v.pins = intel_mac_v2_pin_configs, 3573 .chained = true, 3574 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3575 }, 3576 [STAC_INTEL_MAC_V3] = { 3577 .type = HDA_FIXUP_PINS, 3578 .v.pins = intel_mac_v3_pin_configs, 3579 .chained = true, 3580 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3581 }, 3582 [STAC_INTEL_MAC_V4] = { 3583 .type = HDA_FIXUP_PINS, 3584 .v.pins = intel_mac_v4_pin_configs, 3585 .chained = true, 3586 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3587 }, 3588 [STAC_INTEL_MAC_V5] = { 3589 .type = HDA_FIXUP_PINS, 3590 .v.pins = intel_mac_v5_pin_configs, 3591 .chained = true, 3592 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3593 }, 3594 [STAC_922X_INTEL_MAC_GPIO] = { 3595 .type = HDA_FIXUP_FUNC, 3596 .v.func = stac922x_fixup_intel_mac_gpio, 3597 }, 3598 [STAC_ECS_202] = { 3599 .type = HDA_FIXUP_PINS, 3600 .v.pins = ecs202_pin_configs, 3601 }, 3602 [STAC_922X_DELL_D81] = { 3603 .type = HDA_FIXUP_PINS, 3604 .v.pins = dell_922x_d81_pin_configs, 3605 }, 3606 [STAC_922X_DELL_D82] = { 3607 .type = HDA_FIXUP_PINS, 3608 .v.pins = dell_922x_d82_pin_configs, 3609 }, 3610 [STAC_922X_DELL_M81] = { 3611 .type = HDA_FIXUP_PINS, 3612 .v.pins = dell_922x_m81_pin_configs, 3613 }, 3614 [STAC_922X_DELL_M82] = { 3615 .type = HDA_FIXUP_PINS, 3616 .v.pins = dell_922x_m82_pin_configs, 3617 }, 3618}; 3619 3620static const struct hda_model_fixup stac922x_models[] = { 3621 { .id = STAC_D945_REF, .name = "ref" }, 3622 { .id = STAC_D945GTP5, .name = "5stack" }, 3623 { .id = STAC_D945GTP3, .name = "3stack" }, 3624 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" }, 3625 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" }, 3626 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" }, 3627 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" }, 3628 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" }, 3629 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" }, 3630 { .id = STAC_ECS_202, .name = "ecs202" }, 3631 { .id = STAC_922X_DELL_D81, .name = "dell-d81" }, 3632 { .id = STAC_922X_DELL_D82, .name = "dell-d82" }, 3633 { .id = STAC_922X_DELL_M81, .name = "dell-m81" }, 3634 { .id = STAC_922X_DELL_M82, .name = "dell-m82" }, 3635 /* for backward compatibility */ 3636 { .id = STAC_INTEL_MAC_V3, .name = "macmini" }, 3637 { .id = STAC_INTEL_MAC_V5, .name = "macbook" }, 3638 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" }, 3639 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" }, 3640 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" }, 3641 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" }, 3642 {} 3643}; 3644 3645static const struct snd_pci_quirk stac922x_fixup_tbl[] = { 3646 /* SigmaTel reference board */ 3647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3648 "DFI LanParty", STAC_D945_REF), 3649 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3650 "DFI LanParty", STAC_D945_REF), 3651 /* Intel 945G based systems */ 3652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, 3653 "Intel D945G", STAC_D945GTP3), 3654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, 3655 "Intel D945G", STAC_D945GTP3), 3656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, 3657 "Intel D945G", STAC_D945GTP3), 3658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, 3659 "Intel D945G", STAC_D945GTP3), 3660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, 3661 "Intel D945G", STAC_D945GTP3), 3662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, 3663 "Intel D945G", STAC_D945GTP3), 3664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, 3665 "Intel D945G", STAC_D945GTP3), 3666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, 3667 "Intel D945G", STAC_D945GTP3), 3668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, 3669 "Intel D945G", STAC_D945GTP3), 3670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, 3671 "Intel D945G", STAC_D945GTP3), 3672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, 3673 "Intel D945G", STAC_D945GTP3), 3674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, 3675 "Intel D945G", STAC_D945GTP3), 3676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, 3677 "Intel D945G", STAC_D945GTP3), 3678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, 3679 "Intel D945G", STAC_D945GTP3), 3680 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, 3681 "Intel D945G", STAC_D945GTP3), 3682 /* Intel D945G 5-stack systems */ 3683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, 3684 "Intel D945G", STAC_D945GTP5), 3685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, 3686 "Intel D945G", STAC_D945GTP5), 3687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, 3688 "Intel D945G", STAC_D945GTP5), 3689 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, 3690 "Intel D945G", STAC_D945GTP5), 3691 /* Intel 945P based systems */ 3692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, 3693 "Intel D945P", STAC_D945GTP3), 3694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, 3695 "Intel D945P", STAC_D945GTP3), 3696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, 3697 "Intel D945P", STAC_D945GTP3), 3698 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, 3699 "Intel D945P", STAC_D945GTP3), 3700 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, 3701 "Intel D945P", STAC_D945GTP3), 3702 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, 3703 "Intel D945P", STAC_D945GTP5), 3704 /* other intel */ 3705 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204, 3706 "Intel D945", STAC_D945_REF), 3707 /* other systems */ 3708 3709 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */ 3710 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO), 3711 3712 /* Dell systems */ 3713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, 3714 "unknown Dell", STAC_922X_DELL_D81), 3715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, 3716 "unknown Dell", STAC_922X_DELL_D81), 3717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, 3718 "unknown Dell", STAC_922X_DELL_D81), 3719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, 3720 "unknown Dell", STAC_922X_DELL_D82), 3721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, 3722 "unknown Dell", STAC_922X_DELL_M81), 3723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, 3724 "unknown Dell", STAC_922X_DELL_D82), 3725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, 3726 "unknown Dell", STAC_922X_DELL_D81), 3727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, 3728 "unknown Dell", STAC_922X_DELL_D81), 3729 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, 3730 "Dell XPS M1210", STAC_922X_DELL_M82), 3731 /* ECS/PC Chips boards */ 3732 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000, 3733 "ECS/PC chips", STAC_ECS_202), 3734 {} /* terminator */ 3735}; 3736 3737static const struct hda_pintbl ref927x_pin_configs[] = { 3738 { 0x0a, 0x02214020 }, 3739 { 0x0b, 0x02a19080 }, 3740 { 0x0c, 0x0181304e }, 3741 { 0x0d, 0x01014010 }, 3742 { 0x0e, 0x01a19040 }, 3743 { 0x0f, 0x01011012 }, 3744 { 0x10, 0x01016011 }, 3745 { 0x11, 0x0101201f }, 3746 { 0x12, 0x183301f0 }, 3747 { 0x13, 0x18a001f0 }, 3748 { 0x14, 0x18a001f0 }, 3749 { 0x21, 0x01442070 }, 3750 { 0x22, 0x01c42190 }, 3751 { 0x23, 0x40000100 }, 3752 {} 3753}; 3754 3755static const struct hda_pintbl d965_3st_pin_configs[] = { 3756 { 0x0a, 0x0221401f }, 3757 { 0x0b, 0x02a19120 }, 3758 { 0x0c, 0x40000100 }, 3759 { 0x0d, 0x01014011 }, 3760 { 0x0e, 0x01a19021 }, 3761 { 0x0f, 0x01813024 }, 3762 { 0x10, 0x40000100 }, 3763 { 0x11, 0x40000100 }, 3764 { 0x12, 0x40000100 }, 3765 { 0x13, 0x40000100 }, 3766 { 0x14, 0x40000100 }, 3767 { 0x21, 0x40000100 }, 3768 { 0x22, 0x40000100 }, 3769 { 0x23, 0x40000100 }, 3770 {} 3771}; 3772 3773static const struct hda_pintbl d965_5st_pin_configs[] = { 3774 { 0x0a, 0x02214020 }, 3775 { 0x0b, 0x02a19080 }, 3776 { 0x0c, 0x0181304e }, 3777 { 0x0d, 0x01014010 }, 3778 { 0x0e, 0x01a19040 }, 3779 { 0x0f, 0x01011012 }, 3780 { 0x10, 0x01016011 }, 3781 { 0x11, 0x40000100 }, 3782 { 0x12, 0x40000100 }, 3783 { 0x13, 0x40000100 }, 3784 { 0x14, 0x40000100 }, 3785 { 0x21, 0x01442070 }, 3786 { 0x22, 0x40000100 }, 3787 { 0x23, 0x40000100 }, 3788 {} 3789}; 3790 3791static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = { 3792 { 0x0a, 0x40000100 }, 3793 { 0x0b, 0x40000100 }, 3794 { 0x0c, 0x0181304e }, 3795 { 0x0d, 0x01014010 }, 3796 { 0x0e, 0x01a19040 }, 3797 { 0x0f, 0x01011012 }, 3798 { 0x10, 0x01016011 }, 3799 { 0x11, 0x40000100 }, 3800 { 0x12, 0x40000100 }, 3801 { 0x13, 0x40000100 }, 3802 { 0x14, 0x40000100 }, 3803 { 0x21, 0x01442070 }, 3804 { 0x22, 0x40000100 }, 3805 { 0x23, 0x40000100 }, 3806 {} 3807}; 3808 3809static const struct hda_pintbl dell_3st_pin_configs[] = { 3810 { 0x0a, 0x02211230 }, 3811 { 0x0b, 0x02a11220 }, 3812 { 0x0c, 0x01a19040 }, 3813 { 0x0d, 0x01114210 }, 3814 { 0x0e, 0x01111212 }, 3815 { 0x0f, 0x01116211 }, 3816 { 0x10, 0x01813050 }, 3817 { 0x11, 0x01112214 }, 3818 { 0x12, 0x403003fa }, 3819 { 0x13, 0x90a60040 }, 3820 { 0x14, 0x90a60040 }, 3821 { 0x21, 0x404003fb }, 3822 { 0x22, 0x40c003fc }, 3823 { 0x23, 0x40000100 }, 3824 {} 3825}; 3826 3827static void stac927x_fixup_ref_no_jd(struct hda_codec *codec, 3828 const struct hda_fixup *fix, int action) 3829{ 3830 /* no jack detecion for ref-no-jd model */ 3831 if (action == HDA_FIXUP_ACT_PRE_PROBE) 3832 codec->no_jack_detect = 1; 3833} 3834 3835static void stac927x_fixup_ref(struct hda_codec *codec, 3836 const struct hda_fixup *fix, int action) 3837{ 3838 struct sigmatel_spec *spec = codec->spec; 3839 3840 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3841 snd_hda_apply_pincfgs(codec, ref927x_pin_configs); 3842 spec->eapd_mask = spec->gpio_mask = 0; 3843 spec->gpio_dir = spec->gpio_data = 0; 3844 } 3845} 3846 3847static void stac927x_fixup_dell_dmic(struct hda_codec *codec, 3848 const struct hda_fixup *fix, int action) 3849{ 3850 struct sigmatel_spec *spec = codec->spec; 3851 3852 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3853 return; 3854 3855 if (codec->core.subsystem_id != 0x1028022f) { 3856 /* GPIO2 High = Enable EAPD */ 3857 spec->eapd_mask = spec->gpio_mask = 0x04; 3858 spec->gpio_dir = spec->gpio_data = 0x04; 3859 } 3860 3861 snd_hda_add_verbs(codec, dell_3st_core_init); 3862 spec->volknob_init = 1; 3863} 3864 3865static void stac927x_fixup_volknob(struct hda_codec *codec, 3866 const struct hda_fixup *fix, int action) 3867{ 3868 struct sigmatel_spec *spec = codec->spec; 3869 3870 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3871 snd_hda_add_verbs(codec, stac927x_volknob_core_init); 3872 spec->volknob_init = 1; 3873 } 3874} 3875 3876static const struct hda_fixup stac927x_fixups[] = { 3877 [STAC_D965_REF_NO_JD] = { 3878 .type = HDA_FIXUP_FUNC, 3879 .v.func = stac927x_fixup_ref_no_jd, 3880 .chained = true, 3881 .chain_id = STAC_D965_REF, 3882 }, 3883 [STAC_D965_REF] = { 3884 .type = HDA_FIXUP_FUNC, 3885 .v.func = stac927x_fixup_ref, 3886 }, 3887 [STAC_D965_3ST] = { 3888 .type = HDA_FIXUP_PINS, 3889 .v.pins = d965_3st_pin_configs, 3890 .chained = true, 3891 .chain_id = STAC_D965_VERBS, 3892 }, 3893 [STAC_D965_5ST] = { 3894 .type = HDA_FIXUP_PINS, 3895 .v.pins = d965_5st_pin_configs, 3896 .chained = true, 3897 .chain_id = STAC_D965_VERBS, 3898 }, 3899 [STAC_D965_VERBS] = { 3900 .type = HDA_FIXUP_VERBS, 3901 .v.verbs = d965_core_init, 3902 }, 3903 [STAC_D965_5ST_NO_FP] = { 3904 .type = HDA_FIXUP_PINS, 3905 .v.pins = d965_5st_no_fp_pin_configs, 3906 }, 3907 [STAC_NEMO_DEFAULT] = { 3908 .type = HDA_FIXUP_PINS, 3909 .v.pins = nemo_pin_configs, 3910 }, 3911 [STAC_DELL_3ST] = { 3912 .type = HDA_FIXUP_PINS, 3913 .v.pins = dell_3st_pin_configs, 3914 .chained = true, 3915 .chain_id = STAC_927X_DELL_DMIC, 3916 }, 3917 [STAC_DELL_BIOS] = { 3918 .type = HDA_FIXUP_PINS, 3919 .v.pins = (const struct hda_pintbl[]) { 3920 /* correct the front output jack as a hp out */ 3921 { 0x0f, 0x0221101f }, 3922 /* correct the front input jack as a mic */ 3923 { 0x0e, 0x02a79130 }, 3924 {} 3925 }, 3926 .chained = true, 3927 .chain_id = STAC_927X_DELL_DMIC, 3928 }, 3929 [STAC_DELL_BIOS_AMIC] = { 3930 .type = HDA_FIXUP_PINS, 3931 .v.pins = (const struct hda_pintbl[]) { 3932 /* configure the analog microphone on some laptops */ 3933 { 0x0c, 0x90a79130 }, 3934 {} 3935 }, 3936 .chained = true, 3937 .chain_id = STAC_DELL_BIOS, 3938 }, 3939 [STAC_DELL_BIOS_SPDIF] = { 3940 .type = HDA_FIXUP_PINS, 3941 .v.pins = (const struct hda_pintbl[]) { 3942 /* correct the device field to SPDIF out */ 3943 { 0x21, 0x01442070 }, 3944 {} 3945 }, 3946 .chained = true, 3947 .chain_id = STAC_DELL_BIOS, 3948 }, 3949 [STAC_927X_DELL_DMIC] = { 3950 .type = HDA_FIXUP_FUNC, 3951 .v.func = stac927x_fixup_dell_dmic, 3952 }, 3953 [STAC_927X_VOLKNOB] = { 3954 .type = HDA_FIXUP_FUNC, 3955 .v.func = stac927x_fixup_volknob, 3956 }, 3957}; 3958 3959static const struct hda_model_fixup stac927x_models[] = { 3960 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" }, 3961 { .id = STAC_D965_REF, .name = "ref" }, 3962 { .id = STAC_D965_3ST, .name = "3stack" }, 3963 { .id = STAC_D965_5ST, .name = "5stack" }, 3964 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" }, 3965 { .id = STAC_DELL_3ST, .name = "dell-3stack" }, 3966 { .id = STAC_DELL_BIOS, .name = "dell-bios" }, 3967 { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" }, 3968 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" }, 3969 { .id = STAC_927X_VOLKNOB, .name = "volknob" }, 3970 {} 3971}; 3972 3973static const struct snd_pci_quirk stac927x_fixup_tbl[] = { 3974 /* SigmaTel reference board */ 3975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3976 "DFI LanParty", STAC_D965_REF), 3977 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3978 "DFI LanParty", STAC_D965_REF), 3979 /* Intel 946 based systems */ 3980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), 3981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), 3982 /* 965 based 3 stack systems */ 3983 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100, 3984 "Intel D965", STAC_D965_3ST), 3985 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000, 3986 "Intel D965", STAC_D965_3ST), 3987 /* Dell 3 stack systems */ 3988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), 3989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), 3990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), 3991 /* Dell 3 stack systems with verb table in BIOS */ 3992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), 3993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS), 3994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), 3995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF), 3996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS), 3997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), 3998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), 3999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), 4000 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF), 4001 /* 965 based 5 stack systems */ 4002 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300, 4003 "Intel D965", STAC_D965_5ST), 4004 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500, 4005 "Intel D965", STAC_D965_5ST), 4006 /* Nemo */ 4007 SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT), 4008 /* volume-knob fixes */ 4009 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB), 4010 {} /* terminator */ 4011}; 4012 4013static const struct hda_pintbl ref9205_pin_configs[] = { 4014 { 0x0a, 0x40000100 }, 4015 { 0x0b, 0x40000100 }, 4016 { 0x0c, 0x01016011 }, 4017 { 0x0d, 0x01014010 }, 4018 { 0x0e, 0x01813122 }, 4019 { 0x0f, 0x01a19021 }, 4020 { 0x14, 0x01019020 }, 4021 { 0x16, 0x40000100 }, 4022 { 0x17, 0x90a000f0 }, 4023 { 0x18, 0x90a000f0 }, 4024 { 0x21, 0x01441030 }, 4025 { 0x22, 0x01c41030 }, 4026 {} 4027}; 4028 4029/* 4030 STAC 9205 pin configs for 4031 102801F1 4032 102801F2 4033 102801FC 4034 102801FD 4035 10280204 4036 1028021F 4037 10280228 (Dell Vostro 1500) 4038 10280229 (Dell Vostro 1700) 4039*/ 4040static const struct hda_pintbl dell_9205_m42_pin_configs[] = { 4041 { 0x0a, 0x0321101F }, 4042 { 0x0b, 0x03A11020 }, 4043 { 0x0c, 0x400003FA }, 4044 { 0x0d, 0x90170310 }, 4045 { 0x0e, 0x400003FB }, 4046 { 0x0f, 0x400003FC }, 4047 { 0x14, 0x400003FD }, 4048 { 0x16, 0x40F000F9 }, 4049 { 0x17, 0x90A60330 }, 4050 { 0x18, 0x400003FF }, 4051 { 0x21, 0x0144131F }, 4052 { 0x22, 0x40C003FE }, 4053 {} 4054}; 4055 4056/* 4057 STAC 9205 pin configs for 4058 102801F9 4059 102801FA 4060 102801FE 4061 102801FF (Dell Precision M4300) 4062 10280206 4063 10280200 4064 10280201 4065*/ 4066static const struct hda_pintbl dell_9205_m43_pin_configs[] = { 4067 { 0x0a, 0x0321101f }, 4068 { 0x0b, 0x03a11020 }, 4069 { 0x0c, 0x90a70330 }, 4070 { 0x0d, 0x90170310 }, 4071 { 0x0e, 0x400000fe }, 4072 { 0x0f, 0x400000ff }, 4073 { 0x14, 0x400000fd }, 4074 { 0x16, 0x40f000f9 }, 4075 { 0x17, 0x400000fa }, 4076 { 0x18, 0x400000fc }, 4077 { 0x21, 0x0144131f }, 4078 { 0x22, 0x40c003f8 }, 4079 /* Enable SPDIF in/out */ 4080 { 0x1f, 0x01441030 }, 4081 { 0x20, 0x1c410030 }, 4082 {} 4083}; 4084 4085static const struct hda_pintbl dell_9205_m44_pin_configs[] = { 4086 { 0x0a, 0x0421101f }, 4087 { 0x0b, 0x04a11020 }, 4088 { 0x0c, 0x400003fa }, 4089 { 0x0d, 0x90170310 }, 4090 { 0x0e, 0x400003fb }, 4091 { 0x0f, 0x400003fc }, 4092 { 0x14, 0x400003fd }, 4093 { 0x16, 0x400003f9 }, 4094 { 0x17, 0x90a60330 }, 4095 { 0x18, 0x400003ff }, 4096 { 0x21, 0x01441340 }, 4097 { 0x22, 0x40c003fe }, 4098 {} 4099}; 4100 4101static void stac9205_fixup_ref(struct hda_codec *codec, 4102 const struct hda_fixup *fix, int action) 4103{ 4104 struct sigmatel_spec *spec = codec->spec; 4105 4106 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4107 snd_hda_apply_pincfgs(codec, ref9205_pin_configs); 4108 /* SPDIF-In enabled */ 4109 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0; 4110 } 4111} 4112 4113static void stac9205_fixup_dell_m43(struct hda_codec *codec, 4114 const struct hda_fixup *fix, int action) 4115{ 4116 struct sigmatel_spec *spec = codec->spec; 4117 struct hda_jack_callback *jack; 4118 4119 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4120 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs); 4121 4122 /* Enable unsol response for GPIO4/Dock HP connection */ 4123 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 4124 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10); 4125 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg, 4126 stac_vref_event); 4127 if (!IS_ERR(jack)) 4128 jack->private_data = 0x01; 4129 4130 spec->gpio_dir = 0x0b; 4131 spec->eapd_mask = 0x01; 4132 spec->gpio_mask = 0x1b; 4133 spec->gpio_mute = 0x10; 4134 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute, 4135 * GPIO3 Low = DRM 4136 */ 4137 spec->gpio_data = 0x01; 4138 } 4139} 4140 4141static void stac9205_fixup_eapd(struct hda_codec *codec, 4142 const struct hda_fixup *fix, int action) 4143{ 4144 struct sigmatel_spec *spec = codec->spec; 4145 4146 if (action == HDA_FIXUP_ACT_PRE_PROBE) 4147 spec->eapd_switch = 0; 4148} 4149 4150static const struct hda_fixup stac9205_fixups[] = { 4151 [STAC_9205_REF] = { 4152 .type = HDA_FIXUP_FUNC, 4153 .v.func = stac9205_fixup_ref, 4154 }, 4155 [STAC_9205_DELL_M42] = { 4156 .type = HDA_FIXUP_PINS, 4157 .v.pins = dell_9205_m42_pin_configs, 4158 }, 4159 [STAC_9205_DELL_M43] = { 4160 .type = HDA_FIXUP_FUNC, 4161 .v.func = stac9205_fixup_dell_m43, 4162 }, 4163 [STAC_9205_DELL_M44] = { 4164 .type = HDA_FIXUP_PINS, 4165 .v.pins = dell_9205_m44_pin_configs, 4166 }, 4167 [STAC_9205_EAPD] = { 4168 .type = HDA_FIXUP_FUNC, 4169 .v.func = stac9205_fixup_eapd, 4170 }, 4171 {} 4172}; 4173 4174static const struct hda_model_fixup stac9205_models[] = { 4175 { .id = STAC_9205_REF, .name = "ref" }, 4176 { .id = STAC_9205_DELL_M42, .name = "dell-m42" }, 4177 { .id = STAC_9205_DELL_M43, .name = "dell-m43" }, 4178 { .id = STAC_9205_DELL_M44, .name = "dell-m44" }, 4179 { .id = STAC_9205_EAPD, .name = "eapd" }, 4180 {} 4181}; 4182 4183static const struct snd_pci_quirk stac9205_fixup_tbl[] = { 4184 /* SigmaTel reference board */ 4185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 4186 "DFI LanParty", STAC_9205_REF), 4187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 4188 "SigmaTel", STAC_9205_REF), 4189 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 4190 "DFI LanParty", STAC_9205_REF), 4191 /* Dell */ 4192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, 4193 "unknown Dell", STAC_9205_DELL_M42), 4194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, 4195 "unknown Dell", STAC_9205_DELL_M42), 4196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, 4197 "Dell Precision", STAC_9205_DELL_M43), 4198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, 4199 "Dell Precision", STAC_9205_DELL_M43), 4200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, 4201 "Dell Precision", STAC_9205_DELL_M43), 4202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, 4203 "unknown Dell", STAC_9205_DELL_M42), 4204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, 4205 "unknown Dell", STAC_9205_DELL_M42), 4206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, 4207 "Dell Precision", STAC_9205_DELL_M43), 4208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, 4209 "Dell Precision M4300", STAC_9205_DELL_M43), 4210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, 4211 "unknown Dell", STAC_9205_DELL_M42), 4212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, 4213 "Dell Precision", STAC_9205_DELL_M43), 4214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, 4215 "Dell Precision", STAC_9205_DELL_M43), 4216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, 4217 "Dell Precision", STAC_9205_DELL_M43), 4218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, 4219 "Dell Inspiron", STAC_9205_DELL_M44), 4220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228, 4221 "Dell Vostro 1500", STAC_9205_DELL_M42), 4222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229, 4223 "Dell Vostro 1700", STAC_9205_DELL_M42), 4224 /* Gateway */ 4225 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD), 4226 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD), 4227 {} /* terminator */ 4228}; 4229 4230static void stac92hd95_fixup_hp_led(struct hda_codec *codec, 4231 const struct hda_fixup *fix, int action) 4232{ 4233 struct sigmatel_spec *spec = codec->spec; 4234 4235 if (action != HDA_FIXUP_ACT_PRE_PROBE) 4236 return; 4237 4238 if (find_mute_led_cfg(codec, spec->default_polarity)) 4239 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 4240 spec->gpio_led, 4241 spec->gpio_led_polarity); 4242} 4243 4244static const struct hda_fixup stac92hd95_fixups[] = { 4245 [STAC_92HD95_HP_LED] = { 4246 .type = HDA_FIXUP_FUNC, 4247 .v.func = stac92hd95_fixup_hp_led, 4248 }, 4249 [STAC_92HD95_HP_BASS] = { 4250 .type = HDA_FIXUP_VERBS, 4251 .v.verbs = (const struct hda_verb[]) { 4252 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */ 4253 {} 4254 }, 4255 .chained = true, 4256 .chain_id = STAC_92HD95_HP_LED, 4257 }, 4258}; 4259 4260static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = { 4261 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS), 4262 {} /* terminator */ 4263}; 4264 4265static const struct hda_model_fixup stac92hd95_models[] = { 4266 { .id = STAC_92HD95_HP_LED, .name = "hp-led" }, 4267 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" }, 4268 {} 4269}; 4270 4271 4272static int stac_parse_auto_config(struct hda_codec *codec) 4273{ 4274 struct sigmatel_spec *spec = codec->spec; 4275 int err; 4276 int flags = 0; 4277 4278 if (spec->headset_jack) 4279 flags |= HDA_PINCFG_HEADSET_MIC; 4280 4281 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags); 4282 if (err < 0) 4283 return err; 4284 4285 /* add hooks */ 4286 spec->gen.pcm_playback_hook = stac_playback_pcm_hook; 4287 spec->gen.pcm_capture_hook = stac_capture_pcm_hook; 4288 4289 spec->gen.automute_hook = stac_update_outputs; 4290 4291 if (spec->gpio_led) 4292 snd_hda_gen_add_mute_led_cdev(codec, stac_vmaster_hook); 4293 4294 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); 4295 if (err < 0) 4296 return err; 4297 4298 if (spec->vref_mute_led_nid) { 4299 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid); 4300 if (err < 0) 4301 return err; 4302 } 4303 4304 /* setup analog beep controls */ 4305 if (spec->anabeep_nid > 0) { 4306 err = stac_auto_create_beep_ctls(codec, 4307 spec->anabeep_nid); 4308 if (err < 0) 4309 return err; 4310 } 4311 4312 /* setup digital beep controls and input device */ 4313#ifdef CONFIG_SND_HDA_INPUT_BEEP 4314 if (spec->gen.beep_nid) { 4315 hda_nid_t nid = spec->gen.beep_nid; 4316 unsigned int caps; 4317 4318 err = stac_auto_create_beep_ctls(codec, nid); 4319 if (err < 0) 4320 return err; 4321 if (codec->beep) { 4322 /* IDT/STAC codecs have linear beep tone parameter */ 4323 codec->beep->linear_tone = spec->linear_tone_beep; 4324 /* keep power up while beep is enabled */ 4325 codec->beep->keep_power_at_enable = 1; 4326 /* if no beep switch is available, make its own one */ 4327 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 4328 if (!(caps & AC_AMPCAP_MUTE)) { 4329 err = stac_beep_switch_ctl(codec); 4330 if (err < 0) 4331 return err; 4332 } 4333 } 4334 } 4335#endif 4336 4337 if (spec->aloopback_ctl && 4338 snd_hda_get_bool_hint(codec, "loopback") == 1) { 4339 unsigned int wr_verb = 4340 spec->aloopback_ctl->private_value >> 16; 4341 if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb)) 4342 return -ENOMEM; 4343 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl)) 4344 return -ENOMEM; 4345 } 4346 4347 if (spec->have_spdif_mux) { 4348 err = stac_create_spdif_mux_ctls(codec); 4349 if (err < 0) 4350 return err; 4351 } 4352 4353 stac_init_power_map(codec); 4354 4355 return 0; 4356} 4357 4358static int stac_init(struct hda_codec *codec) 4359{ 4360 struct sigmatel_spec *spec = codec->spec; 4361 int i; 4362 4363 /* override some hints */ 4364 stac_store_hints(codec); 4365 4366 /* set up GPIO */ 4367 /* turn on EAPD statically when spec->eapd_switch isn't set. 4368 * otherwise, unsol event will turn it on/off dynamically 4369 */ 4370 if (!spec->eapd_switch) 4371 spec->gpio_data |= spec->eapd_mask; 4372 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 4373 4374 snd_hda_gen_init(codec); 4375 4376 /* sync the power-map */ 4377 if (spec->num_pwrs) 4378 snd_hda_codec_write(codec, codec->core.afg, 0, 4379 AC_VERB_IDT_SET_POWER_MAP, 4380 spec->power_map_bits); 4381 4382 /* power down inactive ADCs */ 4383 if (spec->powerdown_adcs) { 4384 for (i = 0; i < spec->gen.num_all_adcs; i++) { 4385 if (spec->active_adcs & (1 << i)) 4386 continue; 4387 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0, 4388 AC_VERB_SET_POWER_STATE, 4389 AC_PWRST_D3); 4390 } 4391 } 4392 4393 return 0; 4394} 4395 4396#define stac_free snd_hda_gen_free 4397 4398#ifdef CONFIG_SND_PROC_FS 4399static void stac92hd_proc_hook(struct snd_info_buffer *buffer, 4400 struct hda_codec *codec, hda_nid_t nid) 4401{ 4402 if (nid == codec->core.afg) 4403 snd_iprintf(buffer, "Power-Map: 0x%02x\n", 4404 snd_hda_codec_read(codec, nid, 0, 4405 AC_VERB_IDT_GET_POWER_MAP, 0)); 4406} 4407 4408static void analog_loop_proc_hook(struct snd_info_buffer *buffer, 4409 struct hda_codec *codec, 4410 unsigned int verb) 4411{ 4412 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n", 4413 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0)); 4414} 4415 4416/* stac92hd71bxx, stac92hd73xx */ 4417static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer, 4418 struct hda_codec *codec, hda_nid_t nid) 4419{ 4420 stac92hd_proc_hook(buffer, codec, nid); 4421 if (nid == codec->core.afg) 4422 analog_loop_proc_hook(buffer, codec, 0xfa0); 4423} 4424 4425static void stac9205_proc_hook(struct snd_info_buffer *buffer, 4426 struct hda_codec *codec, hda_nid_t nid) 4427{ 4428 if (nid == codec->core.afg) 4429 analog_loop_proc_hook(buffer, codec, 0xfe0); 4430} 4431 4432static void stac927x_proc_hook(struct snd_info_buffer *buffer, 4433 struct hda_codec *codec, hda_nid_t nid) 4434{ 4435 if (nid == codec->core.afg) 4436 analog_loop_proc_hook(buffer, codec, 0xfeb); 4437} 4438#else 4439#define stac92hd_proc_hook NULL 4440#define stac92hd7x_proc_hook NULL 4441#define stac9205_proc_hook NULL 4442#define stac927x_proc_hook NULL 4443#endif 4444 4445#ifdef CONFIG_PM 4446static int stac_suspend(struct hda_codec *codec) 4447{ 4448 struct sigmatel_spec *spec = codec->spec; 4449 4450 snd_hda_shutup_pins(codec); 4451 4452 if (spec->eapd_mask) 4453 stac_gpio_set(codec, spec->gpio_mask, 4454 spec->gpio_dir, spec->gpio_data & 4455 ~spec->eapd_mask); 4456 4457 return 0; 4458} 4459#else 4460#define stac_suspend NULL 4461#endif /* CONFIG_PM */ 4462 4463static const struct hda_codec_ops stac_patch_ops = { 4464 .build_controls = snd_hda_gen_build_controls, 4465 .build_pcms = snd_hda_gen_build_pcms, 4466 .init = stac_init, 4467 .free = stac_free, 4468 .unsol_event = snd_hda_jack_unsol_event, 4469#ifdef CONFIG_PM 4470 .suspend = stac_suspend, 4471#endif 4472}; 4473 4474static int alloc_stac_spec(struct hda_codec *codec) 4475{ 4476 struct sigmatel_spec *spec; 4477 4478 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 4479 if (!spec) 4480 return -ENOMEM; 4481 snd_hda_gen_spec_init(&spec->gen); 4482 codec->spec = spec; 4483 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */ 4484 spec->gen.dac_min_mute = true; 4485 codec->patch_ops = stac_patch_ops; 4486 return 0; 4487} 4488 4489static int patch_stac9200(struct hda_codec *codec) 4490{ 4491 struct sigmatel_spec *spec; 4492 int err; 4493 4494 err = alloc_stac_spec(codec); 4495 if (err < 0) 4496 return err; 4497 4498 spec = codec->spec; 4499 spec->linear_tone_beep = 1; 4500 spec->gen.own_eapd_ctl = 1; 4501 4502 codec->power_filter = snd_hda_codec_eapd_power_filter; 4503 4504 snd_hda_add_verbs(codec, stac9200_eapd_init); 4505 4506 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl, 4507 stac9200_fixups); 4508 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4509 4510 err = stac_parse_auto_config(codec); 4511 if (err < 0) { 4512 stac_free(codec); 4513 return err; 4514 } 4515 4516 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4517 4518 return 0; 4519} 4520 4521static int patch_stac925x(struct hda_codec *codec) 4522{ 4523 struct sigmatel_spec *spec; 4524 int err; 4525 4526 err = alloc_stac_spec(codec); 4527 if (err < 0) 4528 return err; 4529 4530 spec = codec->spec; 4531 spec->linear_tone_beep = 1; 4532 spec->gen.own_eapd_ctl = 1; 4533 4534 snd_hda_add_verbs(codec, stac925x_core_init); 4535 4536 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl, 4537 stac925x_fixups); 4538 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4539 4540 err = stac_parse_auto_config(codec); 4541 if (err < 0) { 4542 stac_free(codec); 4543 return err; 4544 } 4545 4546 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4547 4548 return 0; 4549} 4550 4551static int patch_stac92hd73xx(struct hda_codec *codec) 4552{ 4553 struct sigmatel_spec *spec; 4554 int err; 4555 int num_dacs; 4556 4557 err = alloc_stac_spec(codec); 4558 if (err < 0) 4559 return err; 4560 4561 spec = codec->spec; 4562 /* enable power_save_node only for new 92HD89xx chips, as it causes 4563 * click noises on old 92HD73xx chips. 4564 */ 4565 if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670) 4566 codec->power_save_node = 1; 4567 spec->linear_tone_beep = 0; 4568 spec->gen.mixer_nid = 0x1d; 4569 spec->have_spdif_mux = 1; 4570 4571 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1; 4572 if (num_dacs < 3 || num_dacs > 5) { 4573 codec_warn(codec, 4574 "Could not determine number of channels defaulting to DAC count\n"); 4575 num_dacs = 5; 4576 } 4577 4578 switch (num_dacs) { 4579 case 0x3: /* 6 Channel */ 4580 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback; 4581 break; 4582 case 0x4: /* 8 Channel */ 4583 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback; 4584 break; 4585 case 0x5: /* 10 Channel */ 4586 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback; 4587 break; 4588 } 4589 4590 spec->aloopback_mask = 0x01; 4591 spec->aloopback_shift = 8; 4592 4593 spec->gen.beep_nid = 0x1c; /* digital beep */ 4594 4595 /* GPIO0 High = Enable EAPD */ 4596 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4597 spec->gpio_data = 0x01; 4598 4599 spec->eapd_switch = 1; 4600 4601 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids); 4602 spec->pwr_nids = stac92hd73xx_pwr_nids; 4603 4604 spec->gen.own_eapd_ctl = 1; 4605 spec->gen.power_down_unused = 1; 4606 4607 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl, 4608 stac92hd73xx_fixups); 4609 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4610 4611 if (!spec->volknob_init) 4612 snd_hda_add_verbs(codec, stac92hd73xx_core_init); 4613 4614 err = stac_parse_auto_config(codec); 4615 if (err < 0) { 4616 stac_free(codec); 4617 return err; 4618 } 4619 4620 /* Don't GPIO-mute speakers if there are no internal speakers, because 4621 * the GPIO might be necessary for Headphone 4622 */ 4623 if (spec->eapd_switch && !has_builtin_speaker(codec)) 4624 spec->eapd_switch = 0; 4625 4626 codec->proc_widget_hook = stac92hd7x_proc_hook; 4627 4628 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4629 4630 return 0; 4631} 4632 4633static void stac_setup_gpio(struct hda_codec *codec) 4634{ 4635 struct sigmatel_spec *spec = codec->spec; 4636 4637 spec->gpio_mask |= spec->eapd_mask; 4638 if (spec->gpio_led) { 4639 if (!spec->vref_mute_led_nid) { 4640 spec->gpio_mask |= spec->gpio_led; 4641 spec->gpio_dir |= spec->gpio_led; 4642 spec->gpio_data |= spec->gpio_led; 4643 } else { 4644 codec->power_filter = stac_vref_led_power_filter; 4645 } 4646 } 4647 4648 if (spec->mic_mute_led_gpio) { 4649 spec->gpio_mask |= spec->mic_mute_led_gpio; 4650 spec->gpio_dir |= spec->mic_mute_led_gpio; 4651 spec->mic_enabled = 0; 4652 spec->gpio_data |= spec->mic_mute_led_gpio; 4653 snd_hda_gen_add_micmute_led_cdev(codec, stac_capture_led_update); 4654 } 4655} 4656 4657static int patch_stac92hd83xxx(struct hda_codec *codec) 4658{ 4659 struct sigmatel_spec *spec; 4660 int err; 4661 4662 err = alloc_stac_spec(codec); 4663 if (err < 0) 4664 return err; 4665 4666 /* longer delay needed for D3 */ 4667 codec->core.power_caps &= ~AC_PWRST_EPSS; 4668 4669 spec = codec->spec; 4670 codec->power_save_node = 1; 4671 spec->linear_tone_beep = 0; 4672 spec->gen.own_eapd_ctl = 1; 4673 spec->gen.power_down_unused = 1; 4674 spec->gen.mixer_nid = 0x1b; 4675 4676 spec->gen.beep_nid = 0x21; /* digital beep */ 4677 spec->pwr_nids = stac92hd83xxx_pwr_nids; 4678 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); 4679 spec->default_polarity = -1; /* no default cfg */ 4680 4681 snd_hda_add_verbs(codec, stac92hd83xxx_core_init); 4682 4683 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl, 4684 stac92hd83xxx_fixups); 4685 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4686 4687 stac_setup_gpio(codec); 4688 4689 err = stac_parse_auto_config(codec); 4690 if (err < 0) { 4691 stac_free(codec); 4692 return err; 4693 } 4694 4695 codec->proc_widget_hook = stac92hd_proc_hook; 4696 4697 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4698 4699 return 0; 4700} 4701 4702static const hda_nid_t stac92hd95_pwr_nids[] = { 4703 0x0a, 0x0b, 0x0c, 0x0d 4704}; 4705 4706static int patch_stac92hd95(struct hda_codec *codec) 4707{ 4708 struct sigmatel_spec *spec; 4709 int err; 4710 4711 err = alloc_stac_spec(codec); 4712 if (err < 0) 4713 return err; 4714 4715 /* longer delay needed for D3 */ 4716 codec->core.power_caps &= ~AC_PWRST_EPSS; 4717 4718 spec = codec->spec; 4719 codec->power_save_node = 1; 4720 spec->linear_tone_beep = 0; 4721 spec->gen.own_eapd_ctl = 1; 4722 spec->gen.power_down_unused = 1; 4723 4724 spec->gen.beep_nid = 0x19; /* digital beep */ 4725 spec->pwr_nids = stac92hd95_pwr_nids; 4726 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids); 4727 spec->default_polarity = 0; 4728 4729 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl, 4730 stac92hd95_fixups); 4731 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4732 4733 stac_setup_gpio(codec); 4734 4735 err = stac_parse_auto_config(codec); 4736 if (err < 0) { 4737 stac_free(codec); 4738 return err; 4739 } 4740 4741 codec->proc_widget_hook = stac92hd_proc_hook; 4742 4743 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4744 4745 return 0; 4746} 4747 4748static int patch_stac92hd71bxx(struct hda_codec *codec) 4749{ 4750 struct sigmatel_spec *spec; 4751 const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids; 4752 int err; 4753 4754 err = alloc_stac_spec(codec); 4755 if (err < 0) 4756 return err; 4757 4758 spec = codec->spec; 4759 /* disabled power_save_node since it causes noises on a Dell machine */ 4760 /* codec->power_save_node = 1; */ 4761 spec->linear_tone_beep = 0; 4762 spec->gen.own_eapd_ctl = 1; 4763 spec->gen.power_down_unused = 1; 4764 spec->gen.mixer_nid = 0x17; 4765 spec->have_spdif_mux = 1; 4766 4767 /* GPIO0 = EAPD */ 4768 spec->gpio_mask = 0x01; 4769 spec->gpio_dir = 0x01; 4770 spec->gpio_data = 0x01; 4771 4772 switch (codec->core.vendor_id) { 4773 case 0x111d76b6: /* 4 Port without Analog Mixer */ 4774 case 0x111d76b7: 4775 unmute_nids++; 4776 break; 4777 case 0x111d7608: /* 5 Port with Analog Mixer */ 4778 if ((codec->core.revision_id & 0xf) == 0 || 4779 (codec->core.revision_id & 0xf) == 1) 4780 spec->stream_delay = 40; /* 40 milliseconds */ 4781 4782 /* disable VSW */ 4783 unmute_nids++; 4784 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); 4785 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); 4786 break; 4787 case 0x111d7603: /* 6 Port with Analog Mixer */ 4788 if ((codec->core.revision_id & 0xf) == 1) 4789 spec->stream_delay = 40; /* 40 milliseconds */ 4790 4791 break; 4792 } 4793 4794 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB) 4795 snd_hda_add_verbs(codec, stac92hd71bxx_core_init); 4796 4797 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) { 4798 const hda_nid_t *p; 4799 for (p = unmute_nids; *p; p++) 4800 snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0, 4801 0xff, 0x00); 4802 } 4803 4804 spec->aloopback_ctl = &stac92hd71bxx_loopback; 4805 spec->aloopback_mask = 0x50; 4806 spec->aloopback_shift = 0; 4807 4808 spec->powerdown_adcs = 1; 4809 spec->gen.beep_nid = 0x26; /* digital beep */ 4810 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids); 4811 spec->pwr_nids = stac92hd71bxx_pwr_nids; 4812 4813 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl, 4814 stac92hd71bxx_fixups); 4815 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4816 4817 stac_setup_gpio(codec); 4818 4819 err = stac_parse_auto_config(codec); 4820 if (err < 0) { 4821 stac_free(codec); 4822 return err; 4823 } 4824 4825 codec->proc_widget_hook = stac92hd7x_proc_hook; 4826 4827 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4828 4829 return 0; 4830} 4831 4832static int patch_stac922x(struct hda_codec *codec) 4833{ 4834 struct sigmatel_spec *spec; 4835 int err; 4836 4837 err = alloc_stac_spec(codec); 4838 if (err < 0) 4839 return err; 4840 4841 spec = codec->spec; 4842 spec->linear_tone_beep = 1; 4843 spec->gen.own_eapd_ctl = 1; 4844 4845 snd_hda_add_verbs(codec, stac922x_core_init); 4846 4847 /* Fix Mux capture level; max to 2 */ 4848 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, 4849 (0 << AC_AMPCAP_OFFSET_SHIFT) | 4850 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | 4851 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | 4852 (0 << AC_AMPCAP_MUTE_SHIFT)); 4853 4854 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl, 4855 stac922x_fixups); 4856 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4857 4858 err = stac_parse_auto_config(codec); 4859 if (err < 0) { 4860 stac_free(codec); 4861 return err; 4862 } 4863 4864 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4865 4866 return 0; 4867} 4868 4869static const char * const stac927x_spdif_labels[] = { 4870 "Digital Playback", "ADAT", "Analog Mux 1", 4871 "Analog Mux 2", "Analog Mux 3", NULL 4872}; 4873 4874static int patch_stac927x(struct hda_codec *codec) 4875{ 4876 struct sigmatel_spec *spec; 4877 int err; 4878 4879 err = alloc_stac_spec(codec); 4880 if (err < 0) 4881 return err; 4882 4883 spec = codec->spec; 4884 spec->linear_tone_beep = 1; 4885 spec->gen.own_eapd_ctl = 1; 4886 spec->have_spdif_mux = 1; 4887 spec->spdif_labels = stac927x_spdif_labels; 4888 4889 spec->gen.beep_nid = 0x23; /* digital beep */ 4890 4891 /* GPIO0 High = Enable EAPD */ 4892 spec->eapd_mask = spec->gpio_mask = 0x01; 4893 spec->gpio_dir = spec->gpio_data = 0x01; 4894 4895 spec->aloopback_ctl = &stac927x_loopback; 4896 spec->aloopback_mask = 0x40; 4897 spec->aloopback_shift = 0; 4898 spec->eapd_switch = 1; 4899 4900 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl, 4901 stac927x_fixups); 4902 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4903 4904 if (!spec->volknob_init) 4905 snd_hda_add_verbs(codec, stac927x_core_init); 4906 4907 err = stac_parse_auto_config(codec); 4908 if (err < 0) { 4909 stac_free(codec); 4910 return err; 4911 } 4912 4913 codec->proc_widget_hook = stac927x_proc_hook; 4914 4915 /* 4916 * !!FIXME!! 4917 * The STAC927x seem to require fairly long delays for certain 4918 * command sequences. With too short delays (even if the answer 4919 * is set to RIRB properly), it results in the silence output 4920 * on some hardwares like Dell. 4921 * 4922 * The below flag enables the longer delay (see get_response 4923 * in hda_intel.c). 4924 */ 4925 codec->bus->core.needs_damn_long_delay = 1; 4926 4927 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4928 4929 return 0; 4930} 4931 4932static int patch_stac9205(struct hda_codec *codec) 4933{ 4934 struct sigmatel_spec *spec; 4935 int err; 4936 4937 err = alloc_stac_spec(codec); 4938 if (err < 0) 4939 return err; 4940 4941 spec = codec->spec; 4942 spec->linear_tone_beep = 1; 4943 spec->gen.own_eapd_ctl = 1; 4944 spec->have_spdif_mux = 1; 4945 4946 spec->gen.beep_nid = 0x23; /* digital beep */ 4947 4948 snd_hda_add_verbs(codec, stac9205_core_init); 4949 spec->aloopback_ctl = &stac9205_loopback; 4950 4951 spec->aloopback_mask = 0x40; 4952 spec->aloopback_shift = 0; 4953 4954 /* GPIO0 High = EAPD */ 4955 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4956 spec->gpio_data = 0x01; 4957 4958 /* Turn on/off EAPD per HP plugging */ 4959 spec->eapd_switch = 1; 4960 4961 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl, 4962 stac9205_fixups); 4963 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4964 4965 err = stac_parse_auto_config(codec); 4966 if (err < 0) { 4967 stac_free(codec); 4968 return err; 4969 } 4970 4971 codec->proc_widget_hook = stac9205_proc_hook; 4972 4973 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4974 4975 return 0; 4976} 4977 4978/* 4979 * STAC9872 hack 4980 */ 4981 4982static const struct hda_verb stac9872_core_init[] = { 4983 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ 4984 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ 4985 {} 4986}; 4987 4988static const struct hda_pintbl stac9872_vaio_pin_configs[] = { 4989 { 0x0a, 0x03211020 }, 4990 { 0x0b, 0x411111f0 }, 4991 { 0x0c, 0x411111f0 }, 4992 { 0x0d, 0x03a15030 }, 4993 { 0x0e, 0x411111f0 }, 4994 { 0x0f, 0x90170110 }, 4995 { 0x11, 0x411111f0 }, 4996 { 0x13, 0x411111f0 }, 4997 { 0x14, 0x90a7013e }, 4998 {} 4999}; 5000 5001static const struct hda_model_fixup stac9872_models[] = { 5002 { .id = STAC_9872_VAIO, .name = "vaio" }, 5003 {} 5004}; 5005 5006static const struct hda_fixup stac9872_fixups[] = { 5007 [STAC_9872_VAIO] = { 5008 .type = HDA_FIXUP_PINS, 5009 .v.pins = stac9872_vaio_pin_configs, 5010 }, 5011}; 5012 5013static const struct snd_pci_quirk stac9872_fixup_tbl[] = { 5014 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, 5015 "Sony VAIO F/S", STAC_9872_VAIO), 5016 {} /* terminator */ 5017}; 5018 5019static int patch_stac9872(struct hda_codec *codec) 5020{ 5021 struct sigmatel_spec *spec; 5022 int err; 5023 5024 err = alloc_stac_spec(codec); 5025 if (err < 0) 5026 return err; 5027 5028 spec = codec->spec; 5029 spec->linear_tone_beep = 1; 5030 spec->gen.own_eapd_ctl = 1; 5031 5032 snd_hda_add_verbs(codec, stac9872_core_init); 5033 5034 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl, 5035 stac9872_fixups); 5036 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 5037 5038 err = stac_parse_auto_config(codec); 5039 if (err < 0) { 5040 stac_free(codec); 5041 return -EINVAL; 5042 } 5043 5044 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 5045 5046 return 0; 5047} 5048 5049 5050/* 5051 * patch entries 5052 */ 5053static const struct hda_device_id snd_hda_id_sigmatel[] = { 5054 HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200), 5055 HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x), 5056 HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x), 5057 HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x), 5058 HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x), 5059 HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x), 5060 HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x), 5061 HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x), 5062 HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x), 5063 HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x), 5064 HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x), 5065 HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x), 5066 HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x), 5067 HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x), 5068 HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x), 5069 HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x), 5070 HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x), 5071 HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x), 5072 HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x), 5073 HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x), 5074 HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x), 5075 HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x), 5076 HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x), 5077 HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x), 5078 HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x), 5079 HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x), 5080 HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x), 5081 HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x), 5082 HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x), 5083 HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x), 5084 HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x), 5085 HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x), 5086 /* The following does not take into account .id=0x83847661 when subsys = 5087 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are 5088 * currently not fully supported. 5089 */ 5090 HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872), 5091 HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872), 5092 HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872), 5093 HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205), 5094 HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205), 5095 HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205), 5096 HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205), 5097 HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205), 5098 HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205), 5099 HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205), 5100 HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205), 5101 HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205), 5102 HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx), 5103 HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx), 5104 HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx), 5105 HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx), 5106 HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx), 5107 HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx), 5108 HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx), 5109 HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx), 5110 HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx), 5111 HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx), 5112 HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx), 5113 HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx), 5114 HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx), 5115 HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx), 5116 HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx), 5117 HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95), 5118 HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx), 5119 HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx), 5120 HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx), 5121 HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx), 5122 HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx), 5123 HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx), 5124 HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx), 5125 HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx), 5126 HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx), 5127 HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx), 5128 HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx), 5129 HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx), 5130 HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx), 5131 HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx), 5132 HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx), 5133 HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx), 5134 HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx), 5135 HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx), 5136 HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx), 5137 HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx), 5138 HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx), 5139 HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx), 5140 HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx), 5141 HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx), 5142 HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx), 5143 HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx), 5144 HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx), 5145 HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx), 5146 HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx), 5147 HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx), 5148 HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx), 5149 HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx), 5150 HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx), 5151 HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx), 5152 HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx), 5153 HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx), 5154 HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx), 5155 HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx), 5156 HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx), 5157 HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx), 5158 {} /* terminator */ 5159}; 5160MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel); 5161 5162MODULE_LICENSE("GPL"); 5163MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec"); 5164 5165static struct hda_codec_driver sigmatel_driver = { 5166 .id = snd_hda_id_sigmatel, 5167}; 5168 5169module_hda_codec_driver(sigmatel_driver); 5170