1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * MPC8349E-mITX Device Tree Source
4 *
5 * Copyright 2006 Freescale Semiconductor Inc.
6 */
7
8/dts-v1/;
9
10/ {
11	model = "MPC8349EMITX";
12	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
13	#address-cells = <1>;
14	#size-cells = <1>;
15
16	aliases {
17		ethernet0 = &enet0;
18		ethernet1 = &enet1;
19		serial0 = &serial0;
20		serial1 = &serial1;
21		pci0 = &pci0;
22		pci1 = &pci1;
23	};
24
25	cpus {
26		#address-cells = <1>;
27		#size-cells = <0>;
28
29		PowerPC,8349@0 {
30			device_type = "cpu";
31			reg = <0x0>;
32			d-cache-line-size = <32>;
33			i-cache-line-size = <32>;
34			d-cache-size = <32768>;
35			i-cache-size = <32768>;
36			timebase-frequency = <0>;	// from bootloader
37			bus-frequency = <0>;		// from bootloader
38			clock-frequency = <0>;		// from bootloader
39		};
40	};
41
42	memory {
43		device_type = "memory";
44		reg = <0x00000000 0x10000000>;
45	};
46
47	soc8349@e0000000 {
48		#address-cells = <1>;
49		#size-cells = <1>;
50		device_type = "soc";
51		compatible = "simple-bus";
52		ranges = <0x0 0xe0000000 0x00100000>;
53		reg = <0xe0000000 0x00000200>;
54		bus-frequency = <0>;                    // from bootloader
55
56		wdt@200 {
57			device_type = "watchdog";
58			compatible = "mpc83xx_wdt";
59			reg = <0x200 0x100>;
60		};
61
62		gpio1: gpio-controller@c00 {
63			#gpio-cells = <2>;
64			compatible = "fsl,mpc8349-gpio";
65			reg = <0xc00 0x100>;
66			interrupts = <74 0x8>;
67			interrupt-parent = <&ipic>;
68			gpio-controller;
69		};
70
71		gpio2: gpio-controller@d00 {
72			#gpio-cells = <2>;
73			compatible = "fsl,mpc8349-gpio";
74			reg = <0xd00 0x100>;
75			interrupts = <75 0x8>;
76			interrupt-parent = <&ipic>;
77			gpio-controller;
78		};
79
80		i2c@3000 {
81			#address-cells = <1>;
82			#size-cells = <0>;
83			cell-index = <0>;
84			compatible = "fsl-i2c";
85			reg = <0x3000 0x100>;
86			interrupts = <14 0x8>;
87			interrupt-parent = <&ipic>;
88			dfsrr;
89
90			eeprom: at24@50 {
91				compatible = "st,24c256", "atmel,24c256";
92				reg = <0x50>;
93			};
94
95		};
96
97		i2c@3100 {
98			#address-cells = <1>;
99			#size-cells = <0>;
100			cell-index = <1>;
101			compatible = "fsl-i2c";
102			reg = <0x3100 0x100>;
103			interrupts = <15 0x8>;
104			interrupt-parent = <&ipic>;
105			dfsrr;
106
107			rtc@68 {
108				compatible = "dallas,ds1339";
109				reg = <0x68>;
110				interrupts = <18 0x8>;
111				interrupt-parent = <&ipic>;
112			};
113
114			pcf1: iexp@38 {
115				#gpio-cells = <2>;
116				compatible = "ti,pcf8574a";
117				reg = <0x38>;
118				gpio-controller;
119			};
120
121			pcf2: iexp@39 {
122				#gpio-cells = <2>;
123				compatible = "ti,pcf8574a";
124				reg = <0x39>;
125				gpio-controller;
126			};
127
128			spd: at24@51 {
129				compatible = "atmel,spd";
130				reg = <0x51>;
131			};
132
133			mcu_pio: mcu@a {
134				#gpio-cells = <2>;
135				compatible = "fsl,mc9s08qg8-mpc8349emitx",
136					     "fsl,mcu-mpc8349emitx";
137				reg = <0x0a>;
138				gpio-controller;
139			};
140		};
141
142		spi@7000 {
143			cell-index = <0>;
144			compatible = "fsl,spi";
145			reg = <0x7000 0x1000>;
146			interrupts = <16 0x8>;
147			interrupt-parent = <&ipic>;
148			mode = "cpu";
149		};
150
151		dma@82a8 {
152			#address-cells = <1>;
153			#size-cells = <1>;
154			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
155			reg = <0x82a8 4>;
156			ranges = <0 0x8100 0x1a8>;
157			interrupt-parent = <&ipic>;
158			interrupts = <71 8>;
159			cell-index = <0>;
160			dma-channel@0 {
161				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
162				reg = <0 0x80>;
163				cell-index = <0>;
164				interrupt-parent = <&ipic>;
165				interrupts = <71 8>;
166			};
167			dma-channel@80 {
168				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
169				reg = <0x80 0x80>;
170				cell-index = <1>;
171				interrupt-parent = <&ipic>;
172				interrupts = <71 8>;
173			};
174			dma-channel@100 {
175				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
176				reg = <0x100 0x80>;
177				cell-index = <2>;
178				interrupt-parent = <&ipic>;
179				interrupts = <71 8>;
180			};
181			dma-channel@180 {
182				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
183				reg = <0x180 0x28>;
184				cell-index = <3>;
185				interrupt-parent = <&ipic>;
186				interrupts = <71 8>;
187			};
188		};
189
190		usb@22000 {
191			compatible = "fsl-usb2-mph";
192			reg = <0x22000 0x1000>;
193			#address-cells = <1>;
194			#size-cells = <0>;
195			interrupt-parent = <&ipic>;
196			interrupts = <39 0x8>;
197			phy_type = "ulpi";
198			port0;
199		};
200
201		usb@23000 {
202			compatible = "fsl-usb2-dr";
203			reg = <0x23000 0x1000>;
204			#address-cells = <1>;
205			#size-cells = <0>;
206			interrupt-parent = <&ipic>;
207			interrupts = <38 0x8>;
208			dr_mode = "peripheral";
209			phy_type = "ulpi";
210		};
211
212		enet0: ethernet@24000 {
213			#address-cells = <1>;
214			#size-cells = <1>;
215			cell-index = <0>;
216			device_type = "network";
217			model = "TSEC";
218			compatible = "gianfar";
219			reg = <0x24000 0x1000>;
220			ranges = <0x0 0x24000 0x1000>;
221			local-mac-address = [ 00 00 00 00 00 00 ];
222			interrupts = <32 0x8 33 0x8 34 0x8>;
223			interrupt-parent = <&ipic>;
224			tbi-handle = <&tbi0>;
225			phy-handle = <&phy1c>;
226			linux,network-index = <0>;
227
228			mdio@520 {
229				#address-cells = <1>;
230				#size-cells = <0>;
231				compatible = "fsl,gianfar-mdio";
232				reg = <0x520 0x20>;
233
234				/* Vitesse 8201 */
235				phy1c: ethernet-phy@1c {
236					interrupt-parent = <&ipic>;
237					interrupts = <18 0x8>;
238					reg = <0x1c>;
239				};
240
241				tbi0: tbi-phy@11 {
242					reg = <0x11>;
243					device_type = "tbi-phy";
244				};
245			};
246		};
247
248		enet1: ethernet@25000 {
249			#address-cells = <1>;
250			#size-cells = <1>;
251			cell-index = <1>;
252			device_type = "network";
253			model = "TSEC";
254			compatible = "gianfar";
255			reg = <0x25000 0x1000>;
256			ranges = <0x0 0x25000 0x1000>;
257			local-mac-address = [ 00 00 00 00 00 00 ];
258			interrupts = <35 0x8 36 0x8 37 0x8>;
259			interrupt-parent = <&ipic>;
260			/* Vitesse 7385 isn't on the MDIO bus */
261			fixed-link = <1 1 1000 0 0>;
262			linux,network-index = <1>;
263			tbi-handle = <&tbi1>;
264
265			mdio@520 {
266				#address-cells = <1>;
267				#size-cells = <0>;
268				compatible = "fsl,gianfar-tbi";
269				reg = <0x520 0x20>;
270
271				tbi1: tbi-phy@11 {
272					reg = <0x11>;
273					device_type = "tbi-phy";
274				};
275			};
276		};
277
278		serial0: serial@4500 {
279			cell-index = <0>;
280			device_type = "serial";
281			compatible = "fsl,ns16550", "ns16550";
282			reg = <0x4500 0x100>;
283			clock-frequency = <0>;		// from bootloader
284			interrupts = <9 0x8>;
285			interrupt-parent = <&ipic>;
286		};
287
288		serial1: serial@4600 {
289			cell-index = <1>;
290			device_type = "serial";
291			compatible = "fsl,ns16550", "ns16550";
292			reg = <0x4600 0x100>;
293			clock-frequency = <0>;		// from bootloader
294			interrupts = <10 0x8>;
295			interrupt-parent = <&ipic>;
296		};
297
298		crypto@30000 {
299			compatible = "fsl,sec2.0";
300			reg = <0x30000 0x10000>;
301			interrupts = <11 0x8>;
302			interrupt-parent = <&ipic>;
303			fsl,num-channels = <4>;
304			fsl,channel-fifo-len = <24>;
305			fsl,exec-units-mask = <0x7e>;
306			fsl,descriptor-types-mask = <0x01010ebf>;
307		};
308
309		ipic: pic@700 {
310			interrupt-controller;
311			#address-cells = <0>;
312			#interrupt-cells = <2>;
313			reg = <0x700 0x100>;
314			device_type = "ipic";
315		};
316
317		gpio-leds {
318			compatible = "gpio-leds";
319
320			green {
321				label = "Green";
322				gpios = <&pcf1 0 1>;
323				linux,default-trigger = "heartbeat";
324			};
325
326			yellow {
327				label = "Yellow";
328				gpios = <&pcf1 1 1>;
329				/* linux,default-trigger = "heartbeat"; */
330				default-state = "on";
331			};
332		};
333
334	};
335
336	pci0: pci@e0008500 {
337		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
338		interrupt-map = <
339				/* IDSEL 0x10 - SATA */
340				0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
341				>;
342		interrupt-parent = <&ipic>;
343		interrupts = <66 0x8>;
344		bus-range = <0x0 0x0>;
345		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
346			  0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
347			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
348		clock-frequency = <66666666>;
349		#interrupt-cells = <1>;
350		#size-cells = <2>;
351		#address-cells = <3>;
352		reg = <0xe0008500 0x100		/* internal registers */
353		       0xe0008300 0x8>;		/* config space access registers */
354		compatible = "fsl,mpc8349-pci";
355		device_type = "pci";
356	};
357
358	pci1: pci@e0008600 {
359		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
360		interrupt-map = <
361				/* IDSEL 0x0E - MiniPCI Slot */
362				0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
363
364				/* IDSEL 0x0F - PCI Slot */
365				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
366				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
367				>;
368		interrupt-parent = <&ipic>;
369		interrupts = <67 0x8>;
370		bus-range = <0x0 0x0>;
371		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
372			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
373			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
374		clock-frequency = <66666666>;
375		#interrupt-cells = <1>;
376		#size-cells = <2>;
377		#address-cells = <3>;
378		reg = <0xe0008600 0x100		/* internal registers */
379		       0xe0008380 0x8>;		/* config space access registers */
380		compatible = "fsl,mpc8349-pci";
381		device_type = "pci";
382	};
383
384	localbus@e0005000 {
385		#address-cells = <2>;
386		#size-cells = <1>;
387		compatible = "fsl,mpc8349e-localbus",
388			     "fsl,pq2pro-localbus",
389			     "simple-bus";
390		reg = <0xe0005000 0xd8>;
391		ranges = <0x0 0x0 0xfe000000 0x1000000	/* flash */
392			  0x1 0x0 0xf8000000 0x20000	/* VSC 7385 */
393			  0x2 0x0 0xf9000000 0x200000	/* exp slot */
394			  0x3 0x0 0xf0000000 0x210>;	/* CF slot */
395
396		flash@0,0 {
397			compatible = "cfi-flash";
398			reg = <0x0      0x0 0x800000>;
399			bank-width = <2>;
400			device-width = <1>;
401		};
402
403		flash@0,800000 {
404			#address-cells = <1>;
405			#size-cells = <1>;
406			compatible = "cfi-flash";
407			reg = <0x0 0x800000 0x800000>;
408			bank-width = <2>;
409			device-width = <1>;
410		};
411
412		pata@3,0 {
413			compatible = "fsl,mpc8349emitx-pata", "ata-generic";
414			reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
415			reg-shift = <1>;
416			pio-mode = <6>;
417			interrupts = <23 0x8>;
418			interrupt-parent = <&ipic>;
419		};
420	};
421};
422