1249746Sdteske/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
2252980Sdteske/*
3238438Sdteske * This header provides constants for pinctrl bindings for TI's K3 SoC
4238438Sdteske * family.
5238438Sdteske *
6238438Sdteske * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
7238438Sdteske */
8238438Sdteske#ifndef DTS_ARM64_TI_K3_PINCTRL_H
9238438Sdteske#define DTS_ARM64_TI_K3_PINCTRL_H
10238438Sdteske
11238438Sdteske#define PULLUDEN_SHIFT		(16)
12238438Sdteske#define PULLTYPESEL_SHIFT	(17)
13238438Sdteske#define RXACTIVE_SHIFT		(18)
14252987Sdteske#define DEBOUNCE_SHIFT		(11)
15238438Sdteske
16238438Sdteske#define PULL_DISABLE		(1 << PULLUDEN_SHIFT)
17238438Sdteske#define PULL_ENABLE		(0 << PULLUDEN_SHIFT)
18252987Sdteske
19238438Sdteske#define PULL_UP			(1 << PULLTYPESEL_SHIFT | PULL_ENABLE)
20238438Sdteske#define PULL_DOWN		(0 << PULLTYPESEL_SHIFT | PULL_ENABLE)
21238438Sdteske
22238438Sdteske#define INPUT_EN		(1 << RXACTIVE_SHIFT)
23238438Sdteske#define INPUT_DISABLE		(0 << RXACTIVE_SHIFT)
24238438Sdteske
25238438Sdteske/* Only these macros are expected be used directly in device tree files */
26238438Sdteske#define PIN_OUTPUT		(INPUT_DISABLE | PULL_DISABLE)
27238438Sdteske#define PIN_OUTPUT_PULLUP	(INPUT_DISABLE | PULL_UP)
28238438Sdteske#define PIN_OUTPUT_PULLDOWN	(INPUT_DISABLE | PULL_DOWN)
29249746Sdteske#define PIN_INPUT		(INPUT_EN | PULL_DISABLE)
30249746Sdteske#define PIN_INPUT_PULLUP	(INPUT_EN | PULL_UP)
31249746Sdteske#define PIN_INPUT_PULLDOWN	(INPUT_EN | PULL_DOWN)
32249746Sdteske
33238438Sdteske#define PIN_DEBOUNCE_DISABLE	(0 << DEBOUNCE_SHIFT)
34238438Sdteske#define PIN_DEBOUNCE_CONF1	(1 << DEBOUNCE_SHIFT)
35238438Sdteske#define PIN_DEBOUNCE_CONF2	(2 << DEBOUNCE_SHIFT)
36238438Sdteske#define PIN_DEBOUNCE_CONF3	(3 << DEBOUNCE_SHIFT)
37249746Sdteske#define PIN_DEBOUNCE_CONF4	(4 << DEBOUNCE_SHIFT)
38238438Sdteske#define PIN_DEBOUNCE_CONF5	(5 << DEBOUNCE_SHIFT)
39238438Sdteske#define PIN_DEBOUNCE_CONF6	(6 << DEBOUNCE_SHIFT)
40238438Sdteske
41238438Sdteske#define AM62AX_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
42238438Sdteske#define AM62AX_MCU_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
43238438Sdteske
44238438Sdteske#define AM62PX_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
45238438Sdteske#define AM62PX_MCU_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
46238438Sdteske
47#define AM62X_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
48#define AM62X_MCU_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
49
50#define AM64X_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
51#define AM64X_MCU_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
52
53#define AM65X_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
54#define AM65X_WKUP_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
55
56#define J721E_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
57#define J721E_WKUP_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
58
59#define J721S2_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
60#define J721S2_WKUP_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
61
62#define J722S_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
63#define J722S_MCU_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
64
65#define J784S4_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
66#define J784S4_WKUP_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
67
68#endif
69