1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's Exynos5420 based Arndale Octa board device tree source
4 *
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 *		http://www.samsung.com
7 */
8
9/dts-v1/;
10#include "exynos5420.dtsi"
11#include "exynos5420-cpus.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/input/input.h>
15#include <dt-bindings/clock/samsung,s2mps11.h>
16
17/ {
18	model = "Insignal Arndale Octa evaluation board based on Exynos5420";
19	compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
20
21	memory@20000000 {
22		device_type = "memory";
23		reg = <0x20000000 0x80000000>;
24	};
25
26	aliases {
27		mmc0 = &mmc_0;
28		mmc1 = &mmc_2;
29	};
30
31	chosen {
32		stdout-path = "serial3:115200n8";
33	};
34
35	firmware@2073000 {
36		compatible = "samsung,secure-firmware";
37		reg = <0x02073000 0x1000>;
38	};
39
40	fixed-rate-clocks {
41		oscclk {
42			compatible = "samsung,exynos5420-oscclk";
43			clock-frequency = <24000000>;
44		};
45	};
46
47	gpio-keys {
48		compatible = "gpio-keys";
49
50		key-wakeup {
51			label = "SW-TACT1";
52			gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
53			linux,code = <KEY_WAKEUP>;
54			wakeup-source;
55		};
56	};
57};
58
59&adc {
60	vdd-supply = <&ldo4_reg>;
61	status = "okay";
62};
63
64&cci {
65	status = "disabled";
66};
67
68&cpu0 {
69	cpu-supply = <&buck2_reg>;
70};
71
72&cpu4 {
73	cpu-supply = <&buck6_reg>;
74};
75
76&cpu0_thermal {
77	trips {
78		cpu0_alert0: cpu-alert-0 {
79			temperature = <60000>; /* millicelsius */
80			hysteresis = <5000>; /* millicelsius */
81			type = "passive";
82		};
83		cpu0_alert1: cpu-alert-1 {
84			temperature = <80000>; /* millicelsius */
85			hysteresis = <10000>; /* millicelsius */
86			type = "passive";
87		};
88		cpu0_alert2: cpu-alert-2 {
89			temperature = <110000>; /* millicelsius */
90			hysteresis = <10000>; /* millicelsius */
91			type = "passive";
92		};
93		cpu0_crit0: cpu-crit-0 {
94			temperature = <120000>; /* millicelsius */
95			hysteresis = <0>; /* millicelsius */
96			type = "critical";
97		};
98	};
99
100	cooling-maps {
101		/*
102		 * Reduce the CPU speed by 2 steps, down to: 1600 MHz
103		 * and 1100 MHz.
104		 */
105		map0 {
106			trip = <&cpu0_alert0>;
107			cooling-device = <&cpu0 0 2>,
108					 <&cpu1 0 2>,
109					 <&cpu2 0 2>,
110					 <&cpu3 0 2>,
111					 <&cpu4 0 2>,
112					 <&cpu5 0 2>,
113					 <&cpu6 0 2>,
114					 <&cpu7 0 2>;
115		};
116
117		/*
118		 * Reduce the CPU speed down to 1200 MHz big (6 steps)
119		 * and 800 MHz LITTLE (5 steps).
120		 */
121		map1 {
122			trip = <&cpu0_alert1>;
123			cooling-device = <&cpu0 3 6>,
124					 <&cpu1 3 6>,
125					 <&cpu2 3 6>,
126					 <&cpu3 3 6>,
127					 <&cpu4 3 5>,
128					 <&cpu5 3 5>,
129					 <&cpu6 3 5>,
130					 <&cpu7 3 5>;
131		};
132
133		/*
134		 * Reduce the CPU speed as much as possible, down to 700 MHz
135		 * big (11 steps) and 600 MHz LITTLE (7 steps).
136		 */
137		map2 {
138			trip = <&cpu0_alert2>;
139			cooling-device = <&cpu0 6 11>,
140					 <&cpu1 6 11>,
141					 <&cpu2 6 11>,
142					 <&cpu3 6 11>,
143					 <&cpu4 5 7>,
144					 <&cpu5 5 7>,
145					 <&cpu6 5 7>,
146					 <&cpu7 5 7>;
147		};
148	};
149};
150
151&cpu1_thermal {
152	trips {
153		cpu1_alert0: cpu-alert-0 {
154			temperature = <60000>; /* millicelsius */
155			hysteresis = <5000>; /* millicelsius */
156			type = "passive";
157		};
158		cpu1_alert1: cpu-alert-1 {
159			temperature = <80000>; /* millicelsius */
160			hysteresis = <10000>; /* millicelsius */
161			type = "passive";
162		};
163		cpu1_alert2: cpu-alert-2 {
164			temperature = <110000>; /* millicelsius */
165			hysteresis = <10000>; /* millicelsius */
166			type = "passive";
167		};
168		cpu1_crit0: cpu-crit-0 {
169			temperature = <120000>; /* millicelsius */
170			hysteresis = <0>; /* millicelsius */
171			type = "critical";
172		};
173	};
174
175	cooling-maps {
176		map0 {
177			trip = <&cpu1_alert0>;
178			cooling-device = <&cpu0 0 2>,
179					 <&cpu1 0 2>,
180					 <&cpu2 0 2>,
181					 <&cpu3 0 2>,
182					 <&cpu4 0 2>,
183					 <&cpu5 0 2>,
184					 <&cpu6 0 2>,
185					 <&cpu7 0 2>;
186		};
187
188		map1 {
189			trip = <&cpu1_alert1>;
190			cooling-device = <&cpu0 3 6>,
191					 <&cpu1 3 6>,
192					 <&cpu2 3 6>,
193					 <&cpu3 3 6>,
194					 <&cpu4 3 5>,
195					 <&cpu5 3 5>,
196					 <&cpu6 3 5>,
197					 <&cpu7 3 5>;
198		};
199
200		map2 {
201			trip = <&cpu1_alert2>;
202			cooling-device = <&cpu0 6 11>,
203					 <&cpu1 6 11>,
204					 <&cpu2 6 11>,
205					 <&cpu3 6 11>,
206					 <&cpu4 5 7>,
207					 <&cpu5 5 7>,
208					 <&cpu6 5 7>,
209					 <&cpu7 5 7>;
210		};
211	};
212};
213
214&cpu2_thermal {
215	trips {
216		cpu2_alert0: cpu-alert-0 {
217			temperature = <60000>; /* millicelsius */
218			hysteresis = <5000>; /* millicelsius */
219			type = "passive";
220		};
221		cpu2_alert1: cpu-alert-1 {
222			temperature = <80000>; /* millicelsius */
223			hysteresis = <10000>; /* millicelsius */
224			type = "passive";
225		};
226		cpu2_alert2: cpu-alert-2 {
227			temperature = <110000>; /* millicelsius */
228			hysteresis = <10000>; /* millicelsius */
229			type = "passive";
230		};
231		cpu2_crit0: cpu-crit-0 {
232			temperature = <120000>; /* millicelsius */
233			hysteresis = <0>; /* millicelsius */
234			type = "critical";
235		};
236	};
237
238	cooling-maps {
239		map0 {
240			trip = <&cpu2_alert0>;
241			cooling-device = <&cpu0 0 2>,
242					 <&cpu1 0 2>,
243					 <&cpu2 0 2>,
244					 <&cpu3 0 2>,
245					 <&cpu4 0 2>,
246					 <&cpu5 0 2>,
247					 <&cpu6 0 2>,
248					 <&cpu7 0 2>;
249		};
250
251		map1 {
252			trip = <&cpu2_alert1>;
253			cooling-device = <&cpu0 3 6>,
254					 <&cpu1 3 6>,
255					 <&cpu2 3 6>,
256					 <&cpu3 3 6>,
257					 <&cpu4 3 5>,
258					 <&cpu5 3 5>,
259					 <&cpu6 3 5>,
260					 <&cpu7 3 5>;
261		};
262
263		map2 {
264			trip = <&cpu2_alert2>;
265			cooling-device = <&cpu0 6 11>,
266					 <&cpu1 6 11>,
267					 <&cpu2 6 11>,
268					 <&cpu3 6 11>,
269					 <&cpu4 6 7>,
270					 <&cpu5 6 7>,
271					 <&cpu6 6 7>,
272					 <&cpu7 6 7>;
273		};
274	};
275};
276
277&cpu3_thermal {
278	trips {
279		cpu3_alert0: cpu-alert-0 {
280			temperature = <60000>; /* millicelsius */
281			hysteresis = <5000>; /* millicelsius */
282			type = "passive";
283		};
284		cpu3_alert1: cpu-alert-1 {
285			temperature = <80000>; /* millicelsius */
286			hysteresis = <10000>; /* millicelsius */
287			type = "passive";
288		};
289		cpu3_alert2: cpu-alert-2 {
290			temperature = <110000>; /* millicelsius */
291			hysteresis = <10000>; /* millicelsius */
292			type = "passive";
293		};
294		cpu3_crit0: cpu-crit-0 {
295			temperature = <120000>; /* millicelsius */
296			hysteresis = <0>; /* millicelsius */
297			type = "critical";
298		};
299	};
300
301	cooling-maps {
302		map0 {
303			trip = <&cpu3_alert0>;
304			cooling-device = <&cpu0 0 2>,
305					 <&cpu1 0 2>,
306					 <&cpu2 0 2>,
307					 <&cpu3 0 2>,
308					 <&cpu4 0 2>,
309					 <&cpu5 0 2>,
310					 <&cpu6 0 2>,
311					 <&cpu7 0 2>;
312		};
313
314		map1 {
315			trip = <&cpu3_alert1>;
316			cooling-device = <&cpu0 3 6>,
317					 <&cpu1 3 6>,
318					 <&cpu2 3 6>,
319					 <&cpu3 3 6>,
320					 <&cpu4 3 5>,
321					 <&cpu5 3 5>,
322					 <&cpu6 3 5>,
323					 <&cpu7 3 5>;
324		};
325
326		map2 {
327			trip = <&cpu3_alert2>;
328			cooling-device = <&cpu0 6 11>,
329					 <&cpu1 6 11>,
330					 <&cpu2 6 11>,
331					 <&cpu3 6 11>,
332					 <&cpu4 5 7>,
333					 <&cpu5 5 7>,
334					 <&cpu6 5 7>,
335					 <&cpu7 5 7>;
336		};
337	};
338};
339
340&hdmi {
341	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
342	vdd_osc-supply = <&ldo7_reg>;
343	vdd_pll-supply = <&ldo6_reg>;
344	vdd-supply = <&ldo6_reg>;
345	ddc = <&i2c_2>;
346	status = "okay";
347};
348
349&hsi2c_4 {
350	status = "okay";
351
352	pmic@66 {
353		compatible = "samsung,s2mps11-pmic";
354		reg = <0x66>;
355
356		interrupt-parent = <&gpx3>;
357		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
358		pinctrl-names = "default";
359		pinctrl-0 = <&s2mps11_irq>;
360		wakeup-source;
361
362		s2mps11_osc: clocks {
363			compatible = "samsung,s2mps11-clk";
364			#clock-cells = <1>;
365			clock-output-names = "s2mps11_ap",
366					"s2mps11_cp", "s2mps11_bt";
367		};
368
369		regulators {
370			ldo1_reg: LDO1 {
371				regulator-name = "PVDD_ALIVE_1V0";
372				regulator-min-microvolt = <1000000>;
373				regulator-max-microvolt = <1000000>;
374				regulator-always-on;
375			};
376
377			ldo2_reg: LDO2 {
378				regulator-name = "PVDD_APIO_1V8";
379				regulator-min-microvolt = <1800000>;
380				regulator-max-microvolt = <1800000>;
381				regulator-always-on;
382			};
383
384			ldo3_reg: LDO3 {
385				regulator-name = "PVDD_APIO_MMCON_1V8";
386				regulator-min-microvolt = <1800000>;
387				regulator-max-microvolt = <1800000>;
388				/*
389				 * Must be always on, even though there is
390				 * a consumer (mmc_0).  Otherwise the board
391				 * does not reboot with vendor U-Boot
392				 * (Linaro for Arndale Octa, v2012.07).
393				 */
394				regulator-always-on;
395
396				regulator-state-mem {
397					regulator-off-in-suspend;
398				};
399			};
400
401			ldo4_reg: LDO4 {
402				regulator-name = "PVDD_ADC_1V8";
403				regulator-min-microvolt = <1800000>;
404				regulator-max-microvolt = <1800000>;
405			};
406
407			ldo5_reg: LDO5 {
408				regulator-name = "PVDD_PLL_1V8";
409				regulator-min-microvolt = <1800000>;
410				regulator-max-microvolt = <1800000>;
411				regulator-always-on;
412			};
413
414			ldo6_reg: LDO6 {
415				regulator-name = "PVDD_ANAIP_1V0";
416				regulator-min-microvolt = <1000000>;
417				regulator-max-microvolt = <1000000>;
418			};
419
420			ldo7_reg: LDO7 {
421				regulator-name = "PVDD_ANAIP_1V8";
422				regulator-min-microvolt = <1800000>;
423				regulator-max-microvolt = <1800000>;
424
425				regulator-state-mem {
426					regulator-off-in-suspend;
427				};
428			};
429
430			ldo8_reg: LDO8 {
431				regulator-name = "PVDD_ABB_1V8";
432				regulator-min-microvolt = <1800000>;
433				regulator-max-microvolt = <1800000>;
434				regulator-always-on;
435			};
436
437			ldo9_reg: LDO9 {
438				regulator-name = "PVDD_USB_3V3";
439				regulator-min-microvolt = <3000000>;
440				regulator-max-microvolt = <3000000>;
441				regulator-always-on;
442			};
443
444			ldo10_reg: LDO10 {
445				regulator-name = "PVDD_PRE_1V8";
446				regulator-min-microvolt = <1800000>;
447				regulator-max-microvolt = <1800000>;
448				regulator-always-on;
449			};
450
451			ldo11_reg: LDO11 {
452				regulator-name = "PVDD_USB_1V0";
453				regulator-min-microvolt = <1000000>;
454				regulator-max-microvolt = <1000000>;
455				regulator-always-on;
456			};
457
458			ldo12_reg: LDO12 {
459				regulator-name = "PVDD_HSIC_1V8";
460				regulator-min-microvolt = <1800000>;
461				regulator-max-microvolt = <1800000>;
462			};
463
464			ldo13_reg: LDO13 {
465				regulator-name = "PVDD_APIO_MMCOFF_2V8";
466				regulator-min-microvolt = <1800000>;
467				regulator-max-microvolt = <2800000>;
468
469				regulator-state-mem {
470					regulator-off-in-suspend;
471				};
472			};
473
474			ldo14_reg: LDO14 {
475				/* Unused */
476				regulator-name = "PVDD_LDO14";
477				regulator-min-microvolt = <800000>;
478				regulator-max-microvolt = <3950000>;
479			};
480
481			ldo15_reg: LDO15 {
482				regulator-name = "PVDD_PERI_2V8";
483				regulator-min-microvolt = <3300000>;
484				regulator-max-microvolt = <3300000>;
485
486				regulator-state-mem {
487					regulator-on-in-suspend;
488				};
489			};
490
491			ldo16_reg: LDO16 {
492				regulator-name = "PVDD_PERI_3V3";
493				regulator-min-microvolt = <2200000>;
494				regulator-max-microvolt = <2200000>;
495
496				regulator-state-mem {
497					regulator-on-in-suspend;
498				};
499			};
500
501			ldo17_reg: LDO17 {
502				/* Unused */
503				regulator-name = "PVDD_LDO17";
504				regulator-min-microvolt = <800000>;
505				regulator-max-microvolt = <3950000>;
506			};
507
508			ldo18_reg: LDO18 {
509				regulator-name = "PVDD_EMMC_1V8";
510				regulator-min-microvolt = <1800000>;
511				regulator-max-microvolt = <1800000>;
512				/*
513				 * Must stay in "off" mode during shutdown for
514				 * proper eMMC reset.  The "off" mode is in
515				 * fact controlled by LDO18EN.  The eMMC does
516				 * not have reset pin connected so the reset
517				 * will be triggered by falling edge of
518				 * LDO18EN.
519				 */
520
521				regulator-state-mem {
522					regulator-off-in-suspend;
523				};
524			};
525
526			ldo19_reg: LDO19 {
527				regulator-name = "PVDD_TFLASH_2V8";
528				regulator-min-microvolt = <2800000>;
529				regulator-max-microvolt = <2800000>;
530
531				regulator-state-mem {
532					regulator-off-in-suspend;
533				};
534			};
535
536			ldo20_reg: LDO20 {
537				regulator-name = "PVDD_BTWIFI_1V8";
538				regulator-min-microvolt = <1800000>;
539				regulator-max-microvolt = <1800000>;
540			};
541
542			ldo21_reg: LDO21 {
543				regulator-name = "PVDD_CAM1IO_1V8";
544				regulator-min-microvolt = <1800000>;
545				regulator-max-microvolt = <1800000>;
546			};
547
548			ldo22_reg: LDO22 {
549				/* Unused */
550				regulator-name = "PVDD_LDO22";
551				regulator-min-microvolt = <800000>;
552				regulator-max-microvolt = <2375000>;
553			};
554
555			ldo23_reg: LDO23 {
556				regulator-name = "PVDD_MIFS_1V1";
557				regulator-min-microvolt = <800000>;
558				regulator-max-microvolt = <1100000>;
559				regulator-always-on;
560
561				regulator-state-mem {
562					regulator-on-in-suspend;
563				};
564			};
565
566			ldo24_reg: LDO24 {
567				regulator-name = "PVDD_CAM1_AVDD_2V8";
568				regulator-min-microvolt = <2800000>;
569				regulator-max-microvolt = <2800000>;
570
571				regulator-state-mem {
572					regulator-on-in-suspend;
573				};
574			};
575
576			ldo25_reg: LDO25 {
577				/* Unused */
578				regulator-name = "PVDD_LDO25";
579				regulator-min-microvolt = <800000>;
580				regulator-max-microvolt = <3950000>;
581			};
582
583			ldo26_reg: LDO26 {
584				regulator-name = "PVDD_CAM0_AF_2V8";
585				regulator-min-microvolt = <3000000>;
586				regulator-max-microvolt = <3000000>;
587			};
588
589			ldo27_reg: LDO27 {
590				regulator-name = "PVDD_G3DS_1V0";
591				regulator-min-microvolt = <800000>;
592				regulator-max-microvolt = <1100000>;
593				regulator-always-on;
594
595				regulator-state-mem {
596					regulator-on-in-suspend;
597				};
598			};
599
600			ldo28_reg: LDO28 {
601				regulator-name = "PVDD_TSP_3V3";
602				regulator-min-microvolt = <3300000>;
603				regulator-max-microvolt = <3300000>;
604			};
605
606			ldo29_reg: LDO29 {
607				regulator-name = "PVDD_AUDIO_1V8";
608				regulator-min-microvolt = <1800000>;
609				regulator-max-microvolt = <1800000>;
610			};
611
612			ldo30_reg: LDO30 {
613				/* Unused */
614				regulator-name = "PVDD_LDO30";
615				regulator-min-microvolt = <800000>;
616				regulator-max-microvolt = <3950000>;
617			};
618
619			ldo31_reg: LDO31 {
620				regulator-name = "PVDD_PERI_1V8";
621				regulator-min-microvolt = <1800000>;
622				regulator-max-microvolt = <1800000>;
623			};
624
625			ldo32_reg: LDO32 {
626				regulator-name = "PVDD_LCD_1V8";
627				regulator-min-microvolt = <1800000>;
628				regulator-max-microvolt = <1800000>;
629			};
630
631			ldo33_reg: LDO33 {
632				regulator-name = "PVDD_CAM0IO_1V8";
633				regulator-min-microvolt = <1800000>;
634				regulator-max-microvolt = <1800000>;
635			};
636
637			ldo34_reg: LDO34 {
638				/* Unused */
639				regulator-name = "PVDD_LDO34";
640				regulator-min-microvolt = <800000>;
641				regulator-max-microvolt = <3950000>;
642			};
643
644			ldo35_reg: LDO35 {
645				regulator-name = "PVDD_CAM0_DVDD_1V2";
646				regulator-min-microvolt = <1200000>;
647				regulator-max-microvolt = <1200000>;
648			};
649
650			ldo36_reg: LDO36 {
651				/* Unused */
652				regulator-name = "PVDD_LDO36";
653				regulator-min-microvolt = <800000>;
654				regulator-max-microvolt = <3950000>;
655			};
656
657			ldo37_reg: LDO37 {
658				/* Unused */
659				regulator-name = "PVDD_LDO37";
660				regulator-min-microvolt = <800000>;
661				regulator-max-microvolt = <3950000>;
662			};
663
664			ldo38_reg: LDO38 {
665				regulator-name = "PVDD_CAM0_AVDD_2V8";
666				regulator-min-microvolt = <2800000>;
667				regulator-max-microvolt = <2800000>;
668			};
669
670			buck1_reg: BUCK1 {
671				regulator-name = "PVDD_MIF_1V1";
672				regulator-min-microvolt = <800000>;
673				regulator-max-microvolt = <1300000>;
674				regulator-always-on;
675
676				regulator-state-mem {
677					regulator-off-in-suspend;
678				};
679			};
680
681			buck2_reg: BUCK2 {
682				regulator-name = "PVDD_ARM_1V0";
683				regulator-min-microvolt = <800000>;
684				regulator-max-microvolt = <1500000>;
685				regulator-always-on;
686
687				regulator-state-mem {
688					regulator-off-in-suspend;
689				};
690			};
691
692			buck3_reg: BUCK3 {
693				regulator-name = "PVDD_INT_1V0";
694				regulator-min-microvolt = <800000>;
695				regulator-max-microvolt = <1400000>;
696				regulator-always-on;
697
698				regulator-state-mem {
699					regulator-off-in-suspend;
700				};
701			};
702
703			buck4_reg: BUCK4 {
704				regulator-name = "PVDD_G3D_1V0";
705				regulator-min-microvolt = <800000>;
706				regulator-max-microvolt = <1400000>;
707				regulator-always-on;
708
709				regulator-state-mem {
710					regulator-off-in-suspend;
711				};
712			};
713
714			buck5_reg: BUCK5 {
715				regulator-name = "PVDD_LPDDR3_1V2";
716				regulator-min-microvolt = <800000>;
717				regulator-max-microvolt = <1400000>;
718				regulator-always-on;
719			};
720
721			buck6_reg: BUCK6 {
722				regulator-name = "PVDD_KFC_1V0";
723				regulator-min-microvolt = <800000>;
724				regulator-max-microvolt = <1500000>;
725				regulator-always-on;
726
727				regulator-state-mem {
728					regulator-off-in-suspend;
729				};
730			};
731
732			buck7_reg: BUCK7 {
733				regulator-name = "VIN_LLDO_1V4";
734				regulator-min-microvolt = <1200000>;
735				regulator-max-microvolt = <1500000>;
736				regulator-always-on;
737			};
738
739			buck8_reg: BUCK8 {
740				regulator-name = "VIN_MLDO_2V0";
741				regulator-min-microvolt = <1800000>;
742				regulator-max-microvolt = <2100000>;
743				regulator-always-on;
744			};
745
746			buck9_reg: BUCK9 {
747				regulator-name = "VIN_HLDO_3V5";
748				regulator-min-microvolt = <3000000>;
749				regulator-max-microvolt = <3500000>;
750				regulator-always-on;
751			};
752
753			buck10_reg: BUCK10 {
754				regulator-name = "PVDD_EMMCF_2V8";
755				regulator-min-microvolt = <2800000>;
756				regulator-max-microvolt = <2800000>;
757				/*
758				 * Must stay in "off" mode during shutdown for
759				 * proper eMMC reset.  The "off" mode is in
760				 * fact controlled by BUCK10EN.  The eMMC does
761				 * not have reset pin connected so the reset
762				 * will be triggered by falling edge of
763				 * BUCK10EN.
764				 */
765
766				regulator-state-mem {
767					regulator-off-in-suspend;
768				};
769			};
770		};
771	};
772};
773
774&i2c_2 {
775	status = "okay";
776};
777
778&mixer {
779	status = "okay";
780};
781
782&mmc_0 {
783	status = "okay";
784	non-removable;
785	card-detect-delay = <200>;
786	mmc-ddr-1_8v;
787	samsung,dw-mshc-ciu-div = <3>;
788	samsung,dw-mshc-sdr-timing = <0 4>;
789	samsung,dw-mshc-ddr-timing = <0 2>;
790	pinctrl-names = "default";
791	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
792	vmmc-supply = <&ldo18_reg>;
793	vqmmc-supply = <&ldo3_reg>;
794	bus-width = <8>;
795	cap-mmc-highspeed;
796	mmc-hs200-1_8v;
797};
798
799&mmc_2 {
800	status = "okay";
801	card-detect-delay = <200>;
802	samsung,dw-mshc-ciu-div = <3>;
803	samsung,dw-mshc-sdr-timing = <0 4>;
804	samsung,dw-mshc-ddr-timing = <0 2>;
805	pinctrl-names = "default";
806	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
807	vmmc-supply = <&ldo19_reg>;
808	vqmmc-supply = <&ldo13_reg>;
809	bus-width = <4>;
810	cap-sd-highspeed;
811	sd-uhs-sdr50;
812	sd-uhs-sdr104;
813	sd-uhs-ddr50;
814};
815
816&pinctrl_0 {
817	s2mps11_irq: s2mps11-irq-pins {
818		samsung,pins = "gpx3-2";
819		samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
820		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
821		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
822	};
823};
824
825&rtc {
826	status = "okay";
827	clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
828	clock-names = "rtc", "rtc_src";
829};
830
831&usbdrd_dwc3_1 {
832	dr_mode = "host";
833};
834
835&usbdrd3_0 {
836	vdd10-supply = <&ldo11_reg>;
837	vdd33-supply = <&ldo9_reg>;
838};
839
840&usbdrd3_1 {
841	vdd10-supply = <&ldo11_reg>;
842	vdd33-supply = <&ldo9_reg>;
843};
844