1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
4 *
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2014 Cogent Embedded Inc.
8 */
9
10#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/power/r8a7791-sysc.h>
14
15/ {
16	compatible = "renesas,r8a7791";
17	#address-cells = <2>;
18	#size-cells = <2>;
19
20	aliases {
21		i2c0 = &i2c0;
22		i2c1 = &i2c1;
23		i2c2 = &i2c2;
24		i2c3 = &i2c3;
25		i2c4 = &i2c4;
26		i2c5 = &i2c5;
27		i2c6 = &i2c6;
28		i2c7 = &i2c7;
29		i2c8 = &i2c8;
30		spi0 = &qspi;
31		spi1 = &msiof0;
32		spi2 = &msiof1;
33		spi3 = &msiof2;
34		vin0 = &vin0;
35		vin1 = &vin1;
36		vin2 = &vin2;
37	};
38
39	/*
40	 * The external audio clocks are configured as 0 Hz fixed frequency
41	 * clocks by default.
42	 * Boards that provide audio clocks should override them.
43	 */
44	audio_clk_a: audio_clk_a {
45		compatible = "fixed-clock";
46		#clock-cells = <0>;
47		clock-frequency = <0>;
48	};
49	audio_clk_b: audio_clk_b {
50		compatible = "fixed-clock";
51		#clock-cells = <0>;
52		clock-frequency = <0>;
53	};
54	audio_clk_c: audio_clk_c {
55		compatible = "fixed-clock";
56		#clock-cells = <0>;
57		clock-frequency = <0>;
58	};
59
60	/* External CAN clock */
61	can_clk: can {
62		compatible = "fixed-clock";
63		#clock-cells = <0>;
64		/* This value must be overridden by the board. */
65		clock-frequency = <0>;
66	};
67
68	cpus {
69		#address-cells = <1>;
70		#size-cells = <0>;
71
72		cpu0: cpu@0 {
73			device_type = "cpu";
74			compatible = "arm,cortex-a15";
75			reg = <0>;
76			clock-frequency = <1500000000>;
77			clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
78			power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
79			enable-method = "renesas,apmu";
80			next-level-cache = <&L2_CA15>;
81			voltage-tolerance = <1>; /* 1% */
82			clock-latency = <300000>; /* 300 us */
83
84			/* kHz - uV - OPPs unknown yet */
85			operating-points = <1500000 1000000>,
86					   <1312500 1000000>,
87					   <1125000 1000000>,
88					   < 937500 1000000>,
89					   < 750000 1000000>,
90					   < 375000 1000000>;
91		};
92
93		cpu1: cpu@1 {
94			device_type = "cpu";
95			compatible = "arm,cortex-a15";
96			reg = <1>;
97			clock-frequency = <1500000000>;
98			clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
99			power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
100			enable-method = "renesas,apmu";
101			next-level-cache = <&L2_CA15>;
102			voltage-tolerance = <1>; /* 1% */
103			clock-latency = <300000>; /* 300 us */
104
105			/* kHz - uV - OPPs unknown yet */
106			operating-points = <1500000 1000000>,
107					   <1312500 1000000>,
108					   <1125000 1000000>,
109					   < 937500 1000000>,
110					   < 750000 1000000>,
111					   < 375000 1000000>;
112		};
113
114		L2_CA15: cache-controller-0 {
115			compatible = "cache";
116			power-domains = <&sysc R8A7791_PD_CA15_SCU>;
117			cache-unified;
118			cache-level = <2>;
119		};
120	};
121
122	/* External root clock */
123	extal_clk: extal {
124		compatible = "fixed-clock";
125		#clock-cells = <0>;
126		/* This value must be overridden by the board. */
127		clock-frequency = <0>;
128	};
129
130	/* External PCIe clock - can be overridden by the board */
131	pcie_bus_clk: pcie_bus {
132		compatible = "fixed-clock";
133		#clock-cells = <0>;
134		clock-frequency = <0>;
135	};
136
137	pmu {
138		compatible = "arm,cortex-a15-pmu";
139		interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
140				      <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
141		interrupt-affinity = <&cpu0>, <&cpu1>;
142	};
143
144	/* External SCIF clock */
145	scif_clk: scif {
146		compatible = "fixed-clock";
147		#clock-cells = <0>;
148		/* This value must be overridden by the board. */
149		clock-frequency = <0>;
150	};
151
152	soc {
153		compatible = "simple-bus";
154		interrupt-parent = <&gic>;
155
156		#address-cells = <2>;
157		#size-cells = <2>;
158		ranges;
159
160		rwdt: watchdog@e6020000 {
161			compatible = "renesas,r8a7791-wdt",
162				     "renesas,rcar-gen2-wdt";
163			reg = <0 0xe6020000 0 0x0c>;
164			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
165			clocks = <&cpg CPG_MOD 402>;
166			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
167			resets = <&cpg 402>;
168			status = "disabled";
169		};
170
171		gpio0: gpio@e6050000 {
172			compatible = "renesas,gpio-r8a7791",
173				     "renesas,rcar-gen2-gpio";
174			reg = <0 0xe6050000 0 0x50>;
175			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
176			#gpio-cells = <2>;
177			gpio-controller;
178			gpio-ranges = <&pfc 0 0 32>;
179			#interrupt-cells = <2>;
180			interrupt-controller;
181			clocks = <&cpg CPG_MOD 912>;
182			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
183			resets = <&cpg 912>;
184		};
185
186		gpio1: gpio@e6051000 {
187			compatible = "renesas,gpio-r8a7791",
188				     "renesas,rcar-gen2-gpio";
189			reg = <0 0xe6051000 0 0x50>;
190			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
191			#gpio-cells = <2>;
192			gpio-controller;
193			gpio-ranges = <&pfc 0 32 26>;
194			#interrupt-cells = <2>;
195			interrupt-controller;
196			clocks = <&cpg CPG_MOD 911>;
197			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
198			resets = <&cpg 911>;
199		};
200
201		gpio2: gpio@e6052000 {
202			compatible = "renesas,gpio-r8a7791",
203				     "renesas,rcar-gen2-gpio";
204			reg = <0 0xe6052000 0 0x50>;
205			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
206			#gpio-cells = <2>;
207			gpio-controller;
208			gpio-ranges = <&pfc 0 64 32>;
209			#interrupt-cells = <2>;
210			interrupt-controller;
211			clocks = <&cpg CPG_MOD 910>;
212			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
213			resets = <&cpg 910>;
214		};
215
216		gpio3: gpio@e6053000 {
217			compatible = "renesas,gpio-r8a7791",
218				     "renesas,rcar-gen2-gpio";
219			reg = <0 0xe6053000 0 0x50>;
220			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
221			#gpio-cells = <2>;
222			gpio-controller;
223			gpio-ranges = <&pfc 0 96 32>;
224			#interrupt-cells = <2>;
225			interrupt-controller;
226			clocks = <&cpg CPG_MOD 909>;
227			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
228			resets = <&cpg 909>;
229		};
230
231		gpio4: gpio@e6054000 {
232			compatible = "renesas,gpio-r8a7791",
233				     "renesas,rcar-gen2-gpio";
234			reg = <0 0xe6054000 0 0x50>;
235			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
236			#gpio-cells = <2>;
237			gpio-controller;
238			gpio-ranges = <&pfc 0 128 32>;
239			#interrupt-cells = <2>;
240			interrupt-controller;
241			clocks = <&cpg CPG_MOD 908>;
242			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
243			resets = <&cpg 908>;
244		};
245
246		gpio5: gpio@e6055000 {
247			compatible = "renesas,gpio-r8a7791",
248				     "renesas,rcar-gen2-gpio";
249			reg = <0 0xe6055000 0 0x50>;
250			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
251			#gpio-cells = <2>;
252			gpio-controller;
253			gpio-ranges = <&pfc 0 160 32>;
254			#interrupt-cells = <2>;
255			interrupt-controller;
256			clocks = <&cpg CPG_MOD 907>;
257			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
258			resets = <&cpg 907>;
259		};
260
261		gpio6: gpio@e6055400 {
262			compatible = "renesas,gpio-r8a7791",
263				     "renesas,rcar-gen2-gpio";
264			reg = <0 0xe6055400 0 0x50>;
265			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
266			#gpio-cells = <2>;
267			gpio-controller;
268			gpio-ranges = <&pfc 0 192 32>;
269			#interrupt-cells = <2>;
270			interrupt-controller;
271			clocks = <&cpg CPG_MOD 905>;
272			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
273			resets = <&cpg 905>;
274		};
275
276		gpio7: gpio@e6055800 {
277			compatible = "renesas,gpio-r8a7791",
278				     "renesas,rcar-gen2-gpio";
279			reg = <0 0xe6055800 0 0x50>;
280			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
281			#gpio-cells = <2>;
282			gpio-controller;
283			gpio-ranges = <&pfc 0 224 26>;
284			#interrupt-cells = <2>;
285			interrupt-controller;
286			clocks = <&cpg CPG_MOD 904>;
287			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
288			resets = <&cpg 904>;
289		};
290
291		pfc: pinctrl@e6060000 {
292			compatible = "renesas,pfc-r8a7791";
293			reg = <0 0xe6060000 0 0x250>;
294		};
295
296		tpu: pwm@e60f0000 {
297			compatible = "renesas,tpu-r8a7791", "renesas,tpu";
298			reg = <0 0xe60f0000 0 0x148>;
299			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
300			clocks = <&cpg CPG_MOD 304>;
301			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
302			resets = <&cpg 304>;
303			#pwm-cells = <3>;
304			status = "disabled";
305		};
306
307		cpg: clock-controller@e6150000 {
308			compatible = "renesas,r8a7791-cpg-mssr";
309			reg = <0 0xe6150000 0 0x1000>;
310			clocks = <&extal_clk>, <&usb_extal_clk>;
311			clock-names = "extal", "usb_extal";
312			#clock-cells = <2>;
313			#power-domain-cells = <0>;
314			#reset-cells = <1>;
315		};
316
317		apmu@e6152000 {
318			compatible = "renesas,r8a7791-apmu", "renesas,apmu";
319			reg = <0 0xe6152000 0 0x188>;
320			cpus = <&cpu0>, <&cpu1>;
321		};
322
323		rst: reset-controller@e6160000 {
324			compatible = "renesas,r8a7791-rst";
325			reg = <0 0xe6160000 0 0x0100>;
326		};
327
328		sysc: system-controller@e6180000 {
329			compatible = "renesas,r8a7791-sysc";
330			reg = <0 0xe6180000 0 0x0200>;
331			#power-domain-cells = <1>;
332		};
333
334		irqc0: interrupt-controller@e61c0000 {
335			compatible = "renesas,irqc-r8a7791", "renesas,irqc";
336			#interrupt-cells = <2>;
337			interrupt-controller;
338			reg = <0 0xe61c0000 0 0x200>;
339			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
340				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
341				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
342				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
343				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
344				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
345				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
346				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
347				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
348				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
349			clocks = <&cpg CPG_MOD 407>;
350			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
351			resets = <&cpg 407>;
352		};
353
354		tmu0: timer@e61e0000 {
355			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
356			reg = <0 0xe61e0000 0 0x30>;
357			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
358				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
359				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
360			interrupt-names = "tuni0", "tuni1", "tuni2";
361			clocks = <&cpg CPG_MOD 125>;
362			clock-names = "fck";
363			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
364			resets = <&cpg 125>;
365			status = "disabled";
366		};
367
368		tmu1: timer@fff60000 {
369			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
370			reg = <0 0xfff60000 0 0x30>;
371			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
372				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
373				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
374				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
375			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
376			clocks = <&cpg CPG_MOD 111>;
377			clock-names = "fck";
378			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
379			resets = <&cpg 111>;
380			status = "disabled";
381		};
382
383		tmu2: timer@fff70000 {
384			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
385			reg = <0 0xfff70000 0 0x30>;
386			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
387				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
388				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
389				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
390			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
391			clocks = <&cpg CPG_MOD 122>;
392			clock-names = "fck";
393			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
394			resets = <&cpg 122>;
395			status = "disabled";
396		};
397
398		tmu3: timer@fff80000 {
399			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
400			reg = <0 0xfff80000 0 0x30>;
401			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
402				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
403				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
404			interrupt-names = "tuni0", "tuni1", "tuni2";
405			clocks = <&cpg CPG_MOD 121>;
406			clock-names = "fck";
407			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
408			resets = <&cpg 121>;
409			status = "disabled";
410		};
411
412		thermal: thermal@e61f0000 {
413			compatible = "renesas,thermal-r8a7791",
414				     "renesas,rcar-gen2-thermal",
415				     "renesas,rcar-thermal";
416			reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
417			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
418			clocks = <&cpg CPG_MOD 522>;
419			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
420			resets = <&cpg 522>;
421			#thermal-sensor-cells = <0>;
422		};
423
424		ipmmu_sy0: iommu@e6280000 {
425			compatible = "renesas,ipmmu-r8a7791",
426				     "renesas,ipmmu-vmsa";
427			reg = <0 0xe6280000 0 0x1000>;
428			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
429				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
430			#iommu-cells = <1>;
431			status = "disabled";
432		};
433
434		ipmmu_sy1: iommu@e6290000 {
435			compatible = "renesas,ipmmu-r8a7791",
436				     "renesas,ipmmu-vmsa";
437			reg = <0 0xe6290000 0 0x1000>;
438			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
439			#iommu-cells = <1>;
440			status = "disabled";
441		};
442
443		ipmmu_ds: iommu@e6740000 {
444			compatible = "renesas,ipmmu-r8a7791",
445				     "renesas,ipmmu-vmsa";
446			reg = <0 0xe6740000 0 0x1000>;
447			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
448				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
449			#iommu-cells = <1>;
450			status = "disabled";
451		};
452
453		ipmmu_mp: iommu@ec680000 {
454			compatible = "renesas,ipmmu-r8a7791",
455				     "renesas,ipmmu-vmsa";
456			reg = <0 0xec680000 0 0x1000>;
457			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
458			#iommu-cells = <1>;
459			status = "disabled";
460		};
461
462		ipmmu_mx: iommu@fe951000 {
463			compatible = "renesas,ipmmu-r8a7791",
464				     "renesas,ipmmu-vmsa";
465			reg = <0 0xfe951000 0 0x1000>;
466			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
467				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
468			#iommu-cells = <1>;
469			status = "disabled";
470		};
471
472		ipmmu_rt: iommu@ffc80000 {
473			compatible = "renesas,ipmmu-r8a7791",
474				     "renesas,ipmmu-vmsa";
475			reg = <0 0xffc80000 0 0x1000>;
476			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
477			#iommu-cells = <1>;
478			status = "disabled";
479		};
480
481		ipmmu_gp: iommu@e62a0000 {
482			compatible = "renesas,ipmmu-r8a7791",
483				     "renesas,ipmmu-vmsa";
484			reg = <0 0xe62a0000 0 0x1000>;
485			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
486				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
487			#iommu-cells = <1>;
488			status = "disabled";
489		};
490
491		icram0:	sram@e63a0000 {
492			compatible = "mmio-sram";
493			reg = <0 0xe63a0000 0 0x12000>;
494			#address-cells = <1>;
495			#size-cells = <1>;
496			ranges = <0 0 0xe63a0000 0x12000>;
497		};
498
499		icram1:	sram@e63c0000 {
500			compatible = "mmio-sram";
501			reg = <0 0xe63c0000 0 0x1000>;
502			#address-cells = <1>;
503			#size-cells = <1>;
504			ranges = <0 0 0xe63c0000 0x1000>;
505
506			smp-sram@0 {
507				compatible = "renesas,smp-sram";
508				reg = <0 0x100>;
509			};
510		};
511
512		/* The memory map in the User's Manual maps the cores to
513		 * bus numbers
514		 */
515		i2c0: i2c@e6508000 {
516			#address-cells = <1>;
517			#size-cells = <0>;
518			compatible = "renesas,i2c-r8a7791",
519				     "renesas,rcar-gen2-i2c";
520			reg = <0 0xe6508000 0 0x40>;
521			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
522			clocks = <&cpg CPG_MOD 931>;
523			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
524			resets = <&cpg 931>;
525			i2c-scl-internal-delay-ns = <6>;
526			status = "disabled";
527		};
528
529		i2c1: i2c@e6518000 {
530			#address-cells = <1>;
531			#size-cells = <0>;
532			compatible = "renesas,i2c-r8a7791",
533				     "renesas,rcar-gen2-i2c";
534			reg = <0 0xe6518000 0 0x40>;
535			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
536			clocks = <&cpg CPG_MOD 930>;
537			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
538			resets = <&cpg 930>;
539			i2c-scl-internal-delay-ns = <6>;
540			status = "disabled";
541		};
542
543		i2c2: i2c@e6530000 {
544			#address-cells = <1>;
545			#size-cells = <0>;
546			compatible = "renesas,i2c-r8a7791",
547				     "renesas,rcar-gen2-i2c";
548			reg = <0 0xe6530000 0 0x40>;
549			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
550			clocks = <&cpg CPG_MOD 929>;
551			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
552			resets = <&cpg 929>;
553			i2c-scl-internal-delay-ns = <6>;
554			status = "disabled";
555		};
556
557		i2c3: i2c@e6540000 {
558			#address-cells = <1>;
559			#size-cells = <0>;
560			compatible = "renesas,i2c-r8a7791",
561				     "renesas,rcar-gen2-i2c";
562			reg = <0 0xe6540000 0 0x40>;
563			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
564			clocks = <&cpg CPG_MOD 928>;
565			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
566			resets = <&cpg 928>;
567			i2c-scl-internal-delay-ns = <6>;
568			status = "disabled";
569		};
570
571		i2c4: i2c@e6520000 {
572			#address-cells = <1>;
573			#size-cells = <0>;
574			compatible = "renesas,i2c-r8a7791",
575				     "renesas,rcar-gen2-i2c";
576			reg = <0 0xe6520000 0 0x40>;
577			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
578			clocks = <&cpg CPG_MOD 927>;
579			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
580			resets = <&cpg 927>;
581			i2c-scl-internal-delay-ns = <6>;
582			status = "disabled";
583		};
584
585		i2c5: i2c@e6528000 {
586			/* doesn't need pinmux */
587			#address-cells = <1>;
588			#size-cells = <0>;
589			compatible = "renesas,i2c-r8a7791",
590				     "renesas,rcar-gen2-i2c";
591			reg = <0 0xe6528000 0 0x40>;
592			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
593			clocks = <&cpg CPG_MOD 925>;
594			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
595			resets = <&cpg 925>;
596			i2c-scl-internal-delay-ns = <110>;
597			status = "disabled";
598		};
599
600		i2c6: i2c@e60b0000 {
601			/* doesn't need pinmux */
602			#address-cells = <1>;
603			#size-cells = <0>;
604			compatible = "renesas,iic-r8a7791",
605				     "renesas,rcar-gen2-iic",
606				     "renesas,rmobile-iic";
607			reg = <0 0xe60b0000 0 0x425>;
608			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
609			clocks = <&cpg CPG_MOD 926>;
610			dmas = <&dmac0 0x77>, <&dmac0 0x78>,
611			       <&dmac1 0x77>, <&dmac1 0x78>;
612			dma-names = "tx", "rx", "tx", "rx";
613			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
614			resets = <&cpg 926>;
615			status = "disabled";
616		};
617
618		i2c7: i2c@e6500000 {
619			#address-cells = <1>;
620			#size-cells = <0>;
621			compatible = "renesas,iic-r8a7791",
622				     "renesas,rcar-gen2-iic",
623				     "renesas,rmobile-iic";
624			reg = <0 0xe6500000 0 0x425>;
625			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
626			clocks = <&cpg CPG_MOD 318>;
627			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
628			       <&dmac1 0x61>, <&dmac1 0x62>;
629			dma-names = "tx", "rx", "tx", "rx";
630			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
631			resets = <&cpg 318>;
632			status = "disabled";
633		};
634
635		i2c8: i2c@e6510000 {
636			#address-cells = <1>;
637			#size-cells = <0>;
638			compatible = "renesas,iic-r8a7791",
639				     "renesas,rcar-gen2-iic",
640				     "renesas,rmobile-iic";
641			reg = <0 0xe6510000 0 0x425>;
642			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
643			clocks = <&cpg CPG_MOD 323>;
644			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
645			       <&dmac1 0x65>, <&dmac1 0x66>;
646			dma-names = "tx", "rx", "tx", "rx";
647			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
648			resets = <&cpg 323>;
649			status = "disabled";
650		};
651
652		hsusb: usb@e6590000 {
653			compatible = "renesas,usbhs-r8a7791",
654				     "renesas,rcar-gen2-usbhs";
655			reg = <0 0xe6590000 0 0x100>;
656			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
657			clocks = <&cpg CPG_MOD 704>;
658			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
659			       <&usb_dmac1 0>, <&usb_dmac1 1>;
660			dma-names = "ch0", "ch1", "ch2", "ch3";
661			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
662			resets = <&cpg 704>;
663			renesas,buswait = <4>;
664			phys = <&usb0 1>;
665			phy-names = "usb";
666			status = "disabled";
667		};
668
669		usbphy: usb-phy-controller@e6590100 {
670			compatible = "renesas,usb-phy-r8a7791",
671				     "renesas,rcar-gen2-usb-phy";
672			reg = <0 0xe6590100 0 0x100>;
673			#address-cells = <1>;
674			#size-cells = <0>;
675			clocks = <&cpg CPG_MOD 704>;
676			clock-names = "usbhs";
677			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
678			resets = <&cpg 704>;
679			status = "disabled";
680
681			usb0: usb-phy@0 {
682				reg = <0>;
683				#phy-cells = <1>;
684			};
685			usb2: usb-phy@2 {
686				reg = <2>;
687				#phy-cells = <1>;
688			};
689		};
690
691		usb_dmac0: dma-controller@e65a0000 {
692			compatible = "renesas,r8a7791-usb-dmac",
693				     "renesas,usb-dmac";
694			reg = <0 0xe65a0000 0 0x100>;
695			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
696				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
697			interrupt-names = "ch0", "ch1";
698			clocks = <&cpg CPG_MOD 330>;
699			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
700			resets = <&cpg 330>;
701			#dma-cells = <1>;
702			dma-channels = <2>;
703		};
704
705		usb_dmac1: dma-controller@e65b0000 {
706			compatible = "renesas,r8a7791-usb-dmac",
707				     "renesas,usb-dmac";
708			reg = <0 0xe65b0000 0 0x100>;
709			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
710				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
711			interrupt-names = "ch0", "ch1";
712			clocks = <&cpg CPG_MOD 331>;
713			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
714			resets = <&cpg 331>;
715			#dma-cells = <1>;
716			dma-channels = <2>;
717		};
718
719		dmac0: dma-controller@e6700000 {
720			compatible = "renesas,dmac-r8a7791",
721				     "renesas,rcar-dmac";
722			reg = <0 0xe6700000 0 0x20000>;
723			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
724				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
725				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
726				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
727				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
728				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
729				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
730				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
731				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
732				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
733				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
734				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
735				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
736				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
737				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
738				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
739			interrupt-names = "error",
740					  "ch0", "ch1", "ch2", "ch3",
741					  "ch4", "ch5", "ch6", "ch7",
742					  "ch8", "ch9", "ch10", "ch11",
743					  "ch12", "ch13", "ch14";
744			clocks = <&cpg CPG_MOD 219>;
745			clock-names = "fck";
746			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
747			resets = <&cpg 219>;
748			#dma-cells = <1>;
749			dma-channels = <15>;
750		};
751
752		dmac1: dma-controller@e6720000 {
753			compatible = "renesas,dmac-r8a7791",
754				     "renesas,rcar-dmac";
755			reg = <0 0xe6720000 0 0x20000>;
756			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
757				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
758				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
759				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
760				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
761				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
762				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
763				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
764				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
765				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
766				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
767				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
768				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
769				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
770				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
771				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
772			interrupt-names = "error",
773					  "ch0", "ch1", "ch2", "ch3",
774					  "ch4", "ch5", "ch6", "ch7",
775					  "ch8", "ch9", "ch10", "ch11",
776					  "ch12", "ch13", "ch14";
777			clocks = <&cpg CPG_MOD 218>;
778			clock-names = "fck";
779			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
780			resets = <&cpg 218>;
781			#dma-cells = <1>;
782			dma-channels = <15>;
783		};
784
785		avb: ethernet@e6800000 {
786			compatible = "renesas,etheravb-r8a7791",
787				     "renesas,etheravb-rcar-gen2";
788			reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
789			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
790			clocks = <&cpg CPG_MOD 812>;
791			clock-names = "fck";
792			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
793			resets = <&cpg 812>;
794			#address-cells = <1>;
795			#size-cells = <0>;
796			status = "disabled";
797		};
798
799		qspi: spi@e6b10000 {
800			compatible = "renesas,qspi-r8a7791", "renesas,qspi";
801			reg = <0 0xe6b10000 0 0x2c>;
802			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
803			clocks = <&cpg CPG_MOD 917>;
804			dmas = <&dmac0 0x17>, <&dmac0 0x18>,
805			       <&dmac1 0x17>, <&dmac1 0x18>;
806			dma-names = "tx", "rx", "tx", "rx";
807			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
808			resets = <&cpg 917>;
809			num-cs = <1>;
810			#address-cells = <1>;
811			#size-cells = <0>;
812			status = "disabled";
813		};
814
815		scifa0: serial@e6c40000 {
816			compatible = "renesas,scifa-r8a7791",
817				     "renesas,rcar-gen2-scifa", "renesas,scifa";
818			reg = <0 0xe6c40000 0 64>;
819			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
820			clocks = <&cpg CPG_MOD 204>;
821			clock-names = "fck";
822			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
823			       <&dmac1 0x21>, <&dmac1 0x22>;
824			dma-names = "tx", "rx", "tx", "rx";
825			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
826			resets = <&cpg 204>;
827			status = "disabled";
828		};
829
830		scifa1: serial@e6c50000 {
831			compatible = "renesas,scifa-r8a7791",
832				     "renesas,rcar-gen2-scifa", "renesas,scifa";
833			reg = <0 0xe6c50000 0 64>;
834			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
835			clocks = <&cpg CPG_MOD 203>;
836			clock-names = "fck";
837			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
838			       <&dmac1 0x25>, <&dmac1 0x26>;
839			dma-names = "tx", "rx", "tx", "rx";
840			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
841			resets = <&cpg 203>;
842			status = "disabled";
843		};
844
845		scifa2: serial@e6c60000 {
846			compatible = "renesas,scifa-r8a7791",
847				     "renesas,rcar-gen2-scifa", "renesas,scifa";
848			reg = <0 0xe6c60000 0 64>;
849			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
850			clocks = <&cpg CPG_MOD 202>;
851			clock-names = "fck";
852			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
853			       <&dmac1 0x27>, <&dmac1 0x28>;
854			dma-names = "tx", "rx", "tx", "rx";
855			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
856			resets = <&cpg 202>;
857			status = "disabled";
858		};
859
860		scifa3: serial@e6c70000 {
861			compatible = "renesas,scifa-r8a7791",
862				     "renesas,rcar-gen2-scifa", "renesas,scifa";
863			reg = <0 0xe6c70000 0 64>;
864			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
865			clocks = <&cpg CPG_MOD 1106>;
866			clock-names = "fck";
867			dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
868			       <&dmac1 0x1b>, <&dmac1 0x1c>;
869			dma-names = "tx", "rx", "tx", "rx";
870			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
871			resets = <&cpg 1106>;
872			status = "disabled";
873		};
874
875		scifa4: serial@e6c78000 {
876			compatible = "renesas,scifa-r8a7791",
877				     "renesas,rcar-gen2-scifa", "renesas,scifa";
878			reg = <0 0xe6c78000 0 64>;
879			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
880			clocks = <&cpg CPG_MOD 1107>;
881			clock-names = "fck";
882			dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
883			       <&dmac1 0x1f>, <&dmac1 0x20>;
884			dma-names = "tx", "rx", "tx", "rx";
885			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
886			resets = <&cpg 1107>;
887			status = "disabled";
888		};
889
890		scifa5: serial@e6c80000 {
891			compatible = "renesas,scifa-r8a7791",
892				     "renesas,rcar-gen2-scifa", "renesas,scifa";
893			reg = <0 0xe6c80000 0 64>;
894			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
895			clocks = <&cpg CPG_MOD 1108>;
896			clock-names = "fck";
897			dmas = <&dmac0 0x23>, <&dmac0 0x24>,
898			       <&dmac1 0x23>, <&dmac1 0x24>;
899			dma-names = "tx", "rx", "tx", "rx";
900			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
901			resets = <&cpg 1108>;
902			status = "disabled";
903		};
904
905		scifb0: serial@e6c20000 {
906			compatible = "renesas,scifb-r8a7791",
907				     "renesas,rcar-gen2-scifb", "renesas,scifb";
908			reg = <0 0xe6c20000 0 0x100>;
909			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
910			clocks = <&cpg CPG_MOD 206>;
911			clock-names = "fck";
912			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
913			       <&dmac1 0x3d>, <&dmac1 0x3e>;
914			dma-names = "tx", "rx", "tx", "rx";
915			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
916			resets = <&cpg 206>;
917			status = "disabled";
918		};
919
920		scifb1: serial@e6c30000 {
921			compatible = "renesas,scifb-r8a7791",
922				     "renesas,rcar-gen2-scifb", "renesas,scifb";
923			reg = <0 0xe6c30000 0 0x100>;
924			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
925			clocks = <&cpg CPG_MOD 207>;
926			clock-names = "fck";
927			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
928			       <&dmac1 0x19>, <&dmac1 0x1a>;
929			dma-names = "tx", "rx", "tx", "rx";
930			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
931			resets = <&cpg 207>;
932			status = "disabled";
933		};
934
935		scifb2: serial@e6ce0000 {
936			compatible = "renesas,scifb-r8a7791",
937				     "renesas,rcar-gen2-scifb", "renesas,scifb";
938			reg = <0 0xe6ce0000 0 0x100>;
939			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
940			clocks = <&cpg CPG_MOD 216>;
941			clock-names = "fck";
942			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
943			       <&dmac1 0x1d>, <&dmac1 0x1e>;
944			dma-names = "tx", "rx", "tx", "rx";
945			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
946			resets = <&cpg 216>;
947			status = "disabled";
948		};
949
950		scif0: serial@e6e60000 {
951			compatible = "renesas,scif-r8a7791",
952				     "renesas,rcar-gen2-scif", "renesas,scif";
953			reg = <0 0xe6e60000 0 64>;
954			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
955			clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
956				 <&scif_clk>;
957			clock-names = "fck", "brg_int", "scif_clk";
958			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
959			       <&dmac1 0x29>, <&dmac1 0x2a>;
960			dma-names = "tx", "rx", "tx", "rx";
961			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
962			resets = <&cpg 721>;
963			status = "disabled";
964		};
965
966		scif1: serial@e6e68000 {
967			compatible = "renesas,scif-r8a7791",
968				     "renesas,rcar-gen2-scif", "renesas,scif";
969			reg = <0 0xe6e68000 0 64>;
970			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
971			clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
972				 <&scif_clk>;
973			clock-names = "fck", "brg_int", "scif_clk";
974			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
975			       <&dmac1 0x2d>, <&dmac1 0x2e>;
976			dma-names = "tx", "rx", "tx", "rx";
977			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
978			resets = <&cpg 720>;
979			status = "disabled";
980		};
981
982		scif2: serial@e6e58000 {
983			compatible = "renesas,scif-r8a7791",
984				     "renesas,rcar-gen2-scif", "renesas,scif";
985			reg = <0 0xe6e58000 0 64>;
986			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
987			clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
988				 <&scif_clk>;
989			clock-names = "fck", "brg_int", "scif_clk";
990			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
991			       <&dmac1 0x2b>, <&dmac1 0x2c>;
992			dma-names = "tx", "rx", "tx", "rx";
993			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
994			resets = <&cpg 719>;
995			status = "disabled";
996		};
997
998		scif3: serial@e6ea8000 {
999			compatible = "renesas,scif-r8a7791",
1000				     "renesas,rcar-gen2-scif", "renesas,scif";
1001			reg = <0 0xe6ea8000 0 64>;
1002			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1003			clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
1004				 <&scif_clk>;
1005			clock-names = "fck", "brg_int", "scif_clk";
1006			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
1007			       <&dmac1 0x2f>, <&dmac1 0x30>;
1008			dma-names = "tx", "rx", "tx", "rx";
1009			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1010			resets = <&cpg 718>;
1011			status = "disabled";
1012		};
1013
1014		scif4: serial@e6ee0000 {
1015			compatible = "renesas,scif-r8a7791",
1016				     "renesas,rcar-gen2-scif", "renesas,scif";
1017			reg = <0 0xe6ee0000 0 64>;
1018			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1019			clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
1020				 <&scif_clk>;
1021			clock-names = "fck", "brg_int", "scif_clk";
1022			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
1023			       <&dmac1 0xfb>, <&dmac1 0xfc>;
1024			dma-names = "tx", "rx", "tx", "rx";
1025			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1026			resets = <&cpg 715>;
1027			status = "disabled";
1028		};
1029
1030		scif5: serial@e6ee8000 {
1031			compatible = "renesas,scif-r8a7791",
1032				     "renesas,rcar-gen2-scif", "renesas,scif";
1033			reg = <0 0xe6ee8000 0 64>;
1034			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1035			clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
1036				 <&scif_clk>;
1037			clock-names = "fck", "brg_int", "scif_clk";
1038			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
1039			       <&dmac1 0xfd>, <&dmac1 0xfe>;
1040			dma-names = "tx", "rx", "tx", "rx";
1041			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1042			resets = <&cpg 714>;
1043			status = "disabled";
1044		};
1045
1046		hscif0: serial@e62c0000 {
1047			compatible = "renesas,hscif-r8a7791",
1048				     "renesas,rcar-gen2-hscif", "renesas,hscif";
1049			reg = <0 0xe62c0000 0 96>;
1050			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
1051			clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
1052				 <&scif_clk>;
1053			clock-names = "fck", "brg_int", "scif_clk";
1054			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
1055			       <&dmac1 0x39>, <&dmac1 0x3a>;
1056			dma-names = "tx", "rx", "tx", "rx";
1057			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1058			resets = <&cpg 717>;
1059			status = "disabled";
1060		};
1061
1062		hscif1: serial@e62c8000 {
1063			compatible = "renesas,hscif-r8a7791",
1064				     "renesas,rcar-gen2-hscif", "renesas,hscif";
1065			reg = <0 0xe62c8000 0 96>;
1066			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
1067			clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
1068				 <&scif_clk>;
1069			clock-names = "fck", "brg_int", "scif_clk";
1070			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
1071			       <&dmac1 0x4d>, <&dmac1 0x4e>;
1072			dma-names = "tx", "rx", "tx", "rx";
1073			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1074			resets = <&cpg 716>;
1075			status = "disabled";
1076		};
1077
1078		hscif2: serial@e62d0000 {
1079			compatible = "renesas,hscif-r8a7791",
1080				     "renesas,rcar-gen2-hscif", "renesas,hscif";
1081			reg = <0 0xe62d0000 0 96>;
1082			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1083			clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
1084				 <&scif_clk>;
1085			clock-names = "fck", "brg_int", "scif_clk";
1086			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
1087			       <&dmac1 0x3b>, <&dmac1 0x3c>;
1088			dma-names = "tx", "rx", "tx", "rx";
1089			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1090			resets = <&cpg 713>;
1091			status = "disabled";
1092		};
1093
1094		msiof0: spi@e6e20000 {
1095			compatible = "renesas,msiof-r8a7791",
1096				     "renesas,rcar-gen2-msiof";
1097			reg = <0 0xe6e20000 0 0x0064>;
1098			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1099			clocks = <&cpg CPG_MOD 000>;
1100			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1101			       <&dmac1 0x51>, <&dmac1 0x52>;
1102			dma-names = "tx", "rx", "tx", "rx";
1103			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1104			resets = <&cpg 0>;
1105			#address-cells = <1>;
1106			#size-cells = <0>;
1107			status = "disabled";
1108		};
1109
1110		msiof1: spi@e6e10000 {
1111			compatible = "renesas,msiof-r8a7791",
1112				     "renesas,rcar-gen2-msiof";
1113			reg = <0 0xe6e10000 0 0x0064>;
1114			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1115			clocks = <&cpg CPG_MOD 208>;
1116			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1117			       <&dmac1 0x55>, <&dmac1 0x56>;
1118			dma-names = "tx", "rx", "tx", "rx";
1119			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1120			resets = <&cpg 208>;
1121			#address-cells = <1>;
1122			#size-cells = <0>;
1123			status = "disabled";
1124		};
1125
1126		msiof2: spi@e6e00000 {
1127			compatible = "renesas,msiof-r8a7791",
1128				     "renesas,rcar-gen2-msiof";
1129			reg = <0 0xe6e00000 0 0x0064>;
1130			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1131			clocks = <&cpg CPG_MOD 205>;
1132			dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1133			       <&dmac1 0x41>, <&dmac1 0x42>;
1134			dma-names = "tx", "rx", "tx", "rx";
1135			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1136			resets = <&cpg 205>;
1137			#address-cells = <1>;
1138			#size-cells = <0>;
1139			status = "disabled";
1140		};
1141
1142		pwm0: pwm@e6e30000 {
1143			compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1144			reg = <0 0xe6e30000 0 0x8>;
1145			clocks = <&cpg CPG_MOD 523>;
1146			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1147			resets = <&cpg 523>;
1148			#pwm-cells = <2>;
1149			status = "disabled";
1150		};
1151
1152		pwm1: pwm@e6e31000 {
1153			compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1154			reg = <0 0xe6e31000 0 0x8>;
1155			clocks = <&cpg CPG_MOD 523>;
1156			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1157			resets = <&cpg 523>;
1158			#pwm-cells = <2>;
1159			status = "disabled";
1160		};
1161
1162		pwm2: pwm@e6e32000 {
1163			compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1164			reg = <0 0xe6e32000 0 0x8>;
1165			clocks = <&cpg CPG_MOD 523>;
1166			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1167			resets = <&cpg 523>;
1168			#pwm-cells = <2>;
1169			status = "disabled";
1170		};
1171
1172		pwm3: pwm@e6e33000 {
1173			compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1174			reg = <0 0xe6e33000 0 0x8>;
1175			clocks = <&cpg CPG_MOD 523>;
1176			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1177			resets = <&cpg 523>;
1178			#pwm-cells = <2>;
1179			status = "disabled";
1180		};
1181
1182		pwm4: pwm@e6e34000 {
1183			compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1184			reg = <0 0xe6e34000 0 0x8>;
1185			clocks = <&cpg CPG_MOD 523>;
1186			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1187			resets = <&cpg 523>;
1188			#pwm-cells = <2>;
1189			status = "disabled";
1190		};
1191
1192		pwm5: pwm@e6e35000 {
1193			compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1194			reg = <0 0xe6e35000 0 0x8>;
1195			clocks = <&cpg CPG_MOD 523>;
1196			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1197			resets = <&cpg 523>;
1198			#pwm-cells = <2>;
1199			status = "disabled";
1200		};
1201
1202		pwm6: pwm@e6e36000 {
1203			compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1204			reg = <0 0xe6e36000 0 0x8>;
1205			clocks = <&cpg CPG_MOD 523>;
1206			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1207			resets = <&cpg 523>;
1208			#pwm-cells = <2>;
1209			status = "disabled";
1210		};
1211
1212		adc: adc@e6e54000 {
1213			compatible = "renesas,r8a7791-gyroadc",
1214				     "renesas,rcar-gyroadc";
1215			reg = <0 0xe6e54000 0 64>;
1216			clocks = <&cpg CPG_MOD 901>;
1217			clock-names = "fck";
1218			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1219			resets = <&cpg 901>;
1220			status = "disabled";
1221		};
1222
1223		can0: can@e6e80000 {
1224			compatible = "renesas,can-r8a7791",
1225				     "renesas,rcar-gen2-can";
1226			reg = <0 0xe6e80000 0 0x1000>;
1227			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1228			clocks = <&cpg CPG_MOD 916>,
1229				 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
1230			clock-names = "clkp1", "clkp2", "can_clk";
1231			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1232			resets = <&cpg 916>;
1233			status = "disabled";
1234		};
1235
1236		can1: can@e6e88000 {
1237			compatible = "renesas,can-r8a7791",
1238				     "renesas,rcar-gen2-can";
1239			reg = <0 0xe6e88000 0 0x1000>;
1240			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1241			clocks = <&cpg CPG_MOD 915>,
1242				 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
1243			clock-names = "clkp1", "clkp2", "can_clk";
1244			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1245			resets = <&cpg 915>;
1246			status = "disabled";
1247		};
1248
1249		vin0: video@e6ef0000 {
1250			compatible = "renesas,vin-r8a7791",
1251				     "renesas,rcar-gen2-vin";
1252			reg = <0 0xe6ef0000 0 0x1000>;
1253			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1254			clocks = <&cpg CPG_MOD 811>;
1255			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1256			resets = <&cpg 811>;
1257			status = "disabled";
1258		};
1259
1260		vin1: video@e6ef1000 {
1261			compatible = "renesas,vin-r8a7791",
1262				     "renesas,rcar-gen2-vin";
1263			reg = <0 0xe6ef1000 0 0x1000>;
1264			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1265			clocks = <&cpg CPG_MOD 810>;
1266			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1267			resets = <&cpg 810>;
1268			status = "disabled";
1269		};
1270
1271		vin2: video@e6ef2000 {
1272			compatible = "renesas,vin-r8a7791",
1273				     "renesas,rcar-gen2-vin";
1274			reg = <0 0xe6ef2000 0 0x1000>;
1275			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1276			clocks = <&cpg CPG_MOD 809>;
1277			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1278			resets = <&cpg 809>;
1279			status = "disabled";
1280		};
1281
1282		rcar_sound: sound@ec500000 {
1283			/*
1284			 * #sound-dai-cells is required if simple-card
1285			 *
1286			 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1287			 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1288			 */
1289			compatible = "renesas,rcar_sound-r8a7791",
1290				     "renesas,rcar_sound-gen2";
1291			reg = <0 0xec500000 0 0x1000>, /* SCU */
1292			      <0 0xec5a0000 0 0x100>,  /* ADG */
1293			      <0 0xec540000 0 0x1000>, /* SSIU */
1294			      <0 0xec541000 0 0x280>,  /* SSI */
1295			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1296			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1297
1298			clocks = <&cpg CPG_MOD 1005>,
1299				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1300				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1301				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1302				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1303				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1304				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1305				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1306				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1307				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1308				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1309				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1310				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1311				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1312				 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1313				 <&cpg CPG_CORE R8A7791_CLK_M2>;
1314			clock-names = "ssi-all",
1315				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1316				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1317				      "ssi.1", "ssi.0", "src.9", "src.8",
1318				      "src.7", "src.6", "src.5", "src.4",
1319				      "src.3", "src.2", "src.1", "src.0",
1320				      "ctu.0", "ctu.1",
1321				      "mix.0", "mix.1",
1322				      "dvc.0", "dvc.1",
1323				      "clk_a", "clk_b", "clk_c", "clk_i";
1324			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1325			resets = <&cpg 1005>,
1326				 <&cpg 1006>, <&cpg 1007>,
1327				 <&cpg 1008>, <&cpg 1009>,
1328				 <&cpg 1010>, <&cpg 1011>,
1329				 <&cpg 1012>, <&cpg 1013>,
1330				 <&cpg 1014>, <&cpg 1015>;
1331			reset-names = "ssi-all",
1332				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1333				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1334				      "ssi.1", "ssi.0";
1335
1336			status = "disabled";
1337
1338			rcar_sound,dvc {
1339				dvc0: dvc-0 {
1340					dmas = <&audma1 0xbc>;
1341					dma-names = "tx";
1342				};
1343				dvc1: dvc-1 {
1344					dmas = <&audma1 0xbe>;
1345					dma-names = "tx";
1346				};
1347			};
1348
1349			rcar_sound,mix {
1350				mix0: mix-0 { };
1351				mix1: mix-1 { };
1352			};
1353
1354			rcar_sound,ctu {
1355				ctu00: ctu-0 { };
1356				ctu01: ctu-1 { };
1357				ctu02: ctu-2 { };
1358				ctu03: ctu-3 { };
1359				ctu10: ctu-4 { };
1360				ctu11: ctu-5 { };
1361				ctu12: ctu-6 { };
1362				ctu13: ctu-7 { };
1363			};
1364
1365			rcar_sound,src {
1366				src0: src-0 {
1367					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1368					dmas = <&audma0 0x85>, <&audma1 0x9a>;
1369					dma-names = "rx", "tx";
1370				};
1371				src1: src-1 {
1372					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1373					dmas = <&audma0 0x87>, <&audma1 0x9c>;
1374					dma-names = "rx", "tx";
1375				};
1376				src2: src-2 {
1377					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1378					dmas = <&audma0 0x89>, <&audma1 0x9e>;
1379					dma-names = "rx", "tx";
1380				};
1381				src3: src-3 {
1382					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1383					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1384					dma-names = "rx", "tx";
1385				};
1386				src4: src-4 {
1387					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1388					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1389					dma-names = "rx", "tx";
1390				};
1391				src5: src-5 {
1392					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1393					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1394					dma-names = "rx", "tx";
1395				};
1396				src6: src-6 {
1397					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1398					dmas = <&audma0 0x91>, <&audma1 0xb4>;
1399					dma-names = "rx", "tx";
1400				};
1401				src7: src-7 {
1402					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1403					dmas = <&audma0 0x93>, <&audma1 0xb6>;
1404					dma-names = "rx", "tx";
1405				};
1406				src8: src-8 {
1407					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1408					dmas = <&audma0 0x95>, <&audma1 0xb8>;
1409					dma-names = "rx", "tx";
1410				};
1411				src9: src-9 {
1412					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1413					dmas = <&audma0 0x97>, <&audma1 0xba>;
1414					dma-names = "rx", "tx";
1415				};
1416			};
1417
1418			rcar_sound,ssi {
1419				ssi0: ssi-0 {
1420					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1421					dmas = <&audma0 0x01>, <&audma1 0x02>,
1422					       <&audma0 0x15>, <&audma1 0x16>;
1423					dma-names = "rx", "tx", "rxu", "txu";
1424				};
1425				ssi1: ssi-1 {
1426					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1427					dmas = <&audma0 0x03>, <&audma1 0x04>,
1428					       <&audma0 0x49>, <&audma1 0x4a>;
1429					dma-names = "rx", "tx", "rxu", "txu";
1430				};
1431				ssi2: ssi-2 {
1432					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1433					dmas = <&audma0 0x05>, <&audma1 0x06>,
1434					       <&audma0 0x63>, <&audma1 0x64>;
1435					dma-names = "rx", "tx", "rxu", "txu";
1436				};
1437				ssi3: ssi-3 {
1438					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1439					dmas = <&audma0 0x07>, <&audma1 0x08>,
1440					       <&audma0 0x6f>, <&audma1 0x70>;
1441					dma-names = "rx", "tx", "rxu", "txu";
1442				};
1443				ssi4: ssi-4 {
1444					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1445					dmas = <&audma0 0x09>, <&audma1 0x0a>,
1446					       <&audma0 0x71>, <&audma1 0x72>;
1447					dma-names = "rx", "tx", "rxu", "txu";
1448				};
1449				ssi5: ssi-5 {
1450					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1451					dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1452					       <&audma0 0x73>, <&audma1 0x74>;
1453					dma-names = "rx", "tx", "rxu", "txu";
1454				};
1455				ssi6: ssi-6 {
1456					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1457					dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1458					       <&audma0 0x75>, <&audma1 0x76>;
1459					dma-names = "rx", "tx", "rxu", "txu";
1460				};
1461				ssi7: ssi-7 {
1462					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1463					dmas = <&audma0 0x0f>, <&audma1 0x10>,
1464					       <&audma0 0x79>, <&audma1 0x7a>;
1465					dma-names = "rx", "tx", "rxu", "txu";
1466				};
1467				ssi8: ssi-8 {
1468					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1469					dmas = <&audma0 0x11>, <&audma1 0x12>,
1470					       <&audma0 0x7b>, <&audma1 0x7c>;
1471					dma-names = "rx", "tx", "rxu", "txu";
1472				};
1473				ssi9: ssi-9 {
1474					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1475					dmas = <&audma0 0x13>, <&audma1 0x14>,
1476					       <&audma0 0x7d>, <&audma1 0x7e>;
1477					dma-names = "rx", "tx", "rxu", "txu";
1478				};
1479			};
1480		};
1481
1482		audma0: dma-controller@ec700000 {
1483			compatible = "renesas,dmac-r8a7791",
1484				     "renesas,rcar-dmac";
1485			reg = <0 0xec700000 0 0x10000>;
1486			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1487				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1488				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1489				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1490				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1491				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1492				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1493				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1494				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1495				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1496				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1497				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1498				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1499				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1500			interrupt-names = "error",
1501					  "ch0", "ch1", "ch2", "ch3",
1502					  "ch4", "ch5", "ch6", "ch7",
1503					  "ch8", "ch9", "ch10", "ch11",
1504					  "ch12";
1505			clocks = <&cpg CPG_MOD 502>;
1506			clock-names = "fck";
1507			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1508			resets = <&cpg 502>;
1509			#dma-cells = <1>;
1510			dma-channels = <13>;
1511		};
1512
1513		audma1: dma-controller@ec720000 {
1514			compatible = "renesas,dmac-r8a7791",
1515				     "renesas,rcar-dmac";
1516			reg = <0 0xec720000 0 0x10000>;
1517			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1518				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1519				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1520				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1521				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1522				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1523				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1524				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1525				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1526				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1527				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1528				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1529				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1530				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1531			interrupt-names = "error",
1532					  "ch0", "ch1", "ch2", "ch3",
1533					  "ch4", "ch5", "ch6", "ch7",
1534					  "ch8", "ch9", "ch10", "ch11",
1535					  "ch12";
1536			clocks = <&cpg CPG_MOD 501>;
1537			clock-names = "fck";
1538			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1539			resets = <&cpg 501>;
1540			#dma-cells = <1>;
1541			dma-channels = <13>;
1542		};
1543
1544		xhci: usb@ee000000 {
1545			compatible = "renesas,xhci-r8a7791",
1546				     "renesas,rcar-gen2-xhci";
1547			reg = <0 0xee000000 0 0xc00>;
1548			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1549			clocks = <&cpg CPG_MOD 328>;
1550			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1551			resets = <&cpg 328>;
1552			phys = <&usb2 1>;
1553			phy-names = "usb";
1554			status = "disabled";
1555		};
1556
1557		pci0: pci@ee090000 {
1558			compatible = "renesas,pci-r8a7791",
1559				     "renesas,pci-rcar-gen2";
1560			device_type = "pci";
1561			reg = <0 0xee090000 0 0xc00>,
1562			      <0 0xee080000 0 0x1100>;
1563			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1564			clocks = <&cpg CPG_MOD 703>;
1565			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1566			resets = <&cpg 703>;
1567			status = "disabled";
1568
1569			bus-range = <0 0>;
1570			#address-cells = <3>;
1571			#size-cells = <2>;
1572			#interrupt-cells = <1>;
1573			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1574			interrupt-map-mask = <0xf800 0 0 0x7>;
1575			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1576					<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1577					<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1578
1579			usb@1,0 {
1580				reg = <0x800 0 0 0 0>;
1581				phys = <&usb0 0>;
1582				phy-names = "usb";
1583			};
1584
1585			usb@2,0 {
1586				reg = <0x1000 0 0 0 0>;
1587				phys = <&usb0 0>;
1588				phy-names = "usb";
1589			};
1590		};
1591
1592		pci1: pci@ee0d0000 {
1593			compatible = "renesas,pci-r8a7791",
1594				     "renesas,pci-rcar-gen2";
1595			device_type = "pci";
1596			reg = <0 0xee0d0000 0 0xc00>,
1597			      <0 0xee0c0000 0 0x1100>;
1598			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1599			clocks = <&cpg CPG_MOD 703>;
1600			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1601			resets = <&cpg 703>;
1602			status = "disabled";
1603
1604			bus-range = <1 1>;
1605			#address-cells = <3>;
1606			#size-cells = <2>;
1607			#interrupt-cells = <1>;
1608			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1609			interrupt-map-mask = <0xf800 0 0 0x7>;
1610			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1611					<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1612					<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1613
1614			usb@1,0 {
1615				reg = <0x10800 0 0 0 0>;
1616				phys = <&usb2 0>;
1617				phy-names = "usb";
1618			};
1619
1620			usb@2,0 {
1621				reg = <0x11000 0 0 0 0>;
1622				phys = <&usb2 0>;
1623				phy-names = "usb";
1624			};
1625		};
1626
1627		sdhi0: mmc@ee100000 {
1628			compatible = "renesas,sdhi-r8a7791",
1629				     "renesas,rcar-gen2-sdhi";
1630			reg = <0 0xee100000 0 0x328>;
1631			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1632			clocks = <&cpg CPG_MOD 314>;
1633			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1634			       <&dmac1 0xcd>, <&dmac1 0xce>;
1635			dma-names = "tx", "rx", "tx", "rx";
1636			max-frequency = <195000000>;
1637			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1638			resets = <&cpg 314>;
1639			status = "disabled";
1640		};
1641
1642		sdhi1: mmc@ee140000 {
1643			compatible = "renesas,sdhi-r8a7791",
1644				     "renesas,rcar-gen2-sdhi";
1645			reg = <0 0xee140000 0 0x100>;
1646			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1647			clocks = <&cpg CPG_MOD 312>;
1648			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1649			       <&dmac1 0xc1>, <&dmac1 0xc2>;
1650			dma-names = "tx", "rx", "tx", "rx";
1651			max-frequency = <97500000>;
1652			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1653			resets = <&cpg 312>;
1654			status = "disabled";
1655		};
1656
1657		sdhi2: mmc@ee160000 {
1658			compatible = "renesas,sdhi-r8a7791",
1659				     "renesas,rcar-gen2-sdhi";
1660			reg = <0 0xee160000 0 0x100>;
1661			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1662			clocks = <&cpg CPG_MOD 311>;
1663			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1664			       <&dmac1 0xd3>, <&dmac1 0xd4>;
1665			dma-names = "tx", "rx", "tx", "rx";
1666			max-frequency = <97500000>;
1667			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1668			resets = <&cpg 311>;
1669			status = "disabled";
1670		};
1671
1672		mmcif0: mmc@ee200000 {
1673			compatible = "renesas,mmcif-r8a7791",
1674				     "renesas,sh-mmcif";
1675			reg = <0 0xee200000 0 0x80>;
1676			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1677			clocks = <&cpg CPG_MOD 315>;
1678			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1679			       <&dmac1 0xd1>, <&dmac1 0xd2>;
1680			dma-names = "tx", "rx", "tx", "rx";
1681			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1682			resets = <&cpg 315>;
1683			reg-io-width = <4>;
1684			status = "disabled";
1685			max-frequency = <97500000>;
1686		};
1687
1688		sata0: sata@ee300000 {
1689			compatible = "renesas,sata-r8a7791",
1690				     "renesas,rcar-gen2-sata";
1691			reg = <0 0xee300000 0 0x200000>;
1692			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1693			clocks = <&cpg CPG_MOD 815>;
1694			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1695			resets = <&cpg 815>;
1696			status = "disabled";
1697		};
1698
1699		sata1: sata@ee500000 {
1700			compatible = "renesas,sata-r8a7791",
1701				     "renesas,rcar-gen2-sata";
1702			reg = <0 0xee500000 0 0x200000>;
1703			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1704			clocks = <&cpg CPG_MOD 814>;
1705			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1706			resets = <&cpg 814>;
1707			status = "disabled";
1708		};
1709
1710		ether: ethernet@ee700000 {
1711			compatible = "renesas,ether-r8a7791",
1712				     "renesas,rcar-gen2-ether";
1713			reg = <0 0xee700000 0 0x400>;
1714			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1715			clocks = <&cpg CPG_MOD 813>;
1716			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1717			resets = <&cpg 813>;
1718			phy-mode = "rmii";
1719			#address-cells = <1>;
1720			#size-cells = <0>;
1721			status = "disabled";
1722		};
1723
1724		gic: interrupt-controller@f1001000 {
1725			compatible = "arm,gic-400";
1726			#interrupt-cells = <3>;
1727			#address-cells = <0>;
1728			interrupt-controller;
1729			reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1730			      <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1731			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1732			clocks = <&cpg CPG_MOD 408>;
1733			clock-names = "clk";
1734			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1735			resets = <&cpg 408>;
1736		};
1737
1738		pciec: pcie@fe000000 {
1739			compatible = "renesas,pcie-r8a7791",
1740				     "renesas,pcie-rcar-gen2";
1741			reg = <0 0xfe000000 0 0x80000>;
1742			#address-cells = <3>;
1743			#size-cells = <2>;
1744			bus-range = <0x00 0xff>;
1745			device_type = "pci";
1746			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1747				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1748				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1749				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1750			/* Map all possible DDR as inbound ranges */
1751			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1752				     <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1753			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1754				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1755				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1756			#interrupt-cells = <1>;
1757			interrupt-map-mask = <0 0 0 0>;
1758			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1759			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1760			clock-names = "pcie", "pcie_bus";
1761			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1762			resets = <&cpg 319>;
1763			status = "disabled";
1764		};
1765
1766		vsp@fe928000 {
1767			compatible = "renesas,vsp1";
1768			reg = <0 0xfe928000 0 0x8000>;
1769			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1770			clocks = <&cpg CPG_MOD 131>;
1771			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1772			resets = <&cpg 131>;
1773		};
1774
1775		vsp@fe930000 {
1776			compatible = "renesas,vsp1";
1777			reg = <0 0xfe930000 0 0x8000>;
1778			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1779			clocks = <&cpg CPG_MOD 128>;
1780			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1781			resets = <&cpg 128>;
1782		};
1783
1784		vsp@fe938000 {
1785			compatible = "renesas,vsp1";
1786			reg = <0 0xfe938000 0 0x8000>;
1787			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1788			clocks = <&cpg CPG_MOD 127>;
1789			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1790			resets = <&cpg 127>;
1791		};
1792
1793		fdp1@fe940000 {
1794			compatible = "renesas,fdp1";
1795			reg = <0 0xfe940000 0 0x2400>;
1796			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1797			clocks = <&cpg CPG_MOD 119>;
1798			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1799			resets = <&cpg 119>;
1800		};
1801
1802		fdp1@fe944000 {
1803			compatible = "renesas,fdp1";
1804			reg = <0 0xfe944000 0 0x2400>;
1805			interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1806			clocks = <&cpg CPG_MOD 118>;
1807			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1808			resets = <&cpg 118>;
1809		};
1810
1811		jpu: jpeg-codec@fe980000 {
1812			compatible = "renesas,jpu-r8a7791",
1813				     "renesas,rcar-gen2-jpu";
1814			reg = <0 0xfe980000 0 0x10300>;
1815			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1816			clocks = <&cpg CPG_MOD 106>;
1817			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1818			resets = <&cpg 106>;
1819		};
1820
1821		du: display@feb00000 {
1822			compatible = "renesas,du-r8a7791";
1823			reg = <0 0xfeb00000 0 0x40000>;
1824			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1825				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1826			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1827			clock-names = "du.0", "du.1";
1828			resets = <&cpg 724>;
1829			reset-names = "du.0";
1830			status = "disabled";
1831
1832			ports {
1833				#address-cells = <1>;
1834				#size-cells = <0>;
1835
1836				port@0 {
1837					reg = <0>;
1838					du_out_rgb: endpoint {
1839					};
1840				};
1841				port@1 {
1842					reg = <1>;
1843					du_out_lvds0: endpoint {
1844						remote-endpoint = <&lvds0_in>;
1845					};
1846				};
1847			};
1848		};
1849
1850		lvds0: lvds@feb90000 {
1851			compatible = "renesas,r8a7791-lvds";
1852			reg = <0 0xfeb90000 0 0x1c>;
1853			clocks = <&cpg CPG_MOD 726>;
1854			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1855			resets = <&cpg 726>;
1856			status = "disabled";
1857
1858			ports {
1859				#address-cells = <1>;
1860				#size-cells = <0>;
1861
1862				port@0 {
1863					reg = <0>;
1864					lvds0_in: endpoint {
1865						remote-endpoint = <&du_out_lvds0>;
1866					};
1867				};
1868				port@1 {
1869					reg = <1>;
1870					lvds0_out: endpoint {
1871					};
1872				};
1873			};
1874		};
1875
1876		prr: chipid@ff000044 {
1877			compatible = "renesas,prr";
1878			reg = <0 0xff000044 0 4>;
1879		};
1880
1881		cmt0: timer@ffca0000 {
1882			compatible = "renesas,r8a7791-cmt0",
1883				     "renesas,rcar-gen2-cmt0";
1884			reg = <0 0xffca0000 0 0x1004>;
1885			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1886				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1887			clocks = <&cpg CPG_MOD 124>;
1888			clock-names = "fck";
1889			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1890			resets = <&cpg 124>;
1891
1892			status = "disabled";
1893		};
1894
1895		cmt1: timer@e6130000 {
1896			compatible = "renesas,r8a7791-cmt1",
1897				     "renesas,rcar-gen2-cmt1";
1898			reg = <0 0xe6130000 0 0x1004>;
1899			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1900				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1901				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1902				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1903				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1904				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1905				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1906				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1907			clocks = <&cpg CPG_MOD 329>;
1908			clock-names = "fck";
1909			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1910			resets = <&cpg 329>;
1911
1912			status = "disabled";
1913		};
1914	};
1915
1916	thermal-zones {
1917		cpu_thermal: cpu-thermal {
1918			polling-delay-passive = <0>;
1919			polling-delay = <0>;
1920
1921			thermal-sensors = <&thermal>;
1922
1923			trips {
1924				cpu-crit {
1925					temperature = <95000>;
1926					hysteresis = <0>;
1927					type = "critical";
1928				};
1929			};
1930			cooling-maps {
1931			};
1932		};
1933	};
1934
1935	timer {
1936		compatible = "arm,armv7-timer";
1937		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1938				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1939				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1940				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1941	};
1942
1943	/* External USB clock - can be overridden by the board */
1944	usb_extal_clk: usb_extal {
1945		compatible = "fixed-clock";
1946		#clock-cells = <0>;
1947		clock-frequency = <48000000>;
1948	};
1949};
1950