1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd
4 *              http://www.samsung.com
5 */
6
7#ifndef __LINUX_MFD_SEC_RTC_H
8#define __LINUX_MFD_SEC_RTC_H
9
10enum s5m_rtc_reg {
11	S5M_RTC_SEC,
12	S5M_RTC_MIN,
13	S5M_RTC_HOUR,
14	S5M_RTC_WEEKDAY,
15	S5M_RTC_DATE,
16	S5M_RTC_MONTH,
17	S5M_RTC_YEAR1,
18	S5M_RTC_YEAR2,
19	S5M_ALARM0_SEC,
20	S5M_ALARM0_MIN,
21	S5M_ALARM0_HOUR,
22	S5M_ALARM0_WEEKDAY,
23	S5M_ALARM0_DATE,
24	S5M_ALARM0_MONTH,
25	S5M_ALARM0_YEAR1,
26	S5M_ALARM0_YEAR2,
27	S5M_ALARM1_SEC,
28	S5M_ALARM1_MIN,
29	S5M_ALARM1_HOUR,
30	S5M_ALARM1_WEEKDAY,
31	S5M_ALARM1_DATE,
32	S5M_ALARM1_MONTH,
33	S5M_ALARM1_YEAR1,
34	S5M_ALARM1_YEAR2,
35	S5M_ALARM0_CONF,
36	S5M_ALARM1_CONF,
37	S5M_RTC_STATUS,
38	S5M_WTSR_SMPL_CNTL,
39	S5M_RTC_UDR_CON,
40
41	S5M_RTC_REG_MAX,
42};
43
44enum s2mps_rtc_reg {
45	S2MPS_RTC_CTRL,
46	S2MPS_WTSR_SMPL_CNTL,
47	S2MPS_RTC_UDR_CON,
48	S2MPS_RSVD,
49	S2MPS_RTC_SEC,
50	S2MPS_RTC_MIN,
51	S2MPS_RTC_HOUR,
52	S2MPS_RTC_WEEKDAY,
53	S2MPS_RTC_DATE,
54	S2MPS_RTC_MONTH,
55	S2MPS_RTC_YEAR,
56	S2MPS_ALARM0_SEC,
57	S2MPS_ALARM0_MIN,
58	S2MPS_ALARM0_HOUR,
59	S2MPS_ALARM0_WEEKDAY,
60	S2MPS_ALARM0_DATE,
61	S2MPS_ALARM0_MONTH,
62	S2MPS_ALARM0_YEAR,
63	S2MPS_ALARM1_SEC,
64	S2MPS_ALARM1_MIN,
65	S2MPS_ALARM1_HOUR,
66	S2MPS_ALARM1_WEEKDAY,
67	S2MPS_ALARM1_DATE,
68	S2MPS_ALARM1_MONTH,
69	S2MPS_ALARM1_YEAR,
70	S2MPS_OFFSRC,
71
72	S2MPS_RTC_REG_MAX,
73};
74
75#define RTC_I2C_ADDR		(0x0C >> 1)
76
77#define HOUR_12			(1 << 7)
78#define HOUR_AMPM		(1 << 6)
79#define HOUR_PM			(1 << 5)
80#define S5M_ALARM0_STATUS	(1 << 1)
81#define S5M_ALARM1_STATUS	(1 << 2)
82#define S5M_UPDATE_AD		(1 << 0)
83
84#define S2MPS_ALARM0_STATUS	(1 << 2)
85#define S2MPS_ALARM1_STATUS	(1 << 1)
86
87/* RTC Control Register */
88#define BCD_EN_SHIFT		0
89#define BCD_EN_MASK		(1 << BCD_EN_SHIFT)
90#define MODEL24_SHIFT		1
91#define MODEL24_MASK		(1 << MODEL24_SHIFT)
92/* RTC Update Register1 */
93#define S5M_RTC_UDR_SHIFT	0
94#define S5M_RTC_UDR_MASK	(1 << S5M_RTC_UDR_SHIFT)
95#define S2MPS_RTC_WUDR_SHIFT	4
96#define S2MPS_RTC_WUDR_MASK	(1 << S2MPS_RTC_WUDR_SHIFT)
97#define S2MPS15_RTC_AUDR_SHIFT	4
98#define S2MPS15_RTC_AUDR_MASK	(1 << S2MPS15_RTC_AUDR_SHIFT)
99#define S2MPS13_RTC_AUDR_SHIFT	1
100#define S2MPS13_RTC_AUDR_MASK	(1 << S2MPS13_RTC_AUDR_SHIFT)
101#define S2MPS15_RTC_WUDR_SHIFT	1
102#define S2MPS15_RTC_WUDR_MASK	(1 << S2MPS15_RTC_WUDR_SHIFT)
103#define S2MPS_RTC_RUDR_SHIFT	0
104#define S2MPS_RTC_RUDR_MASK	(1 << S2MPS_RTC_RUDR_SHIFT)
105#define RTC_TCON_SHIFT		1
106#define RTC_TCON_MASK		(1 << RTC_TCON_SHIFT)
107#define S5M_RTC_TIME_EN_SHIFT	3
108#define S5M_RTC_TIME_EN_MASK	(1 << S5M_RTC_TIME_EN_SHIFT)
109/*
110 * UDR_T field in S5M_RTC_UDR_CON register determines the time needed
111 * for updating alarm and time registers. Default is 7.32 ms.
112 */
113#define S5M_RTC_UDR_T_SHIFT	6
114#define S5M_RTC_UDR_T_MASK	(0x3 << S5M_RTC_UDR_T_SHIFT)
115#define S5M_RTC_UDR_T_7320_US	(0x0 << S5M_RTC_UDR_T_SHIFT)
116#define S5M_RTC_UDR_T_1830_US	(0x1 << S5M_RTC_UDR_T_SHIFT)
117#define S5M_RTC_UDR_T_3660_US	(0x2 << S5M_RTC_UDR_T_SHIFT)
118#define S5M_RTC_UDR_T_450_US	(0x3 << S5M_RTC_UDR_T_SHIFT)
119
120/* RTC Hour register */
121#define HOUR_PM_SHIFT		6
122#define HOUR_PM_MASK		(1 << HOUR_PM_SHIFT)
123/* RTC Alarm Enable */
124#define ALARM_ENABLE_SHIFT	7
125#define ALARM_ENABLE_MASK	(1 << ALARM_ENABLE_SHIFT)
126
127#define SMPL_ENABLE_SHIFT	7
128#define SMPL_ENABLE_MASK	(1 << SMPL_ENABLE_SHIFT)
129
130#define WTSR_ENABLE_SHIFT	6
131#define WTSR_ENABLE_MASK	(1 << WTSR_ENABLE_SHIFT)
132
133#endif /*  __LINUX_MFD_SEC_RTC_H */
134