1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Support code for Analog Devices Sigma-Delta ADCs
4 *
5 * Copyright 2012 Analog Devices Inc.
6 *  Author: Lars-Peter Clausen <lars@metafoo.de>
7 */
8#ifndef __AD_SIGMA_DELTA_H__
9#define __AD_SIGMA_DELTA_H__
10
11#include <linux/iio/iio.h>
12
13enum ad_sigma_delta_mode {
14	AD_SD_MODE_CONTINUOUS = 0,
15	AD_SD_MODE_SINGLE = 1,
16	AD_SD_MODE_IDLE = 2,
17	AD_SD_MODE_POWERDOWN = 3,
18};
19
20/**
21 * struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices
22 * @mode: Calibration mode.
23 * @channel: Calibration channel.
24 */
25struct ad_sd_calib_data {
26	unsigned int mode;
27	unsigned int channel;
28};
29
30struct ad_sigma_delta;
31struct device;
32struct iio_dev;
33
34/**
35 * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options
36 * @set_channel: Will be called to select the current channel, may be NULL.
37 * @append_status: Will be called to enable status append at the end of the sample, may be NULL.
38 * @set_mode: Will be called to select the current mode, may be NULL.
39 * @disable_all: Will be called to disable all channels, may be NULL.
40 * @postprocess_sample: Is called for each sampled data word, can be used to
41 *		modify or drop the sample data, it, may be NULL.
42 * @has_registers: true if the device has writable and readable registers, false
43 *		if there is just one read-only sample data shift register.
44 * @addr_shift: Shift of the register address in the communications register.
45 * @read_mask: Mask for the communications register having the read bit set.
46 * @status_ch_mask: Mask for the channel number stored in status register.
47 * @data_reg: Address of the data register, if 0 the default address of 0x3 will
48 *   be used.
49 * @irq_flags: flags for the interrupt used by the triggered buffer
50 * @num_slots: Number of sequencer slots
51 */
52struct ad_sigma_delta_info {
53	int (*set_channel)(struct ad_sigma_delta *, unsigned int channel);
54	int (*append_status)(struct ad_sigma_delta *, bool append);
55	int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode);
56	int (*disable_all)(struct ad_sigma_delta *);
57	int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample);
58	bool has_registers;
59	unsigned int addr_shift;
60	unsigned int read_mask;
61	unsigned int status_ch_mask;
62	unsigned int data_reg;
63	unsigned long irq_flags;
64	unsigned int num_slots;
65};
66
67/**
68 * struct ad_sigma_delta - Sigma Delta device struct
69 * @spi: The spi device associated with the Sigma Delta device.
70 * @trig: The IIO trigger associated with the Sigma Delta device.
71 *
72 * Most of the fields are private to the sigma delta library code and should not
73 * be accessed by individual drivers.
74 */
75struct ad_sigma_delta {
76	struct spi_device	*spi;
77	struct iio_trigger	*trig;
78
79/* private: */
80	struct completion	completion;
81	bool			irq_dis;
82
83	bool			bus_locked;
84	bool			keep_cs_asserted;
85
86	uint8_t			comm;
87
88	const struct ad_sigma_delta_info *info;
89	unsigned int		active_slots;
90	unsigned int		current_slot;
91	unsigned int		num_slots;
92	bool			status_appended;
93	/* map slots to channels in order to know what to expect from devices */
94	unsigned int		*slots;
95	uint8_t			*samples_buf;
96
97	/*
98	 * DMA (thus cache coherency maintenance) requires the
99	 * transfer buffers to live in their own cache lines.
100	 * 'tx_buf' is up to 32 bits.
101	 * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp,
102	 * rounded to 16 bytes to take into account padding.
103	 */
104	uint8_t				tx_buf[4] __aligned(IIO_DMA_MINALIGN);
105	uint8_t				rx_buf[16] __aligned(8);
106};
107
108static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd,
109	unsigned int channel)
110{
111	if (sd->info->set_channel)
112		return sd->info->set_channel(sd, channel);
113
114	return 0;
115}
116
117static inline int ad_sigma_delta_append_status(struct ad_sigma_delta *sd, bool append)
118{
119	int ret;
120
121	if (sd->info->append_status) {
122		ret = sd->info->append_status(sd, append);
123		if (ret < 0)
124			return ret;
125
126		sd->status_appended = append;
127	}
128
129	return 0;
130}
131
132static inline int ad_sigma_delta_disable_all(struct ad_sigma_delta *sd)
133{
134	if (sd->info->disable_all)
135		return sd->info->disable_all(sd);
136
137	return 0;
138}
139
140static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd,
141	unsigned int mode)
142{
143	if (sd->info->set_mode)
144		return sd->info->set_mode(sd, mode);
145
146	return 0;
147}
148
149static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd,
150	unsigned int raw_sample)
151{
152	if (sd->info->postprocess_sample)
153		return sd->info->postprocess_sample(sd, raw_sample);
154
155	return 0;
156}
157
158void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm);
159int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
160	unsigned int size, unsigned int val);
161int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
162	unsigned int size, unsigned int *val);
163
164int ad_sd_reset(struct ad_sigma_delta *sigma_delta,
165	unsigned int reset_length);
166
167int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev,
168	const struct iio_chan_spec *chan, int *val);
169int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta,
170	unsigned int mode, unsigned int channel);
171int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta,
172	const struct ad_sd_calib_data *cd, unsigned int n);
173int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev,
174	struct spi_device *spi, const struct ad_sigma_delta_info *info);
175
176int devm_ad_sd_setup_buffer_and_trigger(struct device *dev, struct iio_dev *indio_dev);
177
178int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig);
179
180#endif
181