1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright 2019 NXP
4 */
5
6#ifndef __DT_BINDINGS_CLOCK_IMX8MP_H
7#define __DT_BINDINGS_CLOCK_IMX8MP_H
8
9#define IMX8MP_CLK_DUMMY			0
10#define IMX8MP_CLK_32K				1
11#define IMX8MP_CLK_24M				2
12#define IMX8MP_OSC_HDMI_CLK			3
13#define IMX8MP_CLK_EXT1				4
14#define IMX8MP_CLK_EXT2				5
15#define IMX8MP_CLK_EXT3				6
16#define IMX8MP_CLK_EXT4				7
17#define IMX8MP_AUDIO_PLL1_REF_SEL		8
18#define IMX8MP_AUDIO_PLL2_REF_SEL		9
19#define IMX8MP_VIDEO_PLL1_REF_SEL		10
20#define IMX8MP_DRAM_PLL_REF_SEL			11
21#define IMX8MP_GPU_PLL_REF_SEL			12
22#define IMX8MP_VPU_PLL_REF_SEL			13
23#define IMX8MP_ARM_PLL_REF_SEL			14
24#define IMX8MP_SYS_PLL1_REF_SEL			15
25#define IMX8MP_SYS_PLL2_REF_SEL			16
26#define IMX8MP_SYS_PLL3_REF_SEL			17
27#define IMX8MP_AUDIO_PLL1			18
28#define IMX8MP_AUDIO_PLL2			19
29#define IMX8MP_VIDEO_PLL1			20
30#define IMX8MP_DRAM_PLL				21
31#define IMX8MP_GPU_PLL				22
32#define IMX8MP_VPU_PLL				23
33#define IMX8MP_ARM_PLL				24
34#define IMX8MP_SYS_PLL1				25
35#define IMX8MP_SYS_PLL2				26
36#define IMX8MP_SYS_PLL3				27
37#define IMX8MP_AUDIO_PLL1_BYPASS		28
38#define IMX8MP_AUDIO_PLL2_BYPASS		29
39#define IMX8MP_VIDEO_PLL1_BYPASS		30
40#define IMX8MP_DRAM_PLL_BYPASS			31
41#define IMX8MP_GPU_PLL_BYPASS			32
42#define IMX8MP_VPU_PLL_BYPASS			33
43#define IMX8MP_ARM_PLL_BYPASS			34
44#define IMX8MP_SYS_PLL1_BYPASS			35
45#define IMX8MP_SYS_PLL2_BYPASS			36
46#define IMX8MP_SYS_PLL3_BYPASS			37
47#define IMX8MP_AUDIO_PLL1_OUT			38
48#define IMX8MP_AUDIO_PLL2_OUT			39
49#define IMX8MP_VIDEO_PLL1_OUT			40
50#define IMX8MP_DRAM_PLL_OUT			41
51#define IMX8MP_GPU_PLL_OUT			42
52#define IMX8MP_VPU_PLL_OUT			43
53#define IMX8MP_ARM_PLL_OUT			44
54#define IMX8MP_SYS_PLL1_OUT			45
55#define IMX8MP_SYS_PLL2_OUT			46
56#define IMX8MP_SYS_PLL3_OUT			47
57#define IMX8MP_SYS_PLL1_40M			48
58#define IMX8MP_SYS_PLL1_80M			49
59#define IMX8MP_SYS_PLL1_100M			50
60#define IMX8MP_SYS_PLL1_133M			51
61#define IMX8MP_SYS_PLL1_160M			52
62#define IMX8MP_SYS_PLL1_200M			53
63#define IMX8MP_SYS_PLL1_266M			54
64#define IMX8MP_SYS_PLL1_400M			55
65#define IMX8MP_SYS_PLL1_800M			56
66#define IMX8MP_SYS_PLL2_50M			57
67#define IMX8MP_SYS_PLL2_100M			58
68#define IMX8MP_SYS_PLL2_125M			59
69#define IMX8MP_SYS_PLL2_166M			60
70#define IMX8MP_SYS_PLL2_200M			61
71#define IMX8MP_SYS_PLL2_250M			62
72#define IMX8MP_SYS_PLL2_333M			63
73#define IMX8MP_SYS_PLL2_500M			64
74#define IMX8MP_SYS_PLL2_1000M			65
75#define IMX8MP_CLK_A53_SRC			66
76#define IMX8MP_CLK_M7_SRC			67
77#define IMX8MP_CLK_ML_SRC			68
78#define IMX8MP_CLK_GPU3D_CORE_SRC		69
79#define IMX8MP_CLK_GPU3D_SHADER_SRC		70
80#define IMX8MP_CLK_GPU2D_SRC			71
81#define IMX8MP_CLK_AUDIO_AXI_SRC		72
82#define IMX8MP_CLK_HSIO_AXI_SRC			73
83#define IMX8MP_CLK_MEDIA_ISP_SRC		74
84#define IMX8MP_CLK_A53_CG			75
85#define IMX8MP_CLK_M4_CG			76
86#define IMX8MP_CLK_ML_CG			77
87#define IMX8MP_CLK_GPU3D_CORE_CG		78
88#define IMX8MP_CLK_GPU3D_SHADER_CG		79
89#define IMX8MP_CLK_GPU2D_CG			80
90#define IMX8MP_CLK_AUDIO_AXI_CG			81
91#define IMX8MP_CLK_HSIO_AXI_CG			82
92#define IMX8MP_CLK_MEDIA_ISP_CG			83
93#define IMX8MP_CLK_A53_DIV			84
94#define IMX8MP_CLK_M7_DIV			85
95#define IMX8MP_CLK_ML_DIV			86
96#define IMX8MP_CLK_GPU3D_CORE_DIV		87
97#define IMX8MP_CLK_GPU3D_SHADER_DIV		88
98#define IMX8MP_CLK_GPU2D_DIV			89
99#define IMX8MP_CLK_AUDIO_AXI_DIV		90
100#define IMX8MP_CLK_HSIO_AXI_DIV			91
101#define IMX8MP_CLK_MEDIA_ISP_DIV		92
102#define IMX8MP_CLK_MAIN_AXI			93
103#define IMX8MP_CLK_ENET_AXI			94
104#define IMX8MP_CLK_NAND_USDHC_BUS		95
105#define IMX8MP_CLK_VPU_BUS			96
106#define IMX8MP_CLK_MEDIA_AXI			97
107#define IMX8MP_CLK_MEDIA_APB			98
108#define IMX8MP_CLK_HDMI_APB			99
109#define IMX8MP_CLK_HDMI_AXI			100
110#define IMX8MP_CLK_GPU_AXI			101
111#define IMX8MP_CLK_GPU_AHB			102
112#define IMX8MP_CLK_NOC				103
113#define IMX8MP_CLK_NOC_IO			104
114#define IMX8MP_CLK_ML_AXI			105
115#define IMX8MP_CLK_ML_AHB			106
116#define IMX8MP_CLK_AHB				107
117#define IMX8MP_CLK_AUDIO_AHB			108
118#define IMX8MP_CLK_MIPI_DSI_ESC_RX		109
119#define IMX8MP_CLK_IPG_ROOT			110
120#define IMX8MP_CLK_DRAM_ALT			112
121#define IMX8MP_CLK_DRAM_APB			113
122#define IMX8MP_CLK_VPU_G1			114
123#define IMX8MP_CLK_VPU_G2			115
124#define IMX8MP_CLK_CAN1				116
125#define IMX8MP_CLK_CAN2				117
126#define IMX8MP_CLK_MEMREPAIR			118
127#define IMX8MP_CLK_PCIE_AUX			120
128#define IMX8MP_CLK_I2C5				121
129#define IMX8MP_CLK_I2C6				122
130#define IMX8MP_CLK_SAI1				123
131#define IMX8MP_CLK_SAI2				124
132#define IMX8MP_CLK_SAI3				125
133/* #define IMX8MP_CLK_SAI4				126 */
134#define IMX8MP_CLK_SAI5				127
135#define IMX8MP_CLK_SAI6				128
136#define IMX8MP_CLK_ENET_QOS			129
137#define IMX8MP_CLK_ENET_QOS_TIMER		130
138#define IMX8MP_CLK_ENET_REF			131
139#define IMX8MP_CLK_ENET_TIMER			132
140#define IMX8MP_CLK_ENET_PHY_REF			133
141#define IMX8MP_CLK_NAND				134
142#define IMX8MP_CLK_QSPI				135
143#define IMX8MP_CLK_USDHC1			136
144#define IMX8MP_CLK_USDHC2			137
145#define IMX8MP_CLK_I2C1				138
146#define IMX8MP_CLK_I2C2				139
147#define IMX8MP_CLK_I2C3				140
148#define IMX8MP_CLK_I2C4				141
149#define IMX8MP_CLK_UART1			142
150#define IMX8MP_CLK_UART2			143
151#define IMX8MP_CLK_UART3			144
152#define IMX8MP_CLK_UART4			145
153#define IMX8MP_CLK_USB_CORE_REF			146
154#define IMX8MP_CLK_USB_PHY_REF			147
155#define IMX8MP_CLK_GIC				148
156#define IMX8MP_CLK_ECSPI1			149
157#define IMX8MP_CLK_ECSPI2			150
158#define IMX8MP_CLK_PWM1				151
159#define IMX8MP_CLK_PWM2				152
160#define IMX8MP_CLK_PWM3				153
161#define IMX8MP_CLK_PWM4				154
162#define IMX8MP_CLK_GPT1				155
163#define IMX8MP_CLK_GPT2				156
164#define IMX8MP_CLK_GPT3				157
165#define IMX8MP_CLK_GPT4				158
166#define IMX8MP_CLK_GPT5				159
167#define IMX8MP_CLK_GPT6				160
168#define IMX8MP_CLK_TRACE			161
169#define IMX8MP_CLK_WDOG				162
170#define IMX8MP_CLK_WRCLK			163
171#define IMX8MP_CLK_IPP_DO_CLKO1			164
172#define IMX8MP_CLK_IPP_DO_CLKO2			165
173#define IMX8MP_CLK_HDMI_FDCC_TST		166
174#define IMX8MP_CLK_HDMI_24M			167
175#define IMX8MP_CLK_HDMI_REF_266M		168
176#define IMX8MP_CLK_USDHC3			169
177#define IMX8MP_CLK_MEDIA_CAM1_PIX		170
178#define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF		171
179#define IMX8MP_CLK_MEDIA_DISP1_PIX		172
180#define IMX8MP_CLK_MEDIA_CAM2_PIX		173
181#define IMX8MP_CLK_MEDIA_LDB			174
182#define IMX8MP_CLK_MEDIA_MIPI_CSI2_ESC		175
183#define IMX8MP_CLK_MEDIA_MIPI_TEST_BYTE		178
184#define IMX8MP_CLK_ECSPI3			179
185#define IMX8MP_CLK_PDM				180
186#define IMX8MP_CLK_VPU_VC8000E			181
187#define IMX8MP_CLK_SAI7				182
188#define IMX8MP_CLK_GPC_ROOT			183
189#define IMX8MP_CLK_ANAMIX_ROOT			184
190#define IMX8MP_CLK_CPU_ROOT			185
191#define IMX8MP_CLK_CSU_ROOT			186
192#define IMX8MP_CLK_DEBUG_ROOT			187
193#define IMX8MP_CLK_DRAM1_ROOT			188
194#define IMX8MP_CLK_ECSPI1_ROOT			189
195#define IMX8MP_CLK_ECSPI2_ROOT			190
196#define IMX8MP_CLK_ECSPI3_ROOT			191
197#define IMX8MP_CLK_ENET1_ROOT			192
198#define IMX8MP_CLK_GPIO1_ROOT			193
199#define IMX8MP_CLK_GPIO2_ROOT			194
200#define IMX8MP_CLK_GPIO3_ROOT			195
201#define IMX8MP_CLK_GPIO4_ROOT			196
202#define IMX8MP_CLK_GPIO5_ROOT			197
203#define IMX8MP_CLK_GPT1_ROOT			198
204#define IMX8MP_CLK_GPT2_ROOT			199
205#define IMX8MP_CLK_GPT3_ROOT			200
206#define IMX8MP_CLK_GPT4_ROOT			201
207#define IMX8MP_CLK_GPT5_ROOT			202
208#define IMX8MP_CLK_GPT6_ROOT			203
209#define IMX8MP_CLK_HS_ROOT			204
210#define IMX8MP_CLK_I2C1_ROOT			205
211#define IMX8MP_CLK_I2C2_ROOT			206
212#define IMX8MP_CLK_I2C3_ROOT			207
213#define IMX8MP_CLK_I2C4_ROOT			208
214#define IMX8MP_CLK_IOMUX_ROOT			209
215#define IMX8MP_CLK_IPMUX1_ROOT			210
216#define IMX8MP_CLK_IPMUX2_ROOT			211
217#define IMX8MP_CLK_IPMUX3_ROOT			212
218#define IMX8MP_CLK_MU_ROOT			213
219#define IMX8MP_CLK_OCOTP_ROOT			214
220#define IMX8MP_CLK_OCRAM_ROOT			215
221#define IMX8MP_CLK_OCRAM_S_ROOT			216
222#define IMX8MP_CLK_PCIE_ROOT			217
223#define IMX8MP_CLK_PERFMON1_ROOT		218
224#define IMX8MP_CLK_PERFMON2_ROOT		219
225#define IMX8MP_CLK_PWM1_ROOT			220
226#define IMX8MP_CLK_PWM2_ROOT			221
227#define IMX8MP_CLK_PWM3_ROOT			222
228#define IMX8MP_CLK_PWM4_ROOT			223
229#define IMX8MP_CLK_QOS_ROOT			224
230#define IMX8MP_CLK_QOS_ENET_ROOT		225
231#define IMX8MP_CLK_QSPI_ROOT			226
232#define IMX8MP_CLK_NAND_ROOT			227
233#define IMX8MP_CLK_NAND_USDHC_BUS_RAWNAND_CLK	228
234#define IMX8MP_CLK_RDC_ROOT			229
235#define IMX8MP_CLK_ROM_ROOT			230
236#define IMX8MP_CLK_I2C5_ROOT			231
237#define IMX8MP_CLK_I2C6_ROOT			232
238#define IMX8MP_CLK_CAN1_ROOT			233
239#define IMX8MP_CLK_CAN2_ROOT			234
240#define IMX8MP_CLK_SCTR_ROOT			235
241#define IMX8MP_CLK_SDMA1_ROOT			236
242#define IMX8MP_CLK_ENET_QOS_ROOT		237
243#define IMX8MP_CLK_SEC_DEBUG_ROOT		238
244#define IMX8MP_CLK_SEMA1_ROOT			239
245#define IMX8MP_CLK_SEMA2_ROOT			240
246#define IMX8MP_CLK_IRQ_STEER_ROOT		241
247#define IMX8MP_CLK_SIM_ENET_ROOT		242
248#define IMX8MP_CLK_SIM_M_ROOT			243
249#define IMX8MP_CLK_SIM_MAIN_ROOT		244
250#define IMX8MP_CLK_SIM_S_ROOT			245
251#define IMX8MP_CLK_SIM_WAKEUP_ROOT		246
252#define IMX8MP_CLK_GPU2D_ROOT			247
253#define IMX8MP_CLK_GPU3D_ROOT			248
254#define IMX8MP_CLK_SNVS_ROOT			249
255#define IMX8MP_CLK_TRACE_ROOT			250
256#define IMX8MP_CLK_UART1_ROOT			251
257#define IMX8MP_CLK_UART2_ROOT			252
258#define IMX8MP_CLK_UART3_ROOT			253
259#define IMX8MP_CLK_UART4_ROOT			254
260#define IMX8MP_CLK_USB_ROOT			255
261#define IMX8MP_CLK_USB_PHY_ROOT			256
262#define IMX8MP_CLK_USDHC1_ROOT			257
263#define IMX8MP_CLK_USDHC2_ROOT			258
264#define IMX8MP_CLK_WDOG1_ROOT			259
265#define IMX8MP_CLK_WDOG2_ROOT			260
266#define IMX8MP_CLK_WDOG3_ROOT			261
267#define IMX8MP_CLK_VPU_G1_ROOT			262
268#define IMX8MP_CLK_GPU_ROOT			263
269#define IMX8MP_CLK_NOC_WRAPPER_ROOT		264
270#define IMX8MP_CLK_VPU_VC8KE_ROOT		265
271#define IMX8MP_CLK_VPU_G2_ROOT			266
272#define IMX8MP_CLK_NPU_ROOT			267
273#define IMX8MP_CLK_HSIO_ROOT			268
274#define IMX8MP_CLK_MEDIA_APB_ROOT		269
275#define IMX8MP_CLK_MEDIA_AXI_ROOT		270
276#define IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT		271
277#define IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT		272
278#define IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT		273
279#define IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT		274
280#define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT	275
281#define IMX8MP_CLK_MEDIA_ISP_ROOT		276
282#define IMX8MP_CLK_USDHC3_ROOT			277
283#define IMX8MP_CLK_HDMI_ROOT			278
284#define IMX8MP_CLK_XTAL_ROOT			279
285#define IMX8MP_CLK_PLL_ROOT			280
286#define IMX8MP_CLK_TSENSOR_ROOT			281
287#define IMX8MP_CLK_VPU_ROOT			282
288#define IMX8MP_CLK_MRPR_ROOT			283
289#define IMX8MP_CLK_AUDIO_ROOT			284
290#define IMX8MP_CLK_DRAM_ALT_ROOT		285
291#define IMX8MP_CLK_DRAM_CORE			286
292#define IMX8MP_CLK_ARM				287
293#define IMX8MP_CLK_A53_CORE			288
294
295#define IMX8MP_SYS_PLL1_40M_CG			289
296#define IMX8MP_SYS_PLL1_80M_CG			290
297#define IMX8MP_SYS_PLL1_100M_CG			291
298#define IMX8MP_SYS_PLL1_133M_CG			292
299#define IMX8MP_SYS_PLL1_160M_CG			293
300#define IMX8MP_SYS_PLL1_200M_CG			294
301#define IMX8MP_SYS_PLL1_266M_CG			295
302#define IMX8MP_SYS_PLL1_400M_CG			296
303#define IMX8MP_SYS_PLL2_50M_CG			297
304#define IMX8MP_SYS_PLL2_100M_CG			298
305#define IMX8MP_SYS_PLL2_125M_CG			299
306#define IMX8MP_SYS_PLL2_166M_CG			300
307#define IMX8MP_SYS_PLL2_200M_CG			301
308#define IMX8MP_SYS_PLL2_250M_CG			302
309#define IMX8MP_SYS_PLL2_333M_CG			303
310#define IMX8MP_SYS_PLL2_500M_CG			304
311
312#define IMX8MP_CLK_M7_CORE			305
313#define IMX8MP_CLK_ML_CORE			306
314#define IMX8MP_CLK_GPU3D_CORE			307
315#define IMX8MP_CLK_GPU3D_SHADER_CORE		308
316#define IMX8MP_CLK_GPU2D_CORE			309
317#define IMX8MP_CLK_AUDIO_AXI			310
318#define IMX8MP_CLK_HSIO_AXI			311
319#define IMX8MP_CLK_MEDIA_ISP			312
320#define IMX8MP_CLK_MEDIA_DISP2_PIX		313
321#define IMX8MP_CLK_CLKOUT1_SEL			314
322#define IMX8MP_CLK_CLKOUT1_DIV			315
323#define IMX8MP_CLK_CLKOUT1			316
324#define IMX8MP_CLK_CLKOUT2_SEL			317
325#define IMX8MP_CLK_CLKOUT2_DIV			318
326#define IMX8MP_CLK_CLKOUT2			319
327#define IMX8MP_CLK_USB_SUSP			320
328#define IMX8MP_CLK_AUDIO_AHB_ROOT		IMX8MP_CLK_AUDIO_ROOT
329#define IMX8MP_CLK_AUDIO_AXI_ROOT		321
330#define IMX8MP_CLK_SAI1_ROOT			322
331#define IMX8MP_CLK_SAI2_ROOT			323
332#define IMX8MP_CLK_SAI3_ROOT			324
333#define IMX8MP_CLK_SAI5_ROOT			325
334#define IMX8MP_CLK_SAI6_ROOT			326
335#define IMX8MP_CLK_SAI7_ROOT			327
336#define IMX8MP_CLK_PDM_ROOT			328
337#define IMX8MP_CLK_MEDIA_LDB_ROOT		329
338#define IMX8MP_CLK_END				330
339
340#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG		0
341#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1		1
342#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2		2
343#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3		3
344#define IMX8MP_CLK_AUDIOMIX_SAI2_IPG		4
345#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1		5
346#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2		6
347#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3		7
348#define IMX8MP_CLK_AUDIOMIX_SAI3_IPG		8
349#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1		9
350#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2		10
351#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3		11
352#define IMX8MP_CLK_AUDIOMIX_SAI5_IPG		12
353#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1		13
354#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2		14
355#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3		15
356#define IMX8MP_CLK_AUDIOMIX_SAI6_IPG		16
357#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1		17
358#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2		18
359#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3		19
360#define IMX8MP_CLK_AUDIOMIX_SAI7_IPG		20
361#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1		21
362#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2		22
363#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3		23
364#define IMX8MP_CLK_AUDIOMIX_ASRC_IPG		24
365#define IMX8MP_CLK_AUDIOMIX_PDM_IPG		25
366#define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT		26
367#define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT		27
368#define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT		28
369#define IMX8MP_CLK_AUDIOMIX_DSP_ROOT		29
370#define IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT		30
371#define IMX8MP_CLK_AUDIOMIX_EARC_IPG		31
372#define IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG		32
373#define IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG		33
374#define IMX8MP_CLK_AUDIOMIX_EDMA_ROOT		34
375#define IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT		35
376#define IMX8MP_CLK_AUDIOMIX_MU2_ROOT		36
377#define IMX8MP_CLK_AUDIOMIX_MU3_ROOT		37
378#define IMX8MP_CLK_AUDIOMIX_EARC_PHY		38
379#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL	40
380#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL	41
381#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL	42
382#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL	43
383#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL	44
384#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL	45
385#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK1_SEL	46
386#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK2_SEL	47
387#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL	48
388#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL	49
389#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL	50
390#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL	51
391#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL	52
392#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL	53
393#define IMX8MP_CLK_AUDIOMIX_PDM_SEL		54
394#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL	55
395#define IMX8MP_CLK_AUDIOMIX_SAI_PLL		56
396#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS	57
397#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT		58
398
399#define IMX8MP_CLK_AUDIOMIX_END			59
400
401#endif
402