1/* 2 * linux/drivers/video/vt8623fb.c - fbdev driver for 3 * integrated graphic core in VIA VT8623 [CLE266] chipset 4 * 5 * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file COPYING in the main directory of this archive for 9 * more details. 10 * 11 * Code is based on s3fb, some parts are from David Boucher's viafb 12 * (http://davesdomain.org.uk/viafb/) 13 */ 14 15#include <linux/aperture.h> 16#include <linux/module.h> 17#include <linux/kernel.h> 18#include <linux/errno.h> 19#include <linux/string.h> 20#include <linux/mm.h> 21#include <linux/tty.h> 22#include <linux/delay.h> 23#include <linux/fb.h> 24#include <linux/svga.h> 25#include <linux/init.h> 26#include <linux/pci.h> 27#include <linux/console.h> /* Why should fb driver call console functions? because console_lock() */ 28#include <video/vga.h> 29 30struct vt8623fb_info { 31 char __iomem *mmio_base; 32 int wc_cookie; 33 struct vgastate state; 34 struct mutex open_lock; 35 unsigned int ref_count; 36 u32 pseudo_palette[16]; 37}; 38 39 40 41/* ------------------------------------------------------------------------- */ 42 43static const struct svga_fb_format vt8623fb_formats[] = { 44 { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 45 FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP8, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 46 { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 47 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 48 { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, 49 FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 50 { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 51 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8}, 52/* {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, 53 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, */ 54 {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, 55 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, 56 {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, 57 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2}, 58 SVGA_FORMAT_END 59}; 60 61static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3, 62 60000, 300000, 14318}; 63 64/* CRT timing register sets */ 65 66static const struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; 67static const struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; 68static const struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; 69static const struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; 70static const struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; 71static const struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; 72 73static const struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; 74static const struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; 75static const struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; 76static const struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; 77static const struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; 78static const struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; 79 80static const struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; 81static const struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; 82static const struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; 83static const struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; 84 85static const struct svga_timing_regs vt8623_timing_regs = { 86 vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs, 87 vt8623_h_blank_end_regs, vt8623_h_sync_start_regs, vt8623_h_sync_end_regs, 88 vt8623_v_total_regs, vt8623_v_display_regs, vt8623_v_blank_start_regs, 89 vt8623_v_blank_end_regs, vt8623_v_sync_start_regs, vt8623_v_sync_end_regs, 90}; 91 92 93/* ------------------------------------------------------------------------- */ 94 95 96/* Module parameters */ 97 98static char *mode_option = "640x480-8@60"; 99static int mtrr = 1; 100 101MODULE_AUTHOR("(c) 2006 Ondrej Zajicek <santiago@crfreenet.org>"); 102MODULE_LICENSE("GPL"); 103MODULE_DESCRIPTION("fbdev driver for integrated graphics core in VIA VT8623 [CLE266]"); 104 105module_param(mode_option, charp, 0644); 106MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)"); 107module_param_named(mode, mode_option, charp, 0); 108MODULE_PARM_DESC(mode, "Default video mode e.g. '648x480-8@60' (deprecated)"); 109module_param(mtrr, int, 0444); 110MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)"); 111 112 113/* ------------------------------------------------------------------------- */ 114 115static void vt8623fb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) 116{ 117 struct vt8623fb_info *par = info->par; 118 119 svga_tilecursor(par->state.vgabase, info, cursor); 120} 121 122static struct fb_tile_ops vt8623fb_tile_ops = { 123 .fb_settile = svga_settile, 124 .fb_tilecopy = svga_tilecopy, 125 .fb_tilefill = svga_tilefill, 126 .fb_tileblit = svga_tileblit, 127 .fb_tilecursor = vt8623fb_tilecursor, 128 .fb_get_tilemax = svga_get_tilemax, 129}; 130 131 132/* ------------------------------------------------------------------------- */ 133 134 135/* image data is MSB-first, fb structure is MSB-first too */ 136static inline u32 expand_color(u32 c) 137{ 138 return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; 139} 140 141/* vt8623fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ 142static void vt8623fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) 143{ 144 u32 fg = expand_color(image->fg_color); 145 u32 bg = expand_color(image->bg_color); 146 const u8 *src1, *src; 147 u8 __iomem *dst1; 148 u32 __iomem *dst; 149 u32 val; 150 int x, y; 151 152 src1 = image->data; 153 dst1 = info->screen_base + (image->dy * info->fix.line_length) 154 + ((image->dx / 8) * 4); 155 156 for (y = 0; y < image->height; y++) { 157 src = src1; 158 dst = (u32 __iomem *) dst1; 159 for (x = 0; x < image->width; x += 8) { 160 val = *(src++) * 0x01010101; 161 val = (val & fg) | (~val & bg); 162 fb_writel(val, dst++); 163 } 164 src1 += image->width / 8; 165 dst1 += info->fix.line_length; 166 } 167} 168 169/* vt8623fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ 170static void vt8623fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 171{ 172 u32 fg = expand_color(rect->color); 173 u8 __iomem *dst1; 174 u32 __iomem *dst; 175 int x, y; 176 177 dst1 = info->screen_base + (rect->dy * info->fix.line_length) 178 + ((rect->dx / 8) * 4); 179 180 for (y = 0; y < rect->height; y++) { 181 dst = (u32 __iomem *) dst1; 182 for (x = 0; x < rect->width; x += 8) { 183 fb_writel(fg, dst++); 184 } 185 dst1 += info->fix.line_length; 186 } 187} 188 189 190/* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ 191static inline u32 expand_pixel(u32 c) 192{ 193 return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | 194 ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; 195} 196 197/* vt8623fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ 198static void vt8623fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) 199{ 200 u32 fg = image->fg_color * 0x11111111; 201 u32 bg = image->bg_color * 0x11111111; 202 const u8 *src1, *src; 203 u8 __iomem *dst1; 204 u32 __iomem *dst; 205 u32 val; 206 int x, y; 207 208 src1 = image->data; 209 dst1 = info->screen_base + (image->dy * info->fix.line_length) 210 + ((image->dx / 8) * 4); 211 212 for (y = 0; y < image->height; y++) { 213 src = src1; 214 dst = (u32 __iomem *) dst1; 215 for (x = 0; x < image->width; x += 8) { 216 val = expand_pixel(*(src++)); 217 val = (val & fg) | (~val & bg); 218 fb_writel(val, dst++); 219 } 220 src1 += image->width / 8; 221 dst1 += info->fix.line_length; 222 } 223} 224 225static void vt8623fb_imageblit(struct fb_info *info, const struct fb_image *image) 226{ 227 if ((info->var.bits_per_pixel == 4) && (image->depth == 1) 228 && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { 229 if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) 230 vt8623fb_iplan_imageblit(info, image); 231 else 232 vt8623fb_cfb4_imageblit(info, image); 233 } else 234 cfb_imageblit(info, image); 235} 236 237static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 238{ 239 if ((info->var.bits_per_pixel == 4) 240 && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) 241 && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) 242 vt8623fb_iplan_fillrect(info, rect); 243 else 244 cfb_fillrect(info, rect); 245} 246 247 248/* ------------------------------------------------------------------------- */ 249 250 251static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) 252{ 253 struct vt8623fb_info *par = info->par; 254 u16 m, n, r; 255 u8 regval; 256 int rv; 257 258 rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node); 259 if (rv < 0) { 260 fb_err(info, "cannot set requested pixclock, keeping old value\n"); 261 return; 262 } 263 264 /* Set VGA misc register */ 265 regval = vga_r(par->state.vgabase, VGA_MIS_R); 266 vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); 267 268 /* Set clock registers */ 269 vga_wseq(par->state.vgabase, 0x46, (n | (r << 6))); 270 vga_wseq(par->state.vgabase, 0x47, m); 271 272 udelay(1000); 273 274 /* PLL reset */ 275 svga_wseq_mask(par->state.vgabase, 0x40, 0x02, 0x02); 276 svga_wseq_mask(par->state.vgabase, 0x40, 0x00, 0x02); 277} 278 279 280static int vt8623fb_open(struct fb_info *info, int user) 281{ 282 struct vt8623fb_info *par = info->par; 283 284 mutex_lock(&(par->open_lock)); 285 if (par->ref_count == 0) { 286 void __iomem *vgabase = par->state.vgabase; 287 288 memset(&(par->state), 0, sizeof(struct vgastate)); 289 par->state.vgabase = vgabase; 290 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; 291 par->state.num_crtc = 0xA2; 292 par->state.num_seq = 0x50; 293 save_vga(&(par->state)); 294 } 295 296 par->ref_count++; 297 mutex_unlock(&(par->open_lock)); 298 299 return 0; 300} 301 302static int vt8623fb_release(struct fb_info *info, int user) 303{ 304 struct vt8623fb_info *par = info->par; 305 306 mutex_lock(&(par->open_lock)); 307 if (par->ref_count == 0) { 308 mutex_unlock(&(par->open_lock)); 309 return -EINVAL; 310 } 311 312 if (par->ref_count == 1) 313 restore_vga(&(par->state)); 314 315 par->ref_count--; 316 mutex_unlock(&(par->open_lock)); 317 318 return 0; 319} 320 321static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 322{ 323 int rv, mem, step; 324 325 if (!var->pixclock) 326 return -EINVAL; 327 328 /* Find appropriate format */ 329 rv = svga_match_format (vt8623fb_formats, var, NULL); 330 if (rv < 0) 331 { 332 fb_err(info, "unsupported mode requested\n"); 333 return rv; 334 } 335 336 /* Do not allow to have real resoulution larger than virtual */ 337 if (var->xres > var->xres_virtual) 338 var->xres_virtual = var->xres; 339 340 if (var->yres > var->yres_virtual) 341 var->yres_virtual = var->yres; 342 343 /* Round up xres_virtual to have proper alignment of lines */ 344 step = vt8623fb_formats[rv].xresstep - 1; 345 var->xres_virtual = (var->xres_virtual+step) & ~step; 346 347 /* Check whether have enough memory */ 348 mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; 349 if (mem > info->screen_size) 350 { 351 fb_err(info, "not enough framebuffer memory (%d kB requested, %d kB available)\n", 352 mem >> 10, (unsigned int) (info->screen_size >> 10)); 353 return -EINVAL; 354 } 355 356 /* Text mode is limited to 256 kB of memory */ 357 if ((var->bits_per_pixel == 0) && (mem > (256*1024))) 358 { 359 fb_err(info, "text framebuffer size too large (%d kB requested, 256 kB possible)\n", 360 mem >> 10); 361 return -EINVAL; 362 } 363 364 rv = svga_check_timings (&vt8623_timing_regs, var, info->node); 365 if (rv < 0) 366 { 367 fb_err(info, "invalid timings requested\n"); 368 return rv; 369 } 370 371 /* Interlaced mode not supported */ 372 if (var->vmode & FB_VMODE_INTERLACED) 373 return -EINVAL; 374 375 return 0; 376} 377 378 379static int vt8623fb_set_par(struct fb_info *info) 380{ 381 u32 mode, offset_value, fetch_value, screen_size; 382 struct vt8623fb_info *par = info->par; 383 u32 bpp = info->var.bits_per_pixel; 384 385 if (bpp != 0) { 386 info->fix.ypanstep = 1; 387 info->fix.line_length = (info->var.xres_virtual * bpp) / 8; 388 389 info->flags &= ~FBINFO_MISC_TILEBLITTING; 390 info->tileops = NULL; 391 392 /* in 4bpp supports 8p wide tiles only, any tiles otherwise */ 393 if (bpp == 4) { 394 bitmap_zero(info->pixmap.blit_x, FB_MAX_BLIT_WIDTH); 395 set_bit(8 - 1, info->pixmap.blit_x); 396 } else { 397 bitmap_fill(info->pixmap.blit_x, FB_MAX_BLIT_WIDTH); 398 } 399 bitmap_fill(info->pixmap.blit_y, FB_MAX_BLIT_HEIGHT); 400 401 offset_value = (info->var.xres_virtual * bpp) / 64; 402 fetch_value = ((info->var.xres * bpp) / 128) + 4; 403 404 if (bpp == 4) 405 fetch_value = (info->var.xres / 8) + 8; /* + 0 is OK */ 406 407 screen_size = info->var.yres_virtual * info->fix.line_length; 408 } else { 409 info->fix.ypanstep = 16; 410 info->fix.line_length = 0; 411 412 info->flags |= FBINFO_MISC_TILEBLITTING; 413 info->tileops = &vt8623fb_tile_ops; 414 415 /* supports 8x16 tiles only */ 416 bitmap_zero(info->pixmap.blit_x, FB_MAX_BLIT_WIDTH); 417 set_bit(8 - 1, info->pixmap.blit_x); 418 bitmap_zero(info->pixmap.blit_y, FB_MAX_BLIT_HEIGHT); 419 set_bit(16 - 1, info->pixmap.blit_y); 420 421 offset_value = info->var.xres_virtual / 16; 422 fetch_value = (info->var.xres / 8) + 8; 423 screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64; 424 } 425 426 info->var.xoffset = 0; 427 info->var.yoffset = 0; 428 info->var.activate = FB_ACTIVATE_NOW; 429 430 /* Unlock registers */ 431 svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); 432 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); 433 svga_wcrt_mask(par->state.vgabase, 0x47, 0x00, 0x01); 434 435 /* Device, screen and sync off */ 436 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 437 svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); 438 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); 439 440 /* Set default values */ 441 svga_set_default_gfx_regs(par->state.vgabase); 442 svga_set_default_atc_regs(par->state.vgabase); 443 svga_set_default_seq_regs(par->state.vgabase); 444 svga_set_default_crt_regs(par->state.vgabase); 445 svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); 446 svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0); 447 448 svga_wcrt_multi(par->state.vgabase, vt8623_offset_regs, offset_value); 449 svga_wseq_multi(par->state.vgabase, vt8623_fetch_count_regs, fetch_value); 450 451 /* Clear H/V Skew */ 452 svga_wcrt_mask(par->state.vgabase, 0x03, 0x00, 0x60); 453 svga_wcrt_mask(par->state.vgabase, 0x05, 0x00, 0x60); 454 455 if (info->var.vmode & FB_VMODE_DOUBLE) 456 svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); 457 else 458 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); 459 460 svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus 461 svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus 462 svga_wseq_mask(par->state.vgabase, 0x16, 0x08, 0xBF); // FIFO read threshold 463 vga_wseq(par->state.vgabase, 0x17, 0x1F); // FIFO depth 464 vga_wseq(par->state.vgabase, 0x18, 0x4E); 465 svga_wseq_mask(par->state.vgabase, 0x1A, 0x08, 0x08); // enable MMIO ? 466 467 vga_wcrt(par->state.vgabase, 0x32, 0x00); 468 vga_wcrt(par->state.vgabase, 0x34, 0x00); 469 vga_wcrt(par->state.vgabase, 0x6A, 0x80); 470 vga_wcrt(par->state.vgabase, 0x6A, 0xC0); 471 472 vga_wgfx(par->state.vgabase, 0x20, 0x00); 473 vga_wgfx(par->state.vgabase, 0x21, 0x00); 474 vga_wgfx(par->state.vgabase, 0x22, 0x00); 475 476 /* Set SR15 according to number of bits per pixel */ 477 mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix)); 478 switch (mode) { 479 case 0: 480 fb_dbg(info, "text mode\n"); 481 svga_set_textmode_vga_regs(par->state.vgabase); 482 svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); 483 svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70); 484 break; 485 case 1: 486 fb_dbg(info, "4 bit pseudocolor\n"); 487 vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); 488 svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); 489 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); 490 break; 491 case 2: 492 fb_dbg(info, "4 bit pseudocolor, planar\n"); 493 svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); 494 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); 495 break; 496 case 3: 497 fb_dbg(info, "8 bit pseudocolor\n"); 498 svga_wseq_mask(par->state.vgabase, 0x15, 0x22, 0xFE); 499 break; 500 case 4: 501 fb_dbg(info, "5/6/5 truecolor\n"); 502 svga_wseq_mask(par->state.vgabase, 0x15, 0xB6, 0xFE); 503 break; 504 case 5: 505 fb_dbg(info, "8/8/8 truecolor\n"); 506 svga_wseq_mask(par->state.vgabase, 0x15, 0xAE, 0xFE); 507 break; 508 default: 509 printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); 510 return (-EINVAL); 511 } 512 513 vt8623_set_pixclock(info, info->var.pixclock); 514 svga_set_timings(par->state.vgabase, &vt8623_timing_regs, &(info->var), 1, 1, 515 (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1, 516 1, info->node); 517 518 if (screen_size > info->screen_size) 519 screen_size = info->screen_size; 520 memset_io(info->screen_base, 0x00, screen_size); 521 522 /* Device and screen back on */ 523 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); 524 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 525 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); 526 527 return 0; 528} 529 530 531static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 532 u_int transp, struct fb_info *fb) 533{ 534 switch (fb->var.bits_per_pixel) { 535 case 0: 536 case 4: 537 if (regno >= 16) 538 return -EINVAL; 539 540 outb(0x0F, VGA_PEL_MSK); 541 outb(regno, VGA_PEL_IW); 542 outb(red >> 10, VGA_PEL_D); 543 outb(green >> 10, VGA_PEL_D); 544 outb(blue >> 10, VGA_PEL_D); 545 break; 546 case 8: 547 if (regno >= 256) 548 return -EINVAL; 549 550 outb(0xFF, VGA_PEL_MSK); 551 outb(regno, VGA_PEL_IW); 552 outb(red >> 10, VGA_PEL_D); 553 outb(green >> 10, VGA_PEL_D); 554 outb(blue >> 10, VGA_PEL_D); 555 break; 556 case 16: 557 if (regno >= 16) 558 return 0; 559 560 if (fb->var.green.length == 5) 561 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | 562 ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11); 563 else if (fb->var.green.length == 6) 564 ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) | 565 ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); 566 else 567 return -EINVAL; 568 break; 569 case 24: 570 case 32: 571 if (regno >= 16) 572 return 0; 573 574 /* ((transp & 0xFF00) << 16) */ 575 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) | 576 (green & 0xFF00) | ((blue & 0xFF00) >> 8); 577 break; 578 default: 579 return -EINVAL; 580 } 581 582 return 0; 583} 584 585 586static int vt8623fb_blank(int blank_mode, struct fb_info *info) 587{ 588 struct vt8623fb_info *par = info->par; 589 590 switch (blank_mode) { 591 case FB_BLANK_UNBLANK: 592 fb_dbg(info, "unblank\n"); 593 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 594 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); 595 break; 596 case FB_BLANK_NORMAL: 597 fb_dbg(info, "blank\n"); 598 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 599 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 600 break; 601 case FB_BLANK_HSYNC_SUSPEND: 602 fb_dbg(info, "DPMS standby (hsync off)\n"); 603 svga_wcrt_mask(par->state.vgabase, 0x36, 0x10, 0x30); 604 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 605 break; 606 case FB_BLANK_VSYNC_SUSPEND: 607 fb_dbg(info, "DPMS suspend (vsync off)\n"); 608 svga_wcrt_mask(par->state.vgabase, 0x36, 0x20, 0x30); 609 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 610 break; 611 case FB_BLANK_POWERDOWN: 612 fb_dbg(info, "DPMS off (no sync)\n"); 613 svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); 614 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 615 break; 616 } 617 618 return 0; 619} 620 621 622static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) 623{ 624 struct vt8623fb_info *par = info->par; 625 unsigned int offset; 626 627 /* Calculate the offset */ 628 if (info->var.bits_per_pixel == 0) { 629 offset = (var->yoffset / 16) * info->var.xres_virtual 630 + var->xoffset; 631 offset = offset >> 3; 632 } else { 633 offset = (var->yoffset * info->fix.line_length) + 634 (var->xoffset * info->var.bits_per_pixel / 8); 635 offset = offset >> ((info->var.bits_per_pixel == 4) ? 2 : 1); 636 } 637 638 /* Set the offset */ 639 svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset); 640 641 return 0; 642} 643 644 645/* ------------------------------------------------------------------------- */ 646 647 648/* Frame buffer operations */ 649 650static const struct fb_ops vt8623fb_ops = { 651 .owner = THIS_MODULE, 652 .fb_open = vt8623fb_open, 653 .fb_release = vt8623fb_release, 654 __FB_DEFAULT_IOMEM_OPS_RDWR, 655 .fb_check_var = vt8623fb_check_var, 656 .fb_set_par = vt8623fb_set_par, 657 .fb_setcolreg = vt8623fb_setcolreg, 658 .fb_blank = vt8623fb_blank, 659 .fb_pan_display = vt8623fb_pan_display, 660 .fb_fillrect = vt8623fb_fillrect, 661 .fb_copyarea = cfb_copyarea, 662 .fb_imageblit = vt8623fb_imageblit, 663 __FB_DEFAULT_IOMEM_OPS_MMAP, 664 .fb_get_caps = svga_get_caps, 665}; 666 667 668/* PCI probe */ 669 670static int vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 671{ 672 struct pci_bus_region bus_reg; 673 struct resource vga_res; 674 struct fb_info *info; 675 struct vt8623fb_info *par; 676 unsigned int memsize1, memsize2; 677 int rc; 678 679 /* Ignore secondary VGA device because there is no VGA arbitration */ 680 if (! svga_primary_device(dev)) { 681 dev_info(&(dev->dev), "ignoring secondary device\n"); 682 return -ENODEV; 683 } 684 685 rc = aperture_remove_conflicting_pci_devices(dev, "vt8623fb"); 686 if (rc) 687 return rc; 688 689 /* Allocate and fill driver data structure */ 690 info = framebuffer_alloc(sizeof(struct vt8623fb_info), &(dev->dev)); 691 if (!info) 692 return -ENOMEM; 693 694 par = info->par; 695 mutex_init(&par->open_lock); 696 697 info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN; 698 info->fbops = &vt8623fb_ops; 699 700 /* Prepare PCI device */ 701 702 rc = pci_enable_device(dev); 703 if (rc < 0) { 704 dev_err(info->device, "cannot enable PCI device\n"); 705 goto err_enable_device; 706 } 707 708 rc = pci_request_regions(dev, "vt8623fb"); 709 if (rc < 0) { 710 dev_err(info->device, "cannot reserve framebuffer region\n"); 711 goto err_request_regions; 712 } 713 714 info->fix.smem_start = pci_resource_start(dev, 0); 715 info->fix.smem_len = pci_resource_len(dev, 0); 716 info->fix.mmio_start = pci_resource_start(dev, 1); 717 info->fix.mmio_len = pci_resource_len(dev, 1); 718 719 /* Map physical IO memory address into kernel space */ 720 info->screen_base = pci_iomap_wc(dev, 0, 0); 721 if (! info->screen_base) { 722 rc = -ENOMEM; 723 dev_err(info->device, "iomap for framebuffer failed\n"); 724 goto err_iomap_1; 725 } 726 727 par->mmio_base = pci_iomap(dev, 1, 0); 728 if (! par->mmio_base) { 729 rc = -ENOMEM; 730 dev_err(info->device, "iomap for MMIO failed\n"); 731 goto err_iomap_2; 732 } 733 734 bus_reg.start = 0; 735 bus_reg.end = 64 * 1024; 736 737 vga_res.flags = IORESOURCE_IO; 738 739 pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg); 740 741 par->state.vgabase = (void __iomem *) (unsigned long) vga_res.start; 742 743 /* Find how many physical memory there is on card */ 744 memsize1 = (vga_rseq(par->state.vgabase, 0x34) + 1) >> 1; 745 memsize2 = vga_rseq(par->state.vgabase, 0x39) << 2; 746 747 if ((16 <= memsize1) && (memsize1 <= 64) && (memsize1 == memsize2)) 748 info->screen_size = memsize1 << 20; 749 else { 750 dev_err(info->device, "memory size detection failed (%x %x), suppose 16 MB\n", memsize1, memsize2); 751 info->screen_size = 16 << 20; 752 } 753 754 info->fix.smem_len = info->screen_size; 755 strcpy(info->fix.id, "VIA VT8623"); 756 info->fix.type = FB_TYPE_PACKED_PIXELS; 757 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 758 info->fix.ypanstep = 0; 759 info->fix.accel = FB_ACCEL_NONE; 760 info->pseudo_palette = (void*)par->pseudo_palette; 761 762 /* Prepare startup mode */ 763 764 kernel_param_lock(THIS_MODULE); 765 rc = fb_find_mode(&(info->var), info, mode_option, NULL, 0, NULL, 8); 766 kernel_param_unlock(THIS_MODULE); 767 if (! ((rc == 1) || (rc == 2))) { 768 rc = -EINVAL; 769 dev_err(info->device, "mode %s not found\n", mode_option); 770 goto err_find_mode; 771 } 772 773 rc = fb_alloc_cmap(&info->cmap, 256, 0); 774 if (rc < 0) { 775 dev_err(info->device, "cannot allocate colormap\n"); 776 goto err_alloc_cmap; 777 } 778 779 rc = register_framebuffer(info); 780 if (rc < 0) { 781 dev_err(info->device, "cannot register framebuffer\n"); 782 goto err_reg_fb; 783 } 784 785 fb_info(info, "%s on %s, %d MB RAM\n", 786 info->fix.id, pci_name(dev), info->fix.smem_len >> 20); 787 788 /* Record a reference to the driver data */ 789 pci_set_drvdata(dev, info); 790 791 if (mtrr) 792 par->wc_cookie = arch_phys_wc_add(info->fix.smem_start, 793 info->fix.smem_len); 794 795 return 0; 796 797 /* Error handling */ 798err_reg_fb: 799 fb_dealloc_cmap(&info->cmap); 800err_alloc_cmap: 801err_find_mode: 802 pci_iounmap(dev, par->mmio_base); 803err_iomap_2: 804 pci_iounmap(dev, info->screen_base); 805err_iomap_1: 806 pci_release_regions(dev); 807err_request_regions: 808/* pci_disable_device(dev); */ 809err_enable_device: 810 framebuffer_release(info); 811 return rc; 812} 813 814/* PCI remove */ 815 816static void vt8623_pci_remove(struct pci_dev *dev) 817{ 818 struct fb_info *info = pci_get_drvdata(dev); 819 820 if (info) { 821 struct vt8623fb_info *par = info->par; 822 823 arch_phys_wc_del(par->wc_cookie); 824 unregister_framebuffer(info); 825 fb_dealloc_cmap(&info->cmap); 826 827 pci_iounmap(dev, info->screen_base); 828 pci_iounmap(dev, par->mmio_base); 829 pci_release_regions(dev); 830/* pci_disable_device(dev); */ 831 832 framebuffer_release(info); 833 } 834} 835 836 837/* PCI suspend */ 838 839static int __maybe_unused vt8623_pci_suspend(struct device *dev) 840{ 841 struct fb_info *info = dev_get_drvdata(dev); 842 struct vt8623fb_info *par = info->par; 843 844 dev_info(info->device, "suspend\n"); 845 846 console_lock(); 847 mutex_lock(&(par->open_lock)); 848 849 if (par->ref_count == 0) { 850 mutex_unlock(&(par->open_lock)); 851 console_unlock(); 852 return 0; 853 } 854 855 fb_set_suspend(info, 1); 856 857 mutex_unlock(&(par->open_lock)); 858 console_unlock(); 859 860 return 0; 861} 862 863 864/* PCI resume */ 865 866static int __maybe_unused vt8623_pci_resume(struct device *dev) 867{ 868 struct fb_info *info = dev_get_drvdata(dev); 869 struct vt8623fb_info *par = info->par; 870 871 dev_info(info->device, "resume\n"); 872 873 console_lock(); 874 mutex_lock(&(par->open_lock)); 875 876 if (par->ref_count == 0) 877 goto fail; 878 879 vt8623fb_set_par(info); 880 fb_set_suspend(info, 0); 881 882fail: 883 mutex_unlock(&(par->open_lock)); 884 console_unlock(); 885 886 return 0; 887} 888 889static const struct dev_pm_ops vt8623_pci_pm_ops = { 890#ifdef CONFIG_PM_SLEEP 891 .suspend = vt8623_pci_suspend, 892 .resume = vt8623_pci_resume, 893 .freeze = NULL, 894 .thaw = vt8623_pci_resume, 895 .poweroff = vt8623_pci_suspend, 896 .restore = vt8623_pci_resume, 897#endif /* CONFIG_PM_SLEEP */ 898}; 899 900/* List of boards that we are trying to support */ 901 902static const struct pci_device_id vt8623_devices[] = { 903 {PCI_DEVICE(PCI_VENDOR_ID_VIA, 0x3122)}, 904 {0, 0, 0, 0, 0, 0, 0} 905}; 906 907MODULE_DEVICE_TABLE(pci, vt8623_devices); 908 909static struct pci_driver vt8623fb_pci_driver = { 910 .name = "vt8623fb", 911 .id_table = vt8623_devices, 912 .probe = vt8623_pci_probe, 913 .remove = vt8623_pci_remove, 914 .driver.pm = &vt8623_pci_pm_ops, 915}; 916 917/* Cleanup */ 918 919static void __exit vt8623fb_cleanup(void) 920{ 921 pr_debug("vt8623fb: cleaning up\n"); 922 pci_unregister_driver(&vt8623fb_pci_driver); 923} 924 925/* Driver Initialisation */ 926 927static int __init vt8623fb_init(void) 928{ 929 930#ifndef MODULE 931 char *option = NULL; 932#endif 933 934 if (fb_modesetting_disabled("vt8623fb")) 935 return -ENODEV; 936 937#ifndef MODULE 938 if (fb_get_options("vt8623fb", &option)) 939 return -ENODEV; 940 941 if (option && *option) 942 mode_option = option; 943#endif 944 945 pr_debug("vt8623fb: initializing\n"); 946 return pci_register_driver(&vt8623fb_pci_driver); 947} 948 949/* ------------------------------------------------------------------------- */ 950 951/* Modularization */ 952 953module_init(vt8623fb_init); 954module_exit(vt8623fb_cleanup); 955