137535Sdes/* 2261284Sdes * linux/drivers/video/sa1100fb.h 337535Sdes * -- StrongARM 1100 LCD Controller Frame Buffer Device 437535Sdes * 537535Sdes * Copyright (C) 1999 Eric A. Thomas 637535Sdes * Based on acornfb.c Copyright (C) Russell King. 737535Sdes * 837535Sdes * This file is subject to the terms and conditions of the GNU General Public 937535Sdes * License. See the file COPYING in the main directory of this archive 1037535Sdes * for more details. 1137535Sdes */ 1237535Sdes 1337535Sdesstruct gpio_desc; 1437535Sdes 1563012Sdes#define LCCR0 0x0000 /* LCD Control Reg. 0 */ 1637535Sdes#define LCSR 0x0004 /* LCD Status Reg. */ 1737535Sdes#define DBAR1 0x0010 /* LCD DMA Base Address Reg. channel 1 */ 1837535Sdes#define DCAR1 0x0014 /* LCD DMA Current Address Reg. channel 1 */ 1937535Sdes#define DBAR2 0x0018 /* LCD DMA Base Address Reg. channel 2 */ 2037535Sdes#define DCAR2 0x001C /* LCD DMA Current Address Reg. channel 2 */ 2137535Sdes#define LCCR1 0x0020 /* LCD Control Reg. 1 */ 2237535Sdes#define LCCR2 0x0024 /* LCD Control Reg. 2 */ 2337535Sdes#define LCCR3 0x0028 /* LCD Control Reg. 3 */ 2437535Sdes 2537535Sdes/* Shadows for LCD controller registers */ 2637535Sdesstruct sa1100fb_lcd_reg { 2737535Sdes unsigned long lccr0; 2837535Sdes unsigned long lccr1; 2984203Sdillon unsigned long lccr2; 3084203Sdillon unsigned long lccr3; 3184203Sdillon}; 3263236Sdes 3363236Sdesstruct sa1100fb_info { 3463236Sdes struct fb_info fb; 3563236Sdes struct device *dev; 3663236Sdes const struct sa1100fb_rgb *rgb[NR_RGB]; 3763236Sdes void __iomem *base; 3863236Sdes struct gpio_desc *shannon_lcden; 3963236Sdes 4063236Sdes /* 4163236Sdes * These are the addresses we mapped 4263236Sdes * the framebuffer memory region to. 4363236Sdes */ 4463236Sdes dma_addr_t map_dma; 4563236Sdes u_char * map_cpu; 4663236Sdes u_int map_size; 4763236Sdes 4863236Sdes u_char * screen_cpu; 4990267Sdes dma_addr_t screen_dma; 5063236Sdes u16 * palette_cpu; 5163236Sdes dma_addr_t palette_dma; 5263236Sdes u_int palette_size; 5363236Sdes 5463236Sdes dma_addr_t dbar1; 5563236Sdes dma_addr_t dbar2; 5663236Sdes 5763236Sdes u_int reg_lccr0; 5863236Sdes u_int reg_lccr1; 5963236Sdes u_int reg_lccr2; 6063236Sdes u_int reg_lccr3; 6163236Sdes 6263236Sdes volatile u_char state; 6363236Sdes volatile u_char task_state; 6437535Sdes struct mutex ctrlr_lock; 6560737Sume wait_queue_head_t ctrlr_wait; 66186124Smurray struct work_struct task; 6737535Sdes 6863012Sdes#ifdef CONFIG_CPU_FREQ 6937535Sdes struct notifier_block freq_transition; 7063012Sdes#endif 7160376Sdes 7260189Sdes const struct sa1100fb_mach_info *inf; 7337608Sdes struct clk *clk; 7437535Sdes 7537535Sdes u32 pseudo_palette[16]; 7637535Sdes}; 7760376Sdes 7837535Sdes#define TO_INF(ptr,member) container_of(ptr,struct sa1100fb_info,member) 79240496Sdes 80240496Sdes#define SA1100_PALETTE_MODE_VAL(bpp) (((bpp) & 0x018) << 9) 81240496Sdes 82240496Sdes/* 83240496Sdes * These are the actions for set_ctrlr_state 84240496Sdes */ 85240496Sdes#define C_DISABLE (0) 86202613Sdes#define C_ENABLE (1) 87240496Sdes#define C_DISABLE_CLKCHANGE (2) 8837535Sdes#define C_ENABLE_CLKCHANGE (3) 89141958Skbyanc#define C_REENABLE (4) 90141958Skbyanc#define C_DISABLE_PM (5) 91141958Skbyanc#define C_ENABLE_PM (6) 9237535Sdes#define C_STARTUP (7) 9340939Sdes 9441862Sdes#define SA1100_NAME "SA1100" 9537535Sdes 9663012Sdes/* 97241839Seadler * Minimum X and Y resolutions 9837535Sdes */ 9963012Sdes#define MIN_XRES 64 10063012Sdes#define MIN_YRES 64 10163012Sdes 10263012Sdes