1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Support for Intel Camera Imaging ISP subsystem.
4 * Copyright (c) 2015, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13 * more details.
14 */
15
16#ifndef __IBUF_CTRL_GLOBAL_H_INCLUDED__
17#define __IBUF_CTRL_GLOBAL_H_INCLUDED__
18
19#include <type_support.h>
20
21#include <ibuf_cntrl_defs.h>	/* _IBUF_CNTRL_RECALC_WORDS_STATUS,
22				 * _IBUF_CNTRL_ARBITERS_STATUS,
23				 * _IBUF_CNTRL_PROC_REG_ALIGN,
24				 * etc.
25				 */
26
27/* Definition of contents of main controller state register is lacking
28 * in ibuf_cntrl_defs.h, so define these here:
29 */
30#define _IBUF_CNTRL_MAIN_CNTRL_FSM_MASK			0xf
31#define _IBUF_CNTRL_MAIN_CNTRL_FSM_NEXT_COMMAND_CHECK	0x9
32#define _IBUF_CNTRL_MAIN_CNTRL_MEM_INP_BUF_ALLOC	BIT(8)
33#define _IBUF_CNTRL_DMA_SYNC_WAIT_FOR_SYNC		1
34#define _IBUF_CNTRL_DMA_SYNC_FSM_WAIT_FOR_ACK		(0x3 << 1)
35
36struct	isp2401_ib_buffer_s {
37	u32	start_addr;	/* start address of the buffer in the
38					 * "input-buffer hardware block"
39					 */
40
41	u32	stride;		/* stride per buffer line (in bytes) */
42	u32	lines;		/* lines in the buffer */
43};
44typedef struct isp2401_ib_buffer_s	isp2401_ib_buffer_t;
45
46typedef struct ibuf_ctrl_cfg_s ibuf_ctrl_cfg_t;
47struct ibuf_ctrl_cfg_s {
48	bool online;
49
50	struct {
51		/* DMA configuration */
52		u32 channel;
53		u32 cmd; /* must be _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND */
54
55		/* DMA reconfiguration */
56		u32 shift_returned_items;
57		u32 elems_per_word_in_ibuf;
58		u32 elems_per_word_in_dest;
59	} dma_cfg;
60
61	isp2401_ib_buffer_t ib_buffer;
62
63	struct {
64		u32 stride;
65		u32 start_addr;
66		u32 lines;
67	} dest_buf_cfg;
68
69	u32 items_per_store;
70	u32 stores_per_frame;
71
72	struct {
73		u32 sync_cmd;	/* must be _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME */
74		u32 store_cmd;	/* must be _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS */
75	} stream2mmio_cfg;
76};
77
78extern const u32 N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID];
79
80#endif /* __IBUF_CTRL_GLOBAL_H_INCLUDED__ */
81