1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16#ifndef __ISYS_IRQ_PRIVATE_H__ 17#define __ISYS_IRQ_PRIVATE_H__ 18 19#include "isys_irq_global.h" 20#include "isys_irq_local.h" 21 22 23/* -------------------------------------------------------+ 24 | Native command interface (NCI) | 25 + -------------------------------------------------------*/ 26 27/** 28* @brief Get the isys irq status. 29* Refer to "isys_irq.h" for details. 30*/ 31void isys_irqc_state_get( 32 const isys_irq_ID_t isys_irqc_id, 33 isys_irqc_state_t *state) 34{ 35 state->edge = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_EDGE_REG_IDX); 36 state->mask = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX); 37 state->status = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_STATUS_REG_IDX); 38 state->enable = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX); 39 state->level_no = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_LEVEL_NO_REG_IDX); 40 /* 41 ** Invalid to read/load from write-only register 'clear' 42 ** state->clear = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX); 43 */ 44} 45 46/** 47* @brief Dump the isys irq status. 48* Refer to "isys_irq.h" for details. 49*/ 50void isys_irqc_state_dump( 51 const isys_irq_ID_t isys_irqc_id, 52 const isys_irqc_state_t *state) 53{ 54 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 55 "isys irq controller id %d\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n", 56 isys_irqc_id, 57 state->status, state->edge, state->mask, state->enable, state->level_no); 58} 59 60/* end of NCI */ 61 62/* -------------------------------------------------------+ 63 | Device level interface (DLI) | 64 + -------------------------------------------------------*/ 65 66/* Support functions */ 67void isys_irqc_reg_store( 68 const isys_irq_ID_t isys_irqc_id, 69 const unsigned int reg_idx, 70 const hrt_data value) 71{ 72 unsigned int reg_addr; 73 74 assert(isys_irqc_id < N_ISYS_IRQ_ID); 75 assert(reg_idx <= ISYS_IRQ_LEVEL_NO_REG_IDX); 76 77 reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); 78 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 79 "isys irq store at addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); 80 81 ia_css_device_store_uint32(reg_addr, value); 82} 83 84hrt_data isys_irqc_reg_load( 85 const isys_irq_ID_t isys_irqc_id, 86 const unsigned int reg_idx) 87{ 88 unsigned int reg_addr; 89 hrt_data value; 90 91 assert(isys_irqc_id < N_ISYS_IRQ_ID); 92 assert(reg_idx <= ISYS_IRQ_LEVEL_NO_REG_IDX); 93 94 reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); 95 value = ia_css_device_load_uint32(reg_addr); 96 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 97 "isys irq load from addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); 98 99 return value; 100} 101 102/* end of DLI */ 103 104 105#endif /* __ISYS_IRQ_PRIVATE_H__ */ 106