1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2010 Google, Inc. 4 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. 5 * 6 * Author: 7 * Colin Cross <ccross@android.com> 8 */ 9 10#ifndef __DRIVERS_MISC_TEGRA_FUSE_H 11#define __DRIVERS_MISC_TEGRA_FUSE_H 12 13#include <linux/dmaengine.h> 14#include <linux/types.h> 15 16struct nvmem_cell_lookup; 17struct nvmem_device; 18struct tegra_fuse; 19 20struct tegra_fuse_info { 21 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); 22 unsigned int size; 23 unsigned int spare; 24}; 25 26struct tegra_fuse_soc { 27 void (*init)(struct tegra_fuse *fuse); 28 void (*speedo_init)(struct tegra_sku_info *info); 29 int (*probe)(struct tegra_fuse *fuse); 30 31 const struct tegra_fuse_info *info; 32 33 const struct nvmem_cell_lookup *lookups; 34 unsigned int num_lookups; 35 const struct nvmem_cell_info *cells; 36 unsigned int num_cells; 37 const struct nvmem_keepout *keepouts; 38 unsigned int num_keepouts; 39 40 const struct attribute_group *soc_attr_group; 41 42 bool clk_suspend_on; 43}; 44 45struct tegra_fuse { 46 struct device *dev; 47 void __iomem *base; 48 phys_addr_t phys; 49 struct clk *clk; 50 struct reset_control *rst; 51 52 u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset); 53 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); 54 const struct tegra_fuse_soc *soc; 55 56 /* APBDMA on Tegra20 */ 57 struct { 58 struct mutex lock; 59 struct completion wait; 60 struct dma_chan *chan; 61 struct dma_slave_config config; 62 dma_addr_t phys; 63 u32 *virt; 64 } apbdma; 65 66 struct nvmem_device *nvmem; 67 struct nvmem_cell_lookup *lookups; 68}; 69 70void tegra_init_revision(void); 71void tegra_init_apbmisc(void); 72void tegra_acpi_init_apbmisc(void); 73 74u32 __init tegra_fuse_read_spare(unsigned int spare); 75u32 __init tegra_fuse_read_early(unsigned int offset); 76 77u8 tegra_get_major_rev(void); 78u8 tegra_get_minor_rev(void); 79 80extern const struct attribute_group tegra_soc_attr_group; 81 82#ifdef CONFIG_ARCH_TEGRA_2x_SOC 83void tegra20_init_speedo_data(struct tegra_sku_info *sku_info); 84#endif 85 86#ifdef CONFIG_ARCH_TEGRA_3x_SOC 87void tegra30_init_speedo_data(struct tegra_sku_info *sku_info); 88#endif 89 90#ifdef CONFIG_ARCH_TEGRA_114_SOC 91void tegra114_init_speedo_data(struct tegra_sku_info *sku_info); 92#endif 93 94#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 95void tegra124_init_speedo_data(struct tegra_sku_info *sku_info); 96#endif 97 98#ifdef CONFIG_ARCH_TEGRA_210_SOC 99void tegra210_init_speedo_data(struct tegra_sku_info *sku_info); 100#endif 101 102#ifdef CONFIG_ARCH_TEGRA_2x_SOC 103extern const struct tegra_fuse_soc tegra20_fuse_soc; 104#endif 105 106#ifdef CONFIG_ARCH_TEGRA_3x_SOC 107extern const struct tegra_fuse_soc tegra30_fuse_soc; 108#endif 109 110#ifdef CONFIG_ARCH_TEGRA_114_SOC 111extern const struct tegra_fuse_soc tegra114_fuse_soc; 112#endif 113 114#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 115extern const struct tegra_fuse_soc tegra124_fuse_soc; 116#endif 117 118#ifdef CONFIG_ARCH_TEGRA_210_SOC 119extern const struct tegra_fuse_soc tegra210_fuse_soc; 120#endif 121 122#ifdef CONFIG_ARCH_TEGRA_186_SOC 123extern const struct tegra_fuse_soc tegra186_fuse_soc; 124#endif 125 126#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ 127 IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) || \ 128 IS_ENABLED(CONFIG_ARCH_TEGRA_241_SOC) 129extern const struct attribute_group tegra194_soc_attr_group; 130#endif 131 132#ifdef CONFIG_ARCH_TEGRA_194_SOC 133extern const struct tegra_fuse_soc tegra194_fuse_soc; 134#endif 135 136#ifdef CONFIG_ARCH_TEGRA_234_SOC 137extern const struct tegra_fuse_soc tegra234_fuse_soc; 138#endif 139 140#ifdef CONFIG_ARCH_TEGRA_241_SOC 141extern const struct tegra_fuse_soc tegra241_fuse_soc; 142#endif 143 144#endif 145