1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _AHA152X_H
3#define _AHA152X_H
4
5/*
6 * $Id: aha152x.h,v 2.7 2004/01/24 11:39:03 fischer Exp $
7 */
8
9/* number of queueable commands
10   (unless we support more than 1 cmd_per_lun this should do) */
11#define AHA152X_MAXQUEUE 7
12
13#define AHA152X_REVID "Adaptec 152x SCSI driver; $Revision: 2.7 $"
14
15/* port addresses */
16#define SCSISEQ      (HOSTIOPORT0+0x00)    /* SCSI sequence control */
17#define SXFRCTL0     (HOSTIOPORT0+0x01)    /* SCSI transfer control 0 */
18#define SXFRCTL1     (HOSTIOPORT0+0x02)    /* SCSI transfer control 1 */
19#define SCSISIG      (HOSTIOPORT0+0x03)    /* SCSI signal in/out */
20#define SCSIRATE     (HOSTIOPORT0+0x04)    /* SCSI rate control */
21#define SELID        (HOSTIOPORT0+0x05)    /* selection/reselection ID */
22#define SCSIID       SELID                 /* SCSI ID */
23#define SCSIDAT      (HOSTIOPORT0+0x06)    /* SCSI latched data */
24#define SCSIBUS      (HOSTIOPORT0+0x07)    /* SCSI data bus */
25#define STCNT0       (HOSTIOPORT0+0x08)    /* SCSI transfer count 0 */
26#define STCNT1       (HOSTIOPORT0+0x09)    /* SCSI transfer count 1 */
27#define STCNT2       (HOSTIOPORT0+0x0a)    /* SCSI transfer count 2 */
28#define SSTAT0       (HOSTIOPORT0+0x0b)    /* SCSI interrupt status 0 */
29#define SSTAT1       (HOSTIOPORT0+0x0c)    /* SCSI interrupt status 1 */
30#define SSTAT2       (HOSTIOPORT0+0x0d)    /* SCSI interrupt status 2 */
31#define SCSITEST     (HOSTIOPORT0+0x0e)    /* SCSI test control */
32#define SSTAT3       SCSITEST              /* SCSI interrupt status 3 */
33#define SSTAT4       (HOSTIOPORT0+0x0f)    /* SCSI status 4 */
34#define SIMODE0      (HOSTIOPORT1+0x10)    /* SCSI interrupt mode 0 */
35#define SIMODE1      (HOSTIOPORT1+0x11)    /* SCSI interrupt mode 1 */
36#define DMACNTRL0    (HOSTIOPORT1+0x12)    /* DMA control 0 */
37#define DMACNTRL1    (HOSTIOPORT1+0x13)    /* DMA control 1 */
38#define DMASTAT      (HOSTIOPORT1+0x14)    /* DMA status */
39#define FIFOSTAT     (HOSTIOPORT1+0x15)    /* FIFO status */
40#define DATAPORT     (HOSTIOPORT1+0x16)    /* DATA port */
41#define BRSTCNTRL    (HOSTIOPORT1+0x18)    /* burst control */
42#define PORTA        (HOSTIOPORT1+0x1a)    /* PORT A */
43#define PORTB        (HOSTIOPORT1+0x1b)    /* PORT B */
44#define REV          (HOSTIOPORT1+0x1c)    /* revision */
45#define STACK        (HOSTIOPORT1+0x1d)    /* stack */
46#define TEST         (HOSTIOPORT1+0x1e)    /* test register */
47
48#define IO_RANGE        0x20
49
50/* used in aha152x_porttest */
51#define O_PORTA         0x1a               /* PORT A */
52#define O_PORTB         0x1b               /* PORT B */
53#define O_DMACNTRL1     0x13               /* DMA control 1 */
54#define O_STACK         0x1d               /* stack */
55
56/* used in tc1550_porttest */
57#define O_TC_PORTA      0x0a               /* PORT A */
58#define O_TC_PORTB      0x0b               /* PORT B */
59#define O_TC_DMACNTRL1  0x03               /* DMA control 1 */
60#define O_TC_STACK      0x0d               /* stack */
61
62/* bits and bitmasks to ports */
63
64/* SCSI sequence control */
65#define TEMODEO      0x80
66#define ENSELO       0x40
67#define ENSELI       0x20
68#define ENRESELI     0x10
69#define ENAUTOATNO   0x08
70#define ENAUTOATNI   0x04
71#define ENAUTOATNP   0x02
72#define SCSIRSTO     0x01
73
74/* SCSI transfer control 0 */
75#define SCSIEN       0x80
76#define DMAEN        0x40
77#define CH1          0x20
78#define CLRSTCNT     0x10
79#define SPIOEN       0x08
80#define CLRCH1       0x02
81
82/* SCSI transfer control 1 */
83#define BITBUCKET    0x80
84#define SWRAPEN      0x40
85#define ENSPCHK      0x20
86#define STIMESEL     0x18    /* mask */
87#define STIMESEL_    3
88#define ENSTIMER     0x04
89#define BYTEALIGN    0x02
90
91/* SCSI signal IN */
92#define SIG_CDI          0x80
93#define SIG_IOI          0x40
94#define SIG_MSGI         0x20
95#define SIG_ATNI         0x10
96#define SIG_SELI         0x08
97#define SIG_BSYI         0x04
98#define SIG_REQI         0x02
99#define SIG_ACKI         0x01
100
101/* SCSI Phases */
102#define P_MASK       (SIG_MSGI|SIG_CDI|SIG_IOI)
103#define P_DATAO      (0)
104#define P_DATAI      (SIG_IOI)
105#define P_CMD        (SIG_CDI)
106#define P_STATUS     (SIG_CDI|SIG_IOI)
107#define P_MSGO       (SIG_MSGI|SIG_CDI)
108#define P_MSGI       (SIG_MSGI|SIG_CDI|SIG_IOI)
109
110/* SCSI signal OUT */
111#define SIG_CDO          0x80
112#define SIG_IOO          0x40
113#define SIG_MSGO         0x20
114#define SIG_ATNO         0x10
115#define SIG_SELO         0x08
116#define SIG_BSYO         0x04
117#define SIG_REQO         0x02
118#define SIG_ACKO         0x01
119
120/* SCSI rate control */
121#define SXFR         0x70    /* mask */
122#define SXFR_        4
123#define SOFS         0x0f    /* mask */
124
125/* SCSI ID */
126#define OID          0x70
127#define OID_         4
128#define TID          0x07
129
130/* SCSI transfer count */
131#define GETSTCNT() ( (GETPORT(STCNT2)<<16) \
132                   + (GETPORT(STCNT1)<< 8) \
133                   + GETPORT(STCNT0) )
134
135#define SETSTCNT(X) { SETPORT(STCNT2, ((X) & 0xFF0000) >> 16); \
136                      SETPORT(STCNT1, ((X) & 0x00FF00) >>  8); \
137                      SETPORT(STCNT0, ((X) & 0x0000FF) ); }
138
139/* SCSI interrupt status */
140#define TARGET       0x80
141#define SELDO        0x40
142#define SELDI        0x20
143#define SELINGO      0x10
144#define SWRAP        0x08
145#define SDONE        0x04
146#define SPIORDY      0x02
147#define DMADONE      0x01
148
149#define SETSDONE     0x80
150#define CLRSELDO     0x40
151#define CLRSELDI     0x20
152#define CLRSELINGO   0x10
153#define CLRSWRAP     0x08
154#define CLRSDONE     0x04
155#define CLRSPIORDY   0x02
156#define CLRDMADONE   0x01
157
158/* SCSI status 1 */
159#define SELTO        0x80
160#define ATNTARG      0x40
161#define SCSIRSTI     0x20
162#define PHASEMIS     0x10
163#define BUSFREE      0x08
164#define SCSIPERR     0x04
165#define PHASECHG     0x02
166#define REQINIT      0x01
167
168#define CLRSELTIMO   0x80
169#define CLRATNO      0x40
170#define CLRSCSIRSTI  0x20
171#define CLRBUSFREE   0x08
172#define CLRSCSIPERR  0x04
173#define CLRPHASECHG  0x02
174#define CLRREQINIT   0x01
175
176/* SCSI status 2 */
177#define SOFFSET      0x20
178#define SEMPTY       0x10
179#define SFULL        0x08
180#define SFCNT        0x07    /* mask */
181
182/* SCSI status 3 */
183#define SCSICNT      0xf0    /* mask */
184#define SCSICNT_     4
185#define OFFCNT       0x0f    /* mask */
186
187/* SCSI TEST control */
188#define SCTESTU      0x08
189#define SCTESTD      0x04
190#define STCTEST      0x01
191
192/* SCSI status 4 */
193#define SYNCERR      0x04
194#define FWERR        0x02
195#define FRERR        0x01
196
197#define CLRSYNCERR   0x04
198#define CLRFWERR     0x02
199#define CLRFRERR     0x01
200
201/* SCSI interrupt mode 0 */
202#define ENSELDO      0x40
203#define ENSELDI      0x20
204#define ENSELINGO    0x10
205#define ENSWRAP      0x08
206#define ENSDONE      0x04
207#define ENSPIORDY    0x02
208#define ENDMADONE    0x01
209
210/* SCSI interrupt mode 1 */
211#define ENSELTIMO    0x80
212#define ENATNTARG    0x40
213#define ENSCSIRST    0x20
214#define ENPHASEMIS   0x10
215#define ENBUSFREE    0x08
216#define ENSCSIPERR   0x04
217#define ENPHASECHG   0x02
218#define ENREQINIT    0x01
219
220/* DMA control 0 */
221#define ENDMA        0x80
222#define _8BIT        0x40
223#define DMA          0x20
224#define WRITE_READ   0x08
225#define INTEN        0x04
226#define RSTFIFO      0x02
227#define SWINT        0x01
228
229/* DMA control 1 */
230#define PWRDWN       0x80
231#define STK          0x07    /* mask */
232
233/* DMA status */
234#define ATDONE       0x80
235#define WORDRDY      0x40
236#define INTSTAT      0x20
237#define DFIFOFULL    0x10
238#define DFIFOEMP     0x08
239
240/* BURST control */
241#define BON          0xf0
242#define BOFF         0x0f
243
244/* TEST REGISTER */
245#define BOFFTMR      0x40
246#define BONTMR       0x20
247#define STCNTH       0x10
248#define STCNTM       0x08
249#define STCNTL       0x04
250#define SCSIBLK      0x02
251#define DMABLK       0x01
252
253/* On the AHA-152x board PORTA and PORTB contain
254   some information about the board's configuration. */
255typedef union {
256  struct {
257    unsigned reserved:2;    /* reserved */
258    unsigned tardisc:1;     /* Target disconnect: 0=disabled, 1=enabled */
259    unsigned syncneg:1;     /* Initial sync neg: 0=disabled, 1=enabled */
260    unsigned msgclasses:2;  /* Message classes
261                                 0=#4
262                                 1=#0, #1, #2, #3, #4
263                                 2=#0, #3, #4
264                                 3=#0, #4
265                             */
266    unsigned boot:1;        /* boot: 0=disabled, 1=enabled */
267    unsigned dma:1;         /* Transfer mode: 0=PIO; 1=DMA */
268    unsigned id:3;          /* SCSI-id */
269    unsigned irq:2;         /* IRQ-Channel: 0,3=12, 1=10, 2=11 */
270    unsigned dmachan:2;     /* DMA-Channel: 0=0, 1=5, 2=6, 3=7 */
271    unsigned parity:1;      /* SCSI-parity: 1=enabled 0=disabled */
272  } fields;
273  unsigned short port;
274} aha152x_config ;
275
276#define cf_parity     fields.parity
277#define cf_dmachan    fields.dmachan
278#define cf_irq        fields.irq
279#define cf_id         fields.id
280#define cf_dma        fields.dma
281#define cf_boot       fields.boot
282#define cf_msgclasses fields.msgclasses
283#define cf_syncneg    fields.syncneg
284#define cf_tardisc    fields.tardisc
285#define cf_port       port
286
287/* Some macros to manipulate ports and their bits */
288
289#define SETPORT(PORT, VAL)	outb( (VAL), (PORT) )
290#define GETPORT(PORT)		inb( PORT )
291#define SETBITS(PORT, BITS)	outb( (inb(PORT) | (BITS)), (PORT) )
292#define CLRBITS(PORT, BITS)	outb( (inb(PORT) & ~(BITS)), (PORT) )
293#define TESTHI(PORT, BITS)	((inb(PORT) & (BITS)) == (BITS))
294#define TESTLO(PORT, BITS)	((inb(PORT) & (BITS)) == 0)
295
296#define SETRATE(RATE)		SETPORT(SCSIRATE,(RATE) & 0x7f)
297
298#if defined(AHA152X_DEBUG)
299enum {
300  debug_procinfo  = 0x0001,
301  debug_queue     = 0x0002,
302  debug_locking   = 0x0004,
303  debug_intr      = 0x0008,
304  debug_selection = 0x0010,
305  debug_msgo      = 0x0020,
306  debug_msgi      = 0x0040,
307  debug_status    = 0x0080,
308  debug_cmd       = 0x0100,
309  debug_datai     = 0x0200,
310  debug_datao     = 0x0400,
311  debug_eh	  = 0x0800,
312  debug_done      = 0x1000,
313  debug_phases    = 0x2000,
314};
315#endif
316
317/* for the pcmcia stub */
318struct aha152x_setup {
319	int io_port;
320	int irq;
321	int scsiid;
322	int reconnect;
323	int parity;
324	int synchronous;
325	int delay;
326	int ext_trans;
327	int tc1550;
328#if defined(AHA152X_DEBUG)
329	int debug;
330#endif
331	char *conf;
332};
333
334struct Scsi_Host *aha152x_probe_one(struct aha152x_setup *);
335void aha152x_release(struct Scsi_Host *);
336int aha152x_host_reset_host(struct Scsi_Host *);
337
338#endif /* _AHA152X_H */
339