1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2022 NXP
4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/iopoll.h>
9#include <linux/mod_devicetable.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/pm_domain.h>
13
14#define MIX_SLICE_SW_CTRL_OFF		0x20
15#define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK	BIT(4)
16#define SLICE_SW_CTRL_PDN_SOFT_MASK	BIT(31)
17
18#define MIX_FUNC_STAT_OFF		0xB4
19
20#define FUNC_STAT_PSW_STAT_MASK		BIT(0)
21#define FUNC_STAT_RST_STAT_MASK		BIT(2)
22#define FUNC_STAT_ISO_STAT_MASK		BIT(4)
23
24struct imx93_power_domain {
25	struct generic_pm_domain genpd;
26	struct device *dev;
27	void __iomem *addr;
28	struct clk_bulk_data *clks;
29	int num_clks;
30	bool init_off;
31};
32
33#define to_imx93_pd(_genpd) container_of(_genpd, struct imx93_power_domain, genpd)
34
35static int imx93_pd_on(struct generic_pm_domain *genpd)
36{
37	struct imx93_power_domain *domain = to_imx93_pd(genpd);
38	void __iomem *addr = domain->addr;
39	u32 val;
40	int ret;
41
42	ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
43	if (ret) {
44		dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name);
45		return ret;
46	}
47
48	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
49	val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
50	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
51
52	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
53				 !(val & FUNC_STAT_ISO_STAT_MASK), 1, 10000);
54	if (ret) {
55		dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val);
56		return ret;
57	}
58
59	return 0;
60}
61
62static int imx93_pd_off(struct generic_pm_domain *genpd)
63{
64	struct imx93_power_domain *domain = to_imx93_pd(genpd);
65	void __iomem *addr = domain->addr;
66	int ret;
67	u32 val;
68
69	/* Power off MIX */
70	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
71	val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
72	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
73
74	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
75				 val & FUNC_STAT_PSW_STAT_MASK, 1, 1000);
76	if (ret) {
77		dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val);
78		return ret;
79	}
80
81	clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
82
83	return 0;
84};
85
86static void imx93_pd_remove(struct platform_device *pdev)
87{
88	struct imx93_power_domain *domain = platform_get_drvdata(pdev);
89	struct device *dev = &pdev->dev;
90	struct device_node *np = dev->of_node;
91
92	if (!domain->init_off)
93		clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
94
95	of_genpd_del_provider(np);
96	pm_genpd_remove(&domain->genpd);
97}
98
99static int imx93_pd_probe(struct platform_device *pdev)
100{
101	struct device *dev = &pdev->dev;
102	struct device_node *np = dev->of_node;
103	struct imx93_power_domain *domain;
104	int ret;
105
106	domain = devm_kzalloc(dev, sizeof(*domain), GFP_KERNEL);
107	if (!domain)
108		return -ENOMEM;
109
110	domain->addr = devm_platform_ioremap_resource(pdev, 0);
111	if (IS_ERR(domain->addr))
112		return PTR_ERR(domain->addr);
113
114	domain->num_clks = devm_clk_bulk_get_all(dev, &domain->clks);
115	if (domain->num_clks < 0)
116		return dev_err_probe(dev, domain->num_clks, "Failed to get domain's clocks\n");
117
118	domain->genpd.name = dev_name(dev);
119	domain->genpd.power_off = imx93_pd_off;
120	domain->genpd.power_on = imx93_pd_on;
121	domain->dev = dev;
122
123	domain->init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) & FUNC_STAT_ISO_STAT_MASK;
124	/* Just to sync the status of hardware */
125	if (!domain->init_off) {
126		ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
127		if (ret) {
128			dev_err(domain->dev, "failed to enable clocks for domain: %s\n",
129				domain->genpd.name);
130			return ret;
131		}
132	}
133
134	ret = pm_genpd_init(&domain->genpd, NULL, domain->init_off);
135	if (ret)
136		goto err_clk_unprepare;
137
138	platform_set_drvdata(pdev, domain);
139
140	ret = of_genpd_add_provider_simple(np, &domain->genpd);
141	if (ret)
142		goto err_genpd_remove;
143
144	return 0;
145
146err_genpd_remove:
147	pm_genpd_remove(&domain->genpd);
148
149err_clk_unprepare:
150	if (!domain->init_off)
151		clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
152
153	return ret;
154}
155
156static const struct of_device_id imx93_pd_ids[] = {
157	{ .compatible = "fsl,imx93-src-slice" },
158	{ }
159};
160MODULE_DEVICE_TABLE(of, imx93_pd_ids);
161
162static struct platform_driver imx93_power_domain_driver = {
163	.driver = {
164		.name	= "imx93_power_domain",
165		.of_match_table = imx93_pd_ids,
166	},
167	.probe = imx93_pd_probe,
168	.remove_new = imx93_pd_remove,
169};
170module_platform_driver(imx93_power_domain_driver);
171
172MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
173MODULE_DESCRIPTION("NXP i.MX93 power domain driver");
174MODULE_LICENSE("GPL");
175