1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Ltd.
5 */
6
7#include <linux/module.h>
8#include <linux/of.h>
9#include <linux/platform_device.h>
10
11#include "pinctrl-msm.h"
12
13#define REG_SIZE 0x1000
14#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7)	\
15	{						\
16		.grp = PINCTRL_PINGROUP("gpio" #id, 	\
17			gpio##id##_pins, 		\
18			ARRAY_SIZE(gpio##id##_pins)),	\
19		.funcs = (int[]){			\
20			msm_mux_gpio, /* gpio mode */	\
21			msm_mux_##f1,			\
22			msm_mux_##f2,			\
23			msm_mux_##f3,			\
24			msm_mux_##f4,			\
25			msm_mux_##f5,			\
26			msm_mux_##f6,			\
27			msm_mux_##f7,			\
28		},					\
29		.nfuncs = 8,				\
30		.ctl_reg = REG_SIZE * id,		\
31		.io_reg = 0x4 + REG_SIZE * id,		\
32		.intr_cfg_reg = 0x8 + REG_SIZE * id,	\
33		.intr_status_reg = 0xc + REG_SIZE * id,	\
34		.intr_target_reg = 0x8 + REG_SIZE * id,	\
35		.mux_bit = 2,			\
36		.pull_bit = 0,			\
37		.drv_bit = 6,			\
38		.oe_bit = 9,			\
39		.in_bit = 0,			\
40		.out_bit = 1,			\
41		.egpio_enable = 12,		\
42		.egpio_present = 11,		\
43		.intr_enable_bit = 0,		\
44		.intr_status_bit = 0,		\
45		.intr_target_bit = 5,		\
46		.intr_target_kpss_val = 3,	\
47		.intr_raw_status_bit = 4,	\
48		.intr_polarity_bit = 1,		\
49		.intr_detection_bit = 2,	\
50		.intr_detection_width = 2,	\
51	}
52
53#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)	\
54	{						\
55		.grp = PINCTRL_PINGROUP(#pg_name, 	\
56			pg_name##_pins, 		\
57			ARRAY_SIZE(pg_name##_pins)),	\
58		.ctl_reg = ctl,				\
59		.io_reg = 0,				\
60		.intr_cfg_reg = 0,			\
61		.intr_status_reg = 0,			\
62		.intr_target_reg = 0,			\
63		.mux_bit = -1,				\
64		.pull_bit = pull,			\
65		.drv_bit = drv,				\
66		.oe_bit = -1,				\
67		.in_bit = -1,				\
68		.out_bit = -1,				\
69		.intr_enable_bit = -1,			\
70		.intr_status_bit = -1,			\
71		.intr_target_bit = -1,			\
72		.intr_raw_status_bit = -1,		\
73		.intr_polarity_bit = -1,		\
74		.intr_detection_bit = -1,		\
75		.intr_detection_width = -1,		\
76	}
77
78#define UFS_RESET(pg_name, offset)				\
79	{						\
80		.grp = PINCTRL_PINGROUP(#pg_name, 	\
81			pg_name##_pins, 		\
82			ARRAY_SIZE(pg_name##_pins)),	\
83		.ctl_reg = offset,			\
84		.io_reg = offset + 0x4,			\
85		.intr_cfg_reg = 0,			\
86		.intr_status_reg = 0,			\
87		.intr_target_reg = 0,			\
88		.mux_bit = -1,				\
89		.pull_bit = 3,				\
90		.drv_bit = 0,				\
91		.oe_bit = -1,				\
92		.in_bit = -1,				\
93		.out_bit = 0,				\
94		.intr_enable_bit = -1,			\
95		.intr_status_bit = -1,			\
96		.intr_target_bit = -1,			\
97		.intr_raw_status_bit = -1,		\
98		.intr_polarity_bit = -1,		\
99		.intr_detection_bit = -1,		\
100		.intr_detection_width = -1,		\
101	}
102static const struct pinctrl_pin_desc sc8280xp_pins[] = {
103	PINCTRL_PIN(0, "GPIO_0"),
104	PINCTRL_PIN(1, "GPIO_1"),
105	PINCTRL_PIN(2, "GPIO_2"),
106	PINCTRL_PIN(3, "GPIO_3"),
107	PINCTRL_PIN(4, "GPIO_4"),
108	PINCTRL_PIN(5, "GPIO_5"),
109	PINCTRL_PIN(6, "GPIO_6"),
110	PINCTRL_PIN(7, "GPIO_7"),
111	PINCTRL_PIN(8, "GPIO_8"),
112	PINCTRL_PIN(9, "GPIO_9"),
113	PINCTRL_PIN(10, "GPIO_10"),
114	PINCTRL_PIN(11, "GPIO_11"),
115	PINCTRL_PIN(12, "GPIO_12"),
116	PINCTRL_PIN(13, "GPIO_13"),
117	PINCTRL_PIN(14, "GPIO_14"),
118	PINCTRL_PIN(15, "GPIO_15"),
119	PINCTRL_PIN(16, "GPIO_16"),
120	PINCTRL_PIN(17, "GPIO_17"),
121	PINCTRL_PIN(18, "GPIO_18"),
122	PINCTRL_PIN(19, "GPIO_19"),
123	PINCTRL_PIN(20, "GPIO_20"),
124	PINCTRL_PIN(21, "GPIO_21"),
125	PINCTRL_PIN(22, "GPIO_22"),
126	PINCTRL_PIN(23, "GPIO_23"),
127	PINCTRL_PIN(24, "GPIO_24"),
128	PINCTRL_PIN(25, "GPIO_25"),
129	PINCTRL_PIN(26, "GPIO_26"),
130	PINCTRL_PIN(27, "GPIO_27"),
131	PINCTRL_PIN(28, "GPIO_28"),
132	PINCTRL_PIN(29, "GPIO_29"),
133	PINCTRL_PIN(30, "GPIO_30"),
134	PINCTRL_PIN(31, "GPIO_31"),
135	PINCTRL_PIN(32, "GPIO_32"),
136	PINCTRL_PIN(33, "GPIO_33"),
137	PINCTRL_PIN(34, "GPIO_34"),
138	PINCTRL_PIN(35, "GPIO_35"),
139	PINCTRL_PIN(36, "GPIO_36"),
140	PINCTRL_PIN(37, "GPIO_37"),
141	PINCTRL_PIN(38, "GPIO_38"),
142	PINCTRL_PIN(39, "GPIO_39"),
143	PINCTRL_PIN(40, "GPIO_40"),
144	PINCTRL_PIN(41, "GPIO_41"),
145	PINCTRL_PIN(42, "GPIO_42"),
146	PINCTRL_PIN(43, "GPIO_43"),
147	PINCTRL_PIN(44, "GPIO_44"),
148	PINCTRL_PIN(45, "GPIO_45"),
149	PINCTRL_PIN(46, "GPIO_46"),
150	PINCTRL_PIN(47, "GPIO_47"),
151	PINCTRL_PIN(48, "GPIO_48"),
152	PINCTRL_PIN(49, "GPIO_49"),
153	PINCTRL_PIN(50, "GPIO_50"),
154	PINCTRL_PIN(51, "GPIO_51"),
155	PINCTRL_PIN(52, "GPIO_52"),
156	PINCTRL_PIN(53, "GPIO_53"),
157	PINCTRL_PIN(54, "GPIO_54"),
158	PINCTRL_PIN(55, "GPIO_55"),
159	PINCTRL_PIN(56, "GPIO_56"),
160	PINCTRL_PIN(57, "GPIO_57"),
161	PINCTRL_PIN(58, "GPIO_58"),
162	PINCTRL_PIN(59, "GPIO_59"),
163	PINCTRL_PIN(60, "GPIO_60"),
164	PINCTRL_PIN(61, "GPIO_61"),
165	PINCTRL_PIN(62, "GPIO_62"),
166	PINCTRL_PIN(63, "GPIO_63"),
167	PINCTRL_PIN(64, "GPIO_64"),
168	PINCTRL_PIN(65, "GPIO_65"),
169	PINCTRL_PIN(66, "GPIO_66"),
170	PINCTRL_PIN(67, "GPIO_67"),
171	PINCTRL_PIN(68, "GPIO_68"),
172	PINCTRL_PIN(69, "GPIO_69"),
173	PINCTRL_PIN(70, "GPIO_70"),
174	PINCTRL_PIN(71, "GPIO_71"),
175	PINCTRL_PIN(72, "GPIO_72"),
176	PINCTRL_PIN(73, "GPIO_73"),
177	PINCTRL_PIN(74, "GPIO_74"),
178	PINCTRL_PIN(75, "GPIO_75"),
179	PINCTRL_PIN(76, "GPIO_76"),
180	PINCTRL_PIN(77, "GPIO_77"),
181	PINCTRL_PIN(78, "GPIO_78"),
182	PINCTRL_PIN(79, "GPIO_79"),
183	PINCTRL_PIN(80, "GPIO_80"),
184	PINCTRL_PIN(81, "GPIO_81"),
185	PINCTRL_PIN(82, "GPIO_82"),
186	PINCTRL_PIN(83, "GPIO_83"),
187	PINCTRL_PIN(84, "GPIO_84"),
188	PINCTRL_PIN(85, "GPIO_85"),
189	PINCTRL_PIN(86, "GPIO_86"),
190	PINCTRL_PIN(87, "GPIO_87"),
191	PINCTRL_PIN(88, "GPIO_88"),
192	PINCTRL_PIN(89, "GPIO_89"),
193	PINCTRL_PIN(90, "GPIO_90"),
194	PINCTRL_PIN(91, "GPIO_91"),
195	PINCTRL_PIN(92, "GPIO_92"),
196	PINCTRL_PIN(93, "GPIO_93"),
197	PINCTRL_PIN(94, "GPIO_94"),
198	PINCTRL_PIN(95, "GPIO_95"),
199	PINCTRL_PIN(96, "GPIO_96"),
200	PINCTRL_PIN(97, "GPIO_97"),
201	PINCTRL_PIN(98, "GPIO_98"),
202	PINCTRL_PIN(99, "GPIO_99"),
203	PINCTRL_PIN(100, "GPIO_100"),
204	PINCTRL_PIN(101, "GPIO_101"),
205	PINCTRL_PIN(102, "GPIO_102"),
206	PINCTRL_PIN(103, "GPIO_103"),
207	PINCTRL_PIN(104, "GPIO_104"),
208	PINCTRL_PIN(105, "GPIO_105"),
209	PINCTRL_PIN(106, "GPIO_106"),
210	PINCTRL_PIN(107, "GPIO_107"),
211	PINCTRL_PIN(108, "GPIO_108"),
212	PINCTRL_PIN(109, "GPIO_109"),
213	PINCTRL_PIN(110, "GPIO_110"),
214	PINCTRL_PIN(111, "GPIO_111"),
215	PINCTRL_PIN(112, "GPIO_112"),
216	PINCTRL_PIN(113, "GPIO_113"),
217	PINCTRL_PIN(114, "GPIO_114"),
218	PINCTRL_PIN(115, "GPIO_115"),
219	PINCTRL_PIN(116, "GPIO_116"),
220	PINCTRL_PIN(117, "GPIO_117"),
221	PINCTRL_PIN(118, "GPIO_118"),
222	PINCTRL_PIN(119, "GPIO_119"),
223	PINCTRL_PIN(120, "GPIO_120"),
224	PINCTRL_PIN(121, "GPIO_121"),
225	PINCTRL_PIN(122, "GPIO_122"),
226	PINCTRL_PIN(123, "GPIO_123"),
227	PINCTRL_PIN(124, "GPIO_124"),
228	PINCTRL_PIN(125, "GPIO_125"),
229	PINCTRL_PIN(126, "GPIO_126"),
230	PINCTRL_PIN(127, "GPIO_127"),
231	PINCTRL_PIN(128, "GPIO_128"),
232	PINCTRL_PIN(129, "GPIO_129"),
233	PINCTRL_PIN(130, "GPIO_130"),
234	PINCTRL_PIN(131, "GPIO_131"),
235	PINCTRL_PIN(132, "GPIO_132"),
236	PINCTRL_PIN(133, "GPIO_133"),
237	PINCTRL_PIN(134, "GPIO_134"),
238	PINCTRL_PIN(135, "GPIO_135"),
239	PINCTRL_PIN(136, "GPIO_136"),
240	PINCTRL_PIN(137, "GPIO_137"),
241	PINCTRL_PIN(138, "GPIO_138"),
242	PINCTRL_PIN(139, "GPIO_139"),
243	PINCTRL_PIN(140, "GPIO_140"),
244	PINCTRL_PIN(141, "GPIO_141"),
245	PINCTRL_PIN(142, "GPIO_142"),
246	PINCTRL_PIN(143, "GPIO_143"),
247	PINCTRL_PIN(144, "GPIO_144"),
248	PINCTRL_PIN(145, "GPIO_145"),
249	PINCTRL_PIN(146, "GPIO_146"),
250	PINCTRL_PIN(147, "GPIO_147"),
251	PINCTRL_PIN(148, "GPIO_148"),
252	PINCTRL_PIN(149, "GPIO_149"),
253	PINCTRL_PIN(150, "GPIO_150"),
254	PINCTRL_PIN(151, "GPIO_151"),
255	PINCTRL_PIN(152, "GPIO_152"),
256	PINCTRL_PIN(153, "GPIO_153"),
257	PINCTRL_PIN(154, "GPIO_154"),
258	PINCTRL_PIN(155, "GPIO_155"),
259	PINCTRL_PIN(156, "GPIO_156"),
260	PINCTRL_PIN(157, "GPIO_157"),
261	PINCTRL_PIN(158, "GPIO_158"),
262	PINCTRL_PIN(159, "GPIO_159"),
263	PINCTRL_PIN(160, "GPIO_160"),
264	PINCTRL_PIN(161, "GPIO_161"),
265	PINCTRL_PIN(162, "GPIO_162"),
266	PINCTRL_PIN(163, "GPIO_163"),
267	PINCTRL_PIN(164, "GPIO_164"),
268	PINCTRL_PIN(165, "GPIO_165"),
269	PINCTRL_PIN(166, "GPIO_166"),
270	PINCTRL_PIN(167, "GPIO_167"),
271	PINCTRL_PIN(168, "GPIO_168"),
272	PINCTRL_PIN(169, "GPIO_169"),
273	PINCTRL_PIN(170, "GPIO_170"),
274	PINCTRL_PIN(171, "GPIO_171"),
275	PINCTRL_PIN(172, "GPIO_172"),
276	PINCTRL_PIN(173, "GPIO_173"),
277	PINCTRL_PIN(174, "GPIO_174"),
278	PINCTRL_PIN(175, "GPIO_175"),
279	PINCTRL_PIN(176, "GPIO_176"),
280	PINCTRL_PIN(177, "GPIO_177"),
281	PINCTRL_PIN(178, "GPIO_178"),
282	PINCTRL_PIN(179, "GPIO_179"),
283	PINCTRL_PIN(180, "GPIO_180"),
284	PINCTRL_PIN(181, "GPIO_181"),
285	PINCTRL_PIN(182, "GPIO_182"),
286	PINCTRL_PIN(183, "GPIO_183"),
287	PINCTRL_PIN(184, "GPIO_184"),
288	PINCTRL_PIN(185, "GPIO_185"),
289	PINCTRL_PIN(186, "GPIO_186"),
290	PINCTRL_PIN(187, "GPIO_187"),
291	PINCTRL_PIN(188, "GPIO_188"),
292	PINCTRL_PIN(189, "GPIO_189"),
293	PINCTRL_PIN(190, "GPIO_190"),
294	PINCTRL_PIN(191, "GPIO_191"),
295	PINCTRL_PIN(192, "GPIO_192"),
296	PINCTRL_PIN(193, "GPIO_193"),
297	PINCTRL_PIN(194, "GPIO_194"),
298	PINCTRL_PIN(195, "GPIO_195"),
299	PINCTRL_PIN(196, "GPIO_196"),
300	PINCTRL_PIN(197, "GPIO_197"),
301	PINCTRL_PIN(198, "GPIO_198"),
302	PINCTRL_PIN(199, "GPIO_199"),
303	PINCTRL_PIN(200, "GPIO_200"),
304	PINCTRL_PIN(201, "GPIO_201"),
305	PINCTRL_PIN(202, "GPIO_202"),
306	PINCTRL_PIN(203, "GPIO_203"),
307	PINCTRL_PIN(204, "GPIO_204"),
308	PINCTRL_PIN(205, "GPIO_205"),
309	PINCTRL_PIN(206, "GPIO_206"),
310	PINCTRL_PIN(207, "GPIO_207"),
311	PINCTRL_PIN(208, "GPIO_208"),
312	PINCTRL_PIN(209, "GPIO_209"),
313	PINCTRL_PIN(210, "GPIO_210"),
314	PINCTRL_PIN(211, "GPIO_211"),
315	PINCTRL_PIN(212, "GPIO_212"),
316	PINCTRL_PIN(213, "GPIO_213"),
317	PINCTRL_PIN(214, "GPIO_214"),
318	PINCTRL_PIN(215, "GPIO_215"),
319	PINCTRL_PIN(216, "GPIO_216"),
320	PINCTRL_PIN(217, "GPIO_217"),
321	PINCTRL_PIN(218, "GPIO_218"),
322	PINCTRL_PIN(219, "GPIO_219"),
323	PINCTRL_PIN(220, "GPIO_220"),
324	PINCTRL_PIN(221, "GPIO_221"),
325	PINCTRL_PIN(222, "GPIO_222"),
326	PINCTRL_PIN(223, "GPIO_223"),
327	PINCTRL_PIN(224, "GPIO_224"),
328	PINCTRL_PIN(225, "GPIO_225"),
329	PINCTRL_PIN(226, "GPIO_226"),
330	PINCTRL_PIN(227, "GPIO_227"),
331	PINCTRL_PIN(228, "UFS_RESET"),
332	PINCTRL_PIN(229, "UFS1_RESET"),
333	PINCTRL_PIN(230, "SDC2_CLK"),
334	PINCTRL_PIN(231, "SDC2_CMD"),
335	PINCTRL_PIN(232, "SDC2_DATA"),
336};
337
338#define DECLARE_MSM_GPIO_PINS(pin) \
339	static const unsigned int gpio##pin##_pins[] = { pin }
340DECLARE_MSM_GPIO_PINS(0);
341DECLARE_MSM_GPIO_PINS(1);
342DECLARE_MSM_GPIO_PINS(2);
343DECLARE_MSM_GPIO_PINS(3);
344DECLARE_MSM_GPIO_PINS(4);
345DECLARE_MSM_GPIO_PINS(5);
346DECLARE_MSM_GPIO_PINS(6);
347DECLARE_MSM_GPIO_PINS(7);
348DECLARE_MSM_GPIO_PINS(8);
349DECLARE_MSM_GPIO_PINS(9);
350DECLARE_MSM_GPIO_PINS(10);
351DECLARE_MSM_GPIO_PINS(11);
352DECLARE_MSM_GPIO_PINS(12);
353DECLARE_MSM_GPIO_PINS(13);
354DECLARE_MSM_GPIO_PINS(14);
355DECLARE_MSM_GPIO_PINS(15);
356DECLARE_MSM_GPIO_PINS(16);
357DECLARE_MSM_GPIO_PINS(17);
358DECLARE_MSM_GPIO_PINS(18);
359DECLARE_MSM_GPIO_PINS(19);
360DECLARE_MSM_GPIO_PINS(20);
361DECLARE_MSM_GPIO_PINS(21);
362DECLARE_MSM_GPIO_PINS(22);
363DECLARE_MSM_GPIO_PINS(23);
364DECLARE_MSM_GPIO_PINS(24);
365DECLARE_MSM_GPIO_PINS(25);
366DECLARE_MSM_GPIO_PINS(26);
367DECLARE_MSM_GPIO_PINS(27);
368DECLARE_MSM_GPIO_PINS(28);
369DECLARE_MSM_GPIO_PINS(29);
370DECLARE_MSM_GPIO_PINS(30);
371DECLARE_MSM_GPIO_PINS(31);
372DECLARE_MSM_GPIO_PINS(32);
373DECLARE_MSM_GPIO_PINS(33);
374DECLARE_MSM_GPIO_PINS(34);
375DECLARE_MSM_GPIO_PINS(35);
376DECLARE_MSM_GPIO_PINS(36);
377DECLARE_MSM_GPIO_PINS(37);
378DECLARE_MSM_GPIO_PINS(38);
379DECLARE_MSM_GPIO_PINS(39);
380DECLARE_MSM_GPIO_PINS(40);
381DECLARE_MSM_GPIO_PINS(41);
382DECLARE_MSM_GPIO_PINS(42);
383DECLARE_MSM_GPIO_PINS(43);
384DECLARE_MSM_GPIO_PINS(44);
385DECLARE_MSM_GPIO_PINS(45);
386DECLARE_MSM_GPIO_PINS(46);
387DECLARE_MSM_GPIO_PINS(47);
388DECLARE_MSM_GPIO_PINS(48);
389DECLARE_MSM_GPIO_PINS(49);
390DECLARE_MSM_GPIO_PINS(50);
391DECLARE_MSM_GPIO_PINS(51);
392DECLARE_MSM_GPIO_PINS(52);
393DECLARE_MSM_GPIO_PINS(53);
394DECLARE_MSM_GPIO_PINS(54);
395DECLARE_MSM_GPIO_PINS(55);
396DECLARE_MSM_GPIO_PINS(56);
397DECLARE_MSM_GPIO_PINS(57);
398DECLARE_MSM_GPIO_PINS(58);
399DECLARE_MSM_GPIO_PINS(59);
400DECLARE_MSM_GPIO_PINS(60);
401DECLARE_MSM_GPIO_PINS(61);
402DECLARE_MSM_GPIO_PINS(62);
403DECLARE_MSM_GPIO_PINS(63);
404DECLARE_MSM_GPIO_PINS(64);
405DECLARE_MSM_GPIO_PINS(65);
406DECLARE_MSM_GPIO_PINS(66);
407DECLARE_MSM_GPIO_PINS(67);
408DECLARE_MSM_GPIO_PINS(68);
409DECLARE_MSM_GPIO_PINS(69);
410DECLARE_MSM_GPIO_PINS(70);
411DECLARE_MSM_GPIO_PINS(71);
412DECLARE_MSM_GPIO_PINS(72);
413DECLARE_MSM_GPIO_PINS(73);
414DECLARE_MSM_GPIO_PINS(74);
415DECLARE_MSM_GPIO_PINS(75);
416DECLARE_MSM_GPIO_PINS(76);
417DECLARE_MSM_GPIO_PINS(77);
418DECLARE_MSM_GPIO_PINS(78);
419DECLARE_MSM_GPIO_PINS(79);
420DECLARE_MSM_GPIO_PINS(80);
421DECLARE_MSM_GPIO_PINS(81);
422DECLARE_MSM_GPIO_PINS(82);
423DECLARE_MSM_GPIO_PINS(83);
424DECLARE_MSM_GPIO_PINS(84);
425DECLARE_MSM_GPIO_PINS(85);
426DECLARE_MSM_GPIO_PINS(86);
427DECLARE_MSM_GPIO_PINS(87);
428DECLARE_MSM_GPIO_PINS(88);
429DECLARE_MSM_GPIO_PINS(89);
430DECLARE_MSM_GPIO_PINS(90);
431DECLARE_MSM_GPIO_PINS(91);
432DECLARE_MSM_GPIO_PINS(92);
433DECLARE_MSM_GPIO_PINS(93);
434DECLARE_MSM_GPIO_PINS(94);
435DECLARE_MSM_GPIO_PINS(95);
436DECLARE_MSM_GPIO_PINS(96);
437DECLARE_MSM_GPIO_PINS(97);
438DECLARE_MSM_GPIO_PINS(98);
439DECLARE_MSM_GPIO_PINS(99);
440DECLARE_MSM_GPIO_PINS(100);
441DECLARE_MSM_GPIO_PINS(101);
442DECLARE_MSM_GPIO_PINS(102);
443DECLARE_MSM_GPIO_PINS(103);
444DECLARE_MSM_GPIO_PINS(104);
445DECLARE_MSM_GPIO_PINS(105);
446DECLARE_MSM_GPIO_PINS(106);
447DECLARE_MSM_GPIO_PINS(107);
448DECLARE_MSM_GPIO_PINS(108);
449DECLARE_MSM_GPIO_PINS(109);
450DECLARE_MSM_GPIO_PINS(110);
451DECLARE_MSM_GPIO_PINS(111);
452DECLARE_MSM_GPIO_PINS(112);
453DECLARE_MSM_GPIO_PINS(113);
454DECLARE_MSM_GPIO_PINS(114);
455DECLARE_MSM_GPIO_PINS(115);
456DECLARE_MSM_GPIO_PINS(116);
457DECLARE_MSM_GPIO_PINS(117);
458DECLARE_MSM_GPIO_PINS(118);
459DECLARE_MSM_GPIO_PINS(119);
460DECLARE_MSM_GPIO_PINS(120);
461DECLARE_MSM_GPIO_PINS(121);
462DECLARE_MSM_GPIO_PINS(122);
463DECLARE_MSM_GPIO_PINS(123);
464DECLARE_MSM_GPIO_PINS(124);
465DECLARE_MSM_GPIO_PINS(125);
466DECLARE_MSM_GPIO_PINS(126);
467DECLARE_MSM_GPIO_PINS(127);
468DECLARE_MSM_GPIO_PINS(128);
469DECLARE_MSM_GPIO_PINS(129);
470DECLARE_MSM_GPIO_PINS(130);
471DECLARE_MSM_GPIO_PINS(131);
472DECLARE_MSM_GPIO_PINS(132);
473DECLARE_MSM_GPIO_PINS(133);
474DECLARE_MSM_GPIO_PINS(134);
475DECLARE_MSM_GPIO_PINS(135);
476DECLARE_MSM_GPIO_PINS(136);
477DECLARE_MSM_GPIO_PINS(137);
478DECLARE_MSM_GPIO_PINS(138);
479DECLARE_MSM_GPIO_PINS(139);
480DECLARE_MSM_GPIO_PINS(140);
481DECLARE_MSM_GPIO_PINS(141);
482DECLARE_MSM_GPIO_PINS(142);
483DECLARE_MSM_GPIO_PINS(143);
484DECLARE_MSM_GPIO_PINS(144);
485DECLARE_MSM_GPIO_PINS(145);
486DECLARE_MSM_GPIO_PINS(146);
487DECLARE_MSM_GPIO_PINS(147);
488DECLARE_MSM_GPIO_PINS(148);
489DECLARE_MSM_GPIO_PINS(149);
490DECLARE_MSM_GPIO_PINS(150);
491DECLARE_MSM_GPIO_PINS(151);
492DECLARE_MSM_GPIO_PINS(152);
493DECLARE_MSM_GPIO_PINS(153);
494DECLARE_MSM_GPIO_PINS(154);
495DECLARE_MSM_GPIO_PINS(155);
496DECLARE_MSM_GPIO_PINS(156);
497DECLARE_MSM_GPIO_PINS(157);
498DECLARE_MSM_GPIO_PINS(158);
499DECLARE_MSM_GPIO_PINS(159);
500DECLARE_MSM_GPIO_PINS(160);
501DECLARE_MSM_GPIO_PINS(161);
502DECLARE_MSM_GPIO_PINS(162);
503DECLARE_MSM_GPIO_PINS(163);
504DECLARE_MSM_GPIO_PINS(164);
505DECLARE_MSM_GPIO_PINS(165);
506DECLARE_MSM_GPIO_PINS(166);
507DECLARE_MSM_GPIO_PINS(167);
508DECLARE_MSM_GPIO_PINS(168);
509DECLARE_MSM_GPIO_PINS(169);
510DECLARE_MSM_GPIO_PINS(170);
511DECLARE_MSM_GPIO_PINS(171);
512DECLARE_MSM_GPIO_PINS(172);
513DECLARE_MSM_GPIO_PINS(173);
514DECLARE_MSM_GPIO_PINS(174);
515DECLARE_MSM_GPIO_PINS(175);
516DECLARE_MSM_GPIO_PINS(176);
517DECLARE_MSM_GPIO_PINS(177);
518DECLARE_MSM_GPIO_PINS(178);
519DECLARE_MSM_GPIO_PINS(179);
520DECLARE_MSM_GPIO_PINS(180);
521DECLARE_MSM_GPIO_PINS(181);
522DECLARE_MSM_GPIO_PINS(182);
523DECLARE_MSM_GPIO_PINS(183);
524DECLARE_MSM_GPIO_PINS(184);
525DECLARE_MSM_GPIO_PINS(185);
526DECLARE_MSM_GPIO_PINS(186);
527DECLARE_MSM_GPIO_PINS(187);
528DECLARE_MSM_GPIO_PINS(188);
529DECLARE_MSM_GPIO_PINS(189);
530DECLARE_MSM_GPIO_PINS(190);
531DECLARE_MSM_GPIO_PINS(191);
532DECLARE_MSM_GPIO_PINS(192);
533DECLARE_MSM_GPIO_PINS(193);
534DECLARE_MSM_GPIO_PINS(194);
535DECLARE_MSM_GPIO_PINS(195);
536DECLARE_MSM_GPIO_PINS(196);
537DECLARE_MSM_GPIO_PINS(197);
538DECLARE_MSM_GPIO_PINS(198);
539DECLARE_MSM_GPIO_PINS(199);
540DECLARE_MSM_GPIO_PINS(200);
541DECLARE_MSM_GPIO_PINS(201);
542DECLARE_MSM_GPIO_PINS(202);
543DECLARE_MSM_GPIO_PINS(203);
544DECLARE_MSM_GPIO_PINS(204);
545DECLARE_MSM_GPIO_PINS(205);
546DECLARE_MSM_GPIO_PINS(206);
547DECLARE_MSM_GPIO_PINS(207);
548DECLARE_MSM_GPIO_PINS(208);
549DECLARE_MSM_GPIO_PINS(209);
550DECLARE_MSM_GPIO_PINS(210);
551DECLARE_MSM_GPIO_PINS(211);
552DECLARE_MSM_GPIO_PINS(212);
553DECLARE_MSM_GPIO_PINS(213);
554DECLARE_MSM_GPIO_PINS(214);
555DECLARE_MSM_GPIO_PINS(215);
556DECLARE_MSM_GPIO_PINS(216);
557DECLARE_MSM_GPIO_PINS(217);
558DECLARE_MSM_GPIO_PINS(218);
559DECLARE_MSM_GPIO_PINS(219);
560DECLARE_MSM_GPIO_PINS(220);
561DECLARE_MSM_GPIO_PINS(221);
562DECLARE_MSM_GPIO_PINS(222);
563DECLARE_MSM_GPIO_PINS(223);
564DECLARE_MSM_GPIO_PINS(224);
565DECLARE_MSM_GPIO_PINS(225);
566DECLARE_MSM_GPIO_PINS(226);
567DECLARE_MSM_GPIO_PINS(227);
568
569static const unsigned int ufs_reset_pins[] = { 228 };
570static const unsigned int ufs1_reset_pins[] = { 229 };
571static const unsigned int sdc2_clk_pins[] = { 230 };
572static const unsigned int sdc2_cmd_pins[] = { 231 };
573static const unsigned int sdc2_data_pins[] = { 232 };
574
575enum sc8280xp_functions {
576	msm_mux_atest_char,
577	msm_mux_atest_usb,
578	msm_mux_audio_ref,
579	msm_mux_cam_mclk,
580	msm_mux_cci_async,
581	msm_mux_cci_i2c,
582	msm_mux_cci_timer0,
583	msm_mux_cci_timer1,
584	msm_mux_cci_timer2,
585	msm_mux_cci_timer3,
586	msm_mux_cci_timer4,
587	msm_mux_cci_timer5,
588	msm_mux_cci_timer6,
589	msm_mux_cci_timer7,
590	msm_mux_cci_timer8,
591	msm_mux_cci_timer9,
592	msm_mux_cmu_rng,
593	msm_mux_cri_trng,
594	msm_mux_cri_trng0,
595	msm_mux_cri_trng1,
596	msm_mux_dbg_out,
597	msm_mux_ddr_bist,
598	msm_mux_ddr_pxi0,
599	msm_mux_ddr_pxi1,
600	msm_mux_ddr_pxi2,
601	msm_mux_ddr_pxi3,
602	msm_mux_ddr_pxi4,
603	msm_mux_ddr_pxi5,
604	msm_mux_ddr_pxi6,
605	msm_mux_ddr_pxi7,
606	msm_mux_dp2_hot,
607	msm_mux_dp3_hot,
608	msm_mux_edp0_lcd,
609	msm_mux_edp1_lcd,
610	msm_mux_edp2_lcd,
611	msm_mux_edp3_lcd,
612	msm_mux_edp_hot,
613	msm_mux_egpio,
614	msm_mux_emac0_dll,
615	msm_mux_emac0_mcg0,
616	msm_mux_emac0_mcg1,
617	msm_mux_emac0_mcg2,
618	msm_mux_emac0_mcg3,
619	msm_mux_emac0_phy,
620	msm_mux_emac0_ptp,
621	msm_mux_emac1_dll0,
622	msm_mux_emac1_dll1,
623	msm_mux_emac1_mcg0,
624	msm_mux_emac1_mcg1,
625	msm_mux_emac1_mcg2,
626	msm_mux_emac1_mcg3,
627	msm_mux_emac1_phy,
628	msm_mux_emac1_ptp,
629	msm_mux_gcc_gp1,
630	msm_mux_gcc_gp2,
631	msm_mux_gcc_gp3,
632	msm_mux_gcc_gp4,
633	msm_mux_gcc_gp5,
634	msm_mux_gpio,
635	msm_mux_hs1_mi2s,
636	msm_mux_hs2_mi2s,
637	msm_mux_hs3_mi2s,
638	msm_mux_ibi_i3c,
639	msm_mux_jitter_bist,
640	msm_mux_lpass_slimbus,
641	msm_mux_mdp0_vsync0,
642	msm_mux_mdp0_vsync1,
643	msm_mux_mdp0_vsync2,
644	msm_mux_mdp0_vsync3,
645	msm_mux_mdp0_vsync4,
646	msm_mux_mdp0_vsync5,
647	msm_mux_mdp0_vsync6,
648	msm_mux_mdp0_vsync7,
649	msm_mux_mdp0_vsync8,
650	msm_mux_mdp1_vsync0,
651	msm_mux_mdp1_vsync1,
652	msm_mux_mdp1_vsync2,
653	msm_mux_mdp1_vsync3,
654	msm_mux_mdp1_vsync4,
655	msm_mux_mdp1_vsync5,
656	msm_mux_mdp1_vsync6,
657	msm_mux_mdp1_vsync7,
658	msm_mux_mdp1_vsync8,
659	msm_mux_mdp_vsync,
660	msm_mux_mi2s0_data0,
661	msm_mux_mi2s0_data1,
662	msm_mux_mi2s0_sck,
663	msm_mux_mi2s0_ws,
664	msm_mux_mi2s1_data0,
665	msm_mux_mi2s1_data1,
666	msm_mux_mi2s1_sck,
667	msm_mux_mi2s1_ws,
668	msm_mux_mi2s2_data0,
669	msm_mux_mi2s2_data1,
670	msm_mux_mi2s2_sck,
671	msm_mux_mi2s2_ws,
672	msm_mux_mi2s_mclk1,
673	msm_mux_mi2s_mclk2,
674	msm_mux_pcie2a_clkreq,
675	msm_mux_pcie2b_clkreq,
676	msm_mux_pcie3a_clkreq,
677	msm_mux_pcie3b_clkreq,
678	msm_mux_pcie4_clkreq,
679	msm_mux_phase_flag,
680	msm_mux_pll_bist,
681	msm_mux_pll_clk,
682	msm_mux_prng_rosc0,
683	msm_mux_prng_rosc1,
684	msm_mux_prng_rosc2,
685	msm_mux_prng_rosc3,
686	msm_mux_qdss_cti,
687	msm_mux_qdss_gpio,
688	msm_mux_qspi,
689	msm_mux_qspi_clk,
690	msm_mux_qspi_cs,
691	msm_mux_qup0,
692	msm_mux_qup1,
693	msm_mux_qup10,
694	msm_mux_qup11,
695	msm_mux_qup12,
696	msm_mux_qup13,
697	msm_mux_qup14,
698	msm_mux_qup15,
699	msm_mux_qup16,
700	msm_mux_qup17,
701	msm_mux_qup18,
702	msm_mux_qup19,
703	msm_mux_qup2,
704	msm_mux_qup20,
705	msm_mux_qup21,
706	msm_mux_qup22,
707	msm_mux_qup23,
708	msm_mux_qup3,
709	msm_mux_qup4,
710	msm_mux_qup5,
711	msm_mux_qup6,
712	msm_mux_qup7,
713	msm_mux_qup8,
714	msm_mux_qup9,
715	msm_mux_rgmii_0,
716	msm_mux_rgmii_1,
717	msm_mux_sd_write,
718	msm_mux_sdc40,
719	msm_mux_sdc42,
720	msm_mux_sdc43,
721	msm_mux_sdc4_clk,
722	msm_mux_sdc4_cmd,
723	msm_mux_tb_trig,
724	msm_mux_tgu,
725	msm_mux_tsense_pwm1,
726	msm_mux_tsense_pwm2,
727	msm_mux_tsense_pwm3,
728	msm_mux_tsense_pwm4,
729	msm_mux_usb0_dp,
730	msm_mux_usb0_phy,
731	msm_mux_usb0_sbrx,
732	msm_mux_usb0_sbtx,
733	msm_mux_usb0_usb4,
734	msm_mux_usb1_dp,
735	msm_mux_usb1_phy,
736	msm_mux_usb1_sbrx,
737	msm_mux_usb1_sbtx,
738	msm_mux_usb1_usb4,
739	msm_mux_usb2phy_ac,
740	msm_mux_vsense_trigger,
741	msm_mux__,
742};
743
744static const char * const gpio_groups[] = {
745	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
746	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
747	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
748	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
749	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
750	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
751	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
752	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
753	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
754	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
755	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio78",
756	"gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", "gpio85",
757	"gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", "gpio92",
758	"gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", "gpio99",
759	"gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105",
760	"gpio106", "gpio107", "gpio108", "gpio109", "gpio110", "gpio111",
761	"gpio112", "gpio113", "gpio114", "gpio115", "gpio116", "gpio117",
762	"gpio118", "gpio119", "gpio120", "gpio121", "gpio122", "gpio123",
763	"gpio124", "gpio125", "gpio126", "gpio127", "gpio128", "gpio129",
764	"gpio130", "gpio131", "gpio132", "gpio133", "gpio134", "gpio135",
765	"gpio136", "gpio137", "gpio138", "gpio139", "gpio140", "gpio141",
766	"gpio142", "gpio143", "gpio144", "gpio145", "gpio146", "gpio147",
767	"gpio148", "gpio149", "gpio150", "gpio151", "gpio152", "gpio153",
768	"gpio154", "gpio155", "gpio156", "gpio157", "gpio158", "gpio159",
769	"gpio160", "gpio161", "gpio162", "gpio163", "gpio164", "gpio165",
770	"gpio166", "gpio167", "gpio168", "gpio169", "gpio170", "gpio171",
771	"gpio172", "gpio173", "gpio174", "gpio175", "gpio176", "gpio177",
772	"gpio178", "gpio179", "gpio180", "gpio181", "gpio182", "gpio183",
773	"gpio184", "gpio185", "gpio186", "gpio187", "gpio188", "gpio189",
774	"gpio190", "gpio191", "gpio192", "gpio193", "gpio194", "gpio195",
775	"gpio196", "gpio197", "gpio198", "gpio199", "gpio200", "gpio201",
776	"gpio202", "gpio203", "gpio204", "gpio205", "gpio206", "gpio207",
777	"gpio208", "gpio209", "gpio210", "gpio211", "gpio212", "gpio213",
778	"gpio214", "gpio215", "gpio216", "gpio217", "gpio218", "gpio219",
779	"gpio220", "gpio221", "gpio222", "gpio223", "gpio224", "gpio225",
780	"gpio226", "gpio227",
781};
782
783static const char * const atest_char_groups[] = {
784	"gpio134", "gpio139", "gpio140", "gpio142", "gpio143",
785};
786
787static const char * const atest_usb_groups[] = {
788	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio78",
789	"gpio79", "gpio97", "gpio98", "gpio101", "gpio102", "gpio103",
790	"gpio104", "gpio105", "gpio110", "gpio111", "gpio112", "gpio113",
791	"gpio114", "gpio121", "gpio122", "gpio130", "gpio131", "gpio135",
792	"gpio137", "gpio138", "gpio148", "gpio149",
793};
794
795static const char * const audio_ref_groups[] = {
796	"gpio80",
797};
798
799static const char * const cam_mclk_groups[] = {
800	"gpio6", "gpio7", "gpio16", "gpio17", "gpio33", "gpio34", "gpio119",
801	"gpio120",
802};
803
804static const char * const cci_async_groups[] = {
805	"gpio15", "gpio119", "gpio120", "gpio160", "gpio161", "gpio167",
806};
807
808static const char * const cci_i2c_groups[] = {
809	"gpio10", "gpio11", "gpio12", "gpio13", "gpio113", "gpio114",
810	"gpio115", "gpio116", "gpio117", "gpio118", "gpio123", "gpio124",
811	"gpio145", "gpio146", "gpio164", "gpio165",
812};
813
814static const char * const cci_timer0_groups[] = {
815	"gpio119",
816};
817
818static const char * const cci_timer1_groups[] = {
819	"gpio120",
820};
821
822static const char * const cci_timer2_groups[] = {
823	"gpio14",
824};
825
826static const char * const cci_timer3_groups[] = {
827	"gpio15",
828};
829
830static const char * const cci_timer4_groups[] = {
831	"gpio161",
832};
833
834static const char * const cci_timer5_groups[] = {
835	"gpio139",
836};
837
838static const char * const cci_timer6_groups[] = {
839	"gpio162",
840};
841
842static const char * const cci_timer7_groups[] = {
843	"gpio163",
844};
845
846static const char * const cci_timer8_groups[] = {
847	"gpio167",
848};
849
850static const char * const cci_timer9_groups[] = {
851	"gpio160",
852};
853
854static const char * const cmu_rng_groups[] = {
855	"gpio123", "gpio124", "gpio126", "gpio136",
856};
857
858static const char * const cri_trng0_groups[] = {
859	"gpio187",
860};
861
862static const char * const cri_trng1_groups[] = {
863	"gpio188",
864};
865
866static const char * const cri_trng_groups[] = {
867	"gpio190",
868};
869
870static const char * const dbg_out_groups[] = {
871	"gpio125",
872};
873
874static const char * const ddr_bist_groups[] = {
875	"gpio42", "gpio45", "gpio46", "gpio47",
876};
877
878static const char * const ddr_pxi0_groups[] = {
879	"gpio121", "gpio126",
880};
881
882static const char * const ddr_pxi1_groups[] = {
883	"gpio124", "gpio125",
884};
885
886static const char * const ddr_pxi2_groups[] = {
887	"gpio123", "gpio138",
888};
889
890static const char * const ddr_pxi3_groups[] = {
891	"gpio120", "gpio137",
892};
893
894static const char * const ddr_pxi4_groups[] = {
895	"gpio216", "gpio217",
896};
897
898static const char * const ddr_pxi5_groups[] = {
899	"gpio214", "gpio215",
900};
901
902static const char * const ddr_pxi6_groups[] = {
903	"gpio79", "gpio218",
904};
905
906static const char * const ddr_pxi7_groups[] = {
907	"gpio135", "gpio136",
908};
909
910static const char * const dp2_hot_groups[] = {
911	"gpio20",
912};
913
914static const char * const dp3_hot_groups[] = {
915	"gpio45",
916};
917
918static const char * const edp0_lcd_groups[] = {
919	"gpio26",
920};
921
922static const char * const edp1_lcd_groups[] = {
923	"gpio27",
924};
925
926static const char * const edp2_lcd_groups[] = {
927	"gpio28",
928};
929
930static const char * const edp3_lcd_groups[] = {
931	"gpio29",
932};
933
934static const char * const edp_hot_groups[] = {
935	"gpio2", "gpio3", "gpio6", "gpio7",
936};
937
938static const char * const egpio_groups[] = {
939	"gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194",
940	"gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200",
941	"gpio201", "gpio202", "gpio203", "gpio204", "gpio205", "gpio206",
942	"gpio207", "gpio208", "gpio209", "gpio210", "gpio211", "gpio212",
943	"gpio213", "gpio214", "gpio215", "gpio216", "gpio217", "gpio218",
944	"gpio219", "gpio220", "gpio221", "gpio222", "gpio223", "gpio224",
945	"gpio225", "gpio226", "gpio227",
946};
947
948static const char * const emac0_dll_groups[] = {
949	"gpio216", "gpio217",
950};
951
952static const char * const emac0_mcg0_groups[] = {
953	"gpio160",
954};
955
956static const char * const emac0_mcg1_groups[] = {
957	"gpio161",
958};
959
960static const char * const emac0_mcg2_groups[] = {
961	"gpio162",
962};
963
964static const char * const emac0_mcg3_groups[] = {
965	"gpio163",
966};
967
968static const char * const emac0_phy_groups[] = {
969	"gpio127",
970};
971
972static const char * const emac0_ptp_groups[] = {
973	"gpio130", "gpio130", "gpio131", "gpio131", "gpio156", "gpio156",
974	"gpio157", "gpio157", "gpio158", "gpio158", "gpio159", "gpio159",
975};
976
977static const char * const emac1_dll0_groups[] = {
978	"gpio215",
979};
980
981static const char * const emac1_dll1_groups[] = {
982	"gpio218",
983};
984
985static const char * const emac1_mcg0_groups[] = {
986	"gpio57",
987};
988
989static const char * const emac1_mcg1_groups[] = {
990	"gpio58",
991};
992
993static const char * const emac1_mcg2_groups[] = {
994	"gpio68",
995};
996
997static const char * const emac1_mcg3_groups[] = {
998	"gpio69",
999};
1000
1001static const char * const emac1_phy_groups[] = {
1002	"gpio54",
1003};
1004
1005static const char * const emac1_ptp_groups[] = {
1006	"gpio55", "gpio55", "gpio56", "gpio56", "gpio93", "gpio93", "gpio94",
1007	"gpio94", "gpio95", "gpio95", "gpio96", "gpio96",
1008};
1009
1010static const char * const gcc_gp1_groups[] = {
1011	"gpio119", "gpio149",
1012};
1013
1014static const char * const gcc_gp2_groups[] = {
1015	"gpio114", "gpio120",
1016};
1017
1018static const char * const gcc_gp3_groups[] = {
1019	"gpio115", "gpio139",
1020};
1021
1022static const char * const gcc_gp4_groups[] = {
1023	"gpio160", "gpio162",
1024};
1025
1026static const char * const gcc_gp5_groups[] = {
1027	"gpio167", "gpio168",
1028};
1029
1030static const char * const hs1_mi2s_groups[] = {
1031	"gpio208", "gpio209", "gpio210", "gpio211",
1032};
1033
1034static const char * const hs2_mi2s_groups[] = {
1035	"gpio91", "gpio92", "gpio218", "gpio219",
1036};
1037
1038static const char * const hs3_mi2s_groups[] = {
1039	"gpio224", "gpio225", "gpio226", "gpio227",
1040};
1041
1042static const char * const ibi_i3c_groups[] = {
1043	"gpio4", "gpio5", "gpio36", "gpio37", "gpio128", "gpio129", "gpio154",
1044	"gpio155",
1045};
1046
1047static const char * const jitter_bist_groups[] = {
1048	"gpio140",
1049};
1050
1051static const char * const lpass_slimbus_groups[] = {
1052	"gpio220", "gpio221",
1053};
1054
1055static const char * const mdp0_vsync0_groups[] = {
1056	"gpio1",
1057};
1058
1059static const char * const mdp0_vsync1_groups[] = {
1060	"gpio2",
1061};
1062
1063static const char * const mdp0_vsync2_groups[] = {
1064	"gpio8",
1065};
1066
1067static const char * const mdp0_vsync3_groups[] = {
1068	"gpio9",
1069};
1070
1071static const char * const mdp0_vsync4_groups[] = {
1072	"gpio10",
1073};
1074
1075static const char * const mdp0_vsync5_groups[] = {
1076	"gpio11",
1077};
1078
1079static const char * const mdp0_vsync6_groups[] = {
1080	"gpio12",
1081};
1082
1083static const char * const mdp0_vsync7_groups[] = {
1084	"gpio13",
1085};
1086
1087static const char * const mdp0_vsync8_groups[] = {
1088	"gpio16",
1089};
1090
1091static const char * const mdp1_vsync0_groups[] = {
1092	"gpio17",
1093};
1094
1095static const char * const mdp1_vsync1_groups[] = {
1096	"gpio18",
1097};
1098
1099static const char * const mdp1_vsync2_groups[] = {
1100	"gpio19",
1101};
1102
1103static const char * const mdp1_vsync3_groups[] = {
1104	"gpio20",
1105};
1106
1107static const char * const mdp1_vsync4_groups[] = {
1108	"gpio36",
1109};
1110
1111static const char * const mdp1_vsync5_groups[] = {
1112	"gpio37",
1113};
1114
1115static const char * const mdp1_vsync6_groups[] = {
1116	"gpio38",
1117};
1118
1119static const char * const mdp1_vsync7_groups[] = {
1120	"gpio39",
1121};
1122
1123static const char * const mdp1_vsync8_groups[] = {
1124	"gpio40",
1125};
1126
1127static const char * const mdp_vsync_groups[] = {
1128	"gpio8", "gpio100", "gpio101",
1129};
1130
1131static const char * const mi2s0_data0_groups[] = {
1132	"gpio95",
1133};
1134
1135static const char * const mi2s0_data1_groups[] = {
1136	"gpio96",
1137};
1138
1139static const char * const mi2s0_sck_groups[] = {
1140	"gpio93",
1141};
1142
1143static const char * const mi2s0_ws_groups[] = {
1144	"gpio94",
1145};
1146
1147static const char * const mi2s1_data0_groups[] = {
1148	"gpio222",
1149};
1150
1151static const char * const mi2s1_data1_groups[] = {
1152	"gpio223",
1153};
1154
1155static const char * const mi2s1_sck_groups[] = {
1156	"gpio220",
1157};
1158
1159static const char * const mi2s1_ws_groups[] = {
1160	"gpio221",
1161};
1162
1163static const char * const mi2s2_data0_groups[] = {
1164	"gpio214",
1165};
1166
1167static const char * const mi2s2_data1_groups[] = {
1168	"gpio215",
1169};
1170
1171static const char * const mi2s2_sck_groups[] = {
1172	"gpio212",
1173};
1174
1175static const char * const mi2s2_ws_groups[] = {
1176	"gpio213",
1177};
1178
1179static const char * const mi2s_mclk1_groups[] = {
1180	"gpio80", "gpio216",
1181};
1182
1183static const char * const mi2s_mclk2_groups[] = {
1184	"gpio217",
1185};
1186
1187static const char * const pcie2a_clkreq_groups[] = {
1188	"gpio142",
1189};
1190
1191static const char * const pcie2b_clkreq_groups[] = {
1192	"gpio144",
1193};
1194
1195static const char * const pcie3a_clkreq_groups[] = {
1196	"gpio150",
1197};
1198
1199static const char * const pcie3b_clkreq_groups[] = {
1200	"gpio152",
1201};
1202
1203static const char * const pcie4_clkreq_groups[] = {
1204	"gpio140",
1205};
1206
1207static const char * const phase_flag_groups[] = {
1208	"gpio80", "gpio81", "gpio82", "gpio83", "gpio87", "gpio88", "gpio89",
1209	"gpio90", "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio132",
1210	"gpio144", "gpio145", "gpio146", "gpio147", "gpio195", "gpio196",
1211	"gpio197", "gpio198", "gpio202", "gpio219", "gpio220", "gpio221",
1212	"gpio222", "gpio223", "gpio224", "gpio225", "gpio226", "gpio227",
1213};
1214
1215static const char * const pll_bist_groups[] = {
1216	"gpio84",
1217};
1218
1219static const char * const pll_clk_groups[] = {
1220	"gpio84", "gpio86",
1221};
1222
1223static const char * const prng_rosc0_groups[] = {
1224	"gpio189",
1225};
1226
1227static const char * const prng_rosc1_groups[] = {
1228	"gpio191",
1229};
1230
1231static const char * const prng_rosc2_groups[] = {
1232	"gpio193",
1233};
1234
1235static const char * const prng_rosc3_groups[] = {
1236	"gpio194",
1237};
1238
1239static const char * const qdss_cti_groups[] = {
1240	"gpio3", "gpio4", "gpio7", "gpio21", "gpio30", "gpio30", "gpio31",
1241	"gpio31",
1242};
1243
1244static const char * const qdss_gpio_groups[] = {
1245	"gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio16",
1246	"gpio17", "gpio80", "gpio96", "gpio115", "gpio116", "gpio117",
1247	"gpio118", "gpio119", "gpio120", "gpio121", "gpio122", "gpio161",
1248	"gpio162", "gpio195", "gpio196", "gpio197", "gpio198", "gpio201",
1249	"gpio202", "gpio206", "gpio207", "gpio212", "gpio213", "gpio214",
1250	"gpio215", "gpio216", "gpio217", "gpio222", "gpio223",
1251};
1252
1253static const char * const qspi_clk_groups[] = {
1254	"gpio74",
1255};
1256
1257static const char * const qspi_cs_groups[] = {
1258	"gpio75", "gpio81",
1259};
1260
1261static const char * const qspi_groups[] = {
1262	"gpio76", "gpio78", "gpio79",
1263};
1264
1265static const char * const qup0_groups[] = {
1266	"gpio135", "gpio136", "gpio137", "gpio138",
1267};
1268
1269static const char * const qup10_groups[] = {
1270	"gpio22", "gpio23", "gpio24", "gpio25",
1271};
1272
1273static const char * const qup11_groups[] = {
1274	"gpio18", "gpio19", "gpio20", "gpio21",
1275};
1276
1277static const char * const qup12_groups[] = {
1278	"gpio0", "gpio1", "gpio2", "gpio3",
1279};
1280
1281static const char * const qup13_groups[] = {
1282	"gpio26", "gpio27", "gpio28", "gpio29",
1283};
1284
1285static const char * const qup14_groups[] = {
1286	"gpio4", "gpio5", "gpio6", "gpio7",
1287};
1288
1289static const char * const qup15_groups[] = {
1290	"gpio36", "gpio37", "gpio38", "gpio39",
1291};
1292
1293static const char * const qup16_groups[] = {
1294	"gpio70", "gpio71", "gpio72", "gpio73",
1295};
1296
1297static const char * const qup17_groups[] = {
1298	"gpio61", "gpio62", "gpio63", "gpio64",
1299};
1300
1301static const char * const qup18_groups[] = {
1302	"gpio66", "gpio67", "gpio68", "gpio69",
1303};
1304
1305static const char * const qup19_groups[] = {
1306	"gpio55", "gpio56", "gpio57", "gpio58",
1307};
1308
1309static const char * const qup1_groups[] = {
1310	"gpio158", "gpio159", "gpio160", "gpio161",
1311};
1312
1313static const char * const qup20_groups[] = {
1314	"gpio87", "gpio88", "gpio89", "gpio90", "gpio91", "gpio92", "gpio110",
1315};
1316
1317static const char * const qup21_groups[] = {
1318	"gpio81", "gpio82", "gpio83", "gpio84",
1319};
1320
1321static const char * const qup22_groups[] = {
1322	"gpio83", "gpio84", "gpio85", "gpio86",
1323};
1324
1325static const char * const qup23_groups[] = {
1326	"gpio59", "gpio60", "gpio61", "gpio62",
1327};
1328
1329static const char * const qup2_groups[] = {
1330	"gpio121", "gpio122", "gpio123", "gpio124",
1331};
1332
1333static const char * const qup3_groups[] = {
1334	"gpio135", "gpio136", "gpio137", "gpio138",
1335};
1336
1337static const char * const qup4_groups[] = {
1338	"gpio111", "gpio112", "gpio171", "gpio172", "gpio173", "gpio174",
1339	"gpio175",
1340};
1341
1342static const char * const qup5_groups[] = {
1343	"gpio111", "gpio112", "gpio145", "gpio146",
1344};
1345
1346static const char * const qup6_groups[] = {
1347	"gpio154", "gpio155", "gpio156", "gpio157",
1348};
1349
1350static const char * const qup7_groups[] = {
1351	"gpio125", "gpio126", "gpio128", "gpio129",
1352};
1353
1354static const char * const qup8_groups[] = {
1355	"gpio43", "gpio44", "gpio45", "gpio46",
1356};
1357
1358static const char * const qup9_groups[] = {
1359	"gpio41", "gpio42", "gpio43", "gpio44",
1360};
1361
1362static const char * const rgmii_0_groups[] = {
1363	"gpio175", "gpio176", "gpio177", "gpio178", "gpio179", "gpio180",
1364	"gpio181", "gpio182", "gpio183", "gpio184", "gpio185", "gpio186",
1365	"gpio187", "gpio188",
1366};
1367
1368static const char * const rgmii_1_groups[] = {
1369	"gpio97", "gpio98", "gpio99", "gpio100", "gpio101", "gpio102",
1370	"gpio103", "gpio104", "gpio105", "gpio106", "gpio107", "gpio108",
1371	"gpio109", "gpio110",
1372};
1373
1374static const char * const sd_write_groups[] = {
1375	"gpio130",
1376};
1377
1378static const char * const sdc40_groups[] = {
1379	"gpio76",
1380};
1381
1382static const char * const sdc42_groups[] = {
1383	"gpio78",
1384};
1385
1386static const char * const sdc43_groups[] = {
1387	"gpio79",
1388};
1389
1390static const char * const sdc4_clk_groups[] = {
1391	"gpio74",
1392};
1393
1394static const char * const sdc4_cmd_groups[] = {
1395	"gpio75",
1396};
1397
1398static const char * const tb_trig_groups[] = {
1399	"gpio153", "gpio157",
1400};
1401
1402static const char * const tgu_groups[] = {
1403	"gpio101", "gpio102", "gpio103", "gpio104", "gpio105", "gpio106",
1404	"gpio107", "gpio108",
1405};
1406
1407static const char * const tsense_pwm1_groups[] = {
1408	"gpio70",
1409};
1410
1411static const char * const tsense_pwm2_groups[] = {
1412	"gpio69",
1413};
1414
1415static const char * const tsense_pwm3_groups[] = {
1416	"gpio67",
1417};
1418
1419static const char * const tsense_pwm4_groups[] = {
1420	"gpio65",
1421};
1422
1423static const char * const usb0_dp_groups[] = {
1424	"gpio21",
1425};
1426
1427static const char * const usb0_phy_groups[] = {
1428	"gpio166",
1429};
1430
1431static const char * const usb0_sbrx_groups[] = {
1432	"gpio170",
1433};
1434
1435static const char * const usb0_sbtx_groups[] = {
1436	"gpio168", "gpio169",
1437};
1438
1439static const char * const usb0_usb4_groups[] = {
1440	"gpio132",
1441};
1442
1443static const char * const usb1_dp_groups[] = {
1444	"gpio9",
1445};
1446
1447static const char * const usb1_phy_groups[] = {
1448	"gpio49",
1449};
1450
1451static const char * const usb1_sbrx_groups[] = {
1452	"gpio53",
1453};
1454
1455static const char * const usb1_sbtx_groups[] = {
1456	"gpio51", "gpio52",
1457};
1458
1459static const char * const usb1_usb4_groups[] = {
1460	"gpio32",
1461};
1462
1463static const char * const usb2phy_ac_groups[] = {
1464	"gpio24", "gpio25", "gpio133", "gpio134", "gpio148", "gpio149",
1465};
1466
1467static const char * const vsense_trigger_groups[] = {
1468	"gpio81",
1469};
1470
1471static const struct pinfunction sc8280xp_functions[] = {
1472	MSM_PIN_FUNCTION(atest_char),
1473	MSM_PIN_FUNCTION(atest_usb),
1474	MSM_PIN_FUNCTION(audio_ref),
1475	MSM_PIN_FUNCTION(cam_mclk),
1476	MSM_PIN_FUNCTION(cci_async),
1477	MSM_PIN_FUNCTION(cci_i2c),
1478	MSM_PIN_FUNCTION(cci_timer0),
1479	MSM_PIN_FUNCTION(cci_timer1),
1480	MSM_PIN_FUNCTION(cci_timer2),
1481	MSM_PIN_FUNCTION(cci_timer3),
1482	MSM_PIN_FUNCTION(cci_timer4),
1483	MSM_PIN_FUNCTION(cci_timer5),
1484	MSM_PIN_FUNCTION(cci_timer6),
1485	MSM_PIN_FUNCTION(cci_timer7),
1486	MSM_PIN_FUNCTION(cci_timer8),
1487	MSM_PIN_FUNCTION(cci_timer9),
1488	MSM_PIN_FUNCTION(cmu_rng),
1489	MSM_PIN_FUNCTION(cri_trng),
1490	MSM_PIN_FUNCTION(cri_trng0),
1491	MSM_PIN_FUNCTION(cri_trng1),
1492	MSM_PIN_FUNCTION(dbg_out),
1493	MSM_PIN_FUNCTION(ddr_bist),
1494	MSM_PIN_FUNCTION(ddr_pxi0),
1495	MSM_PIN_FUNCTION(ddr_pxi1),
1496	MSM_PIN_FUNCTION(ddr_pxi2),
1497	MSM_PIN_FUNCTION(ddr_pxi3),
1498	MSM_PIN_FUNCTION(ddr_pxi4),
1499	MSM_PIN_FUNCTION(ddr_pxi5),
1500	MSM_PIN_FUNCTION(ddr_pxi6),
1501	MSM_PIN_FUNCTION(ddr_pxi7),
1502	MSM_PIN_FUNCTION(dp2_hot),
1503	MSM_PIN_FUNCTION(dp3_hot),
1504	MSM_PIN_FUNCTION(edp0_lcd),
1505	MSM_PIN_FUNCTION(edp1_lcd),
1506	MSM_PIN_FUNCTION(edp2_lcd),
1507	MSM_PIN_FUNCTION(edp3_lcd),
1508	MSM_PIN_FUNCTION(edp_hot),
1509	MSM_PIN_FUNCTION(egpio),
1510	MSM_PIN_FUNCTION(emac0_dll),
1511	MSM_PIN_FUNCTION(emac0_mcg0),
1512	MSM_PIN_FUNCTION(emac0_mcg1),
1513	MSM_PIN_FUNCTION(emac0_mcg2),
1514	MSM_PIN_FUNCTION(emac0_mcg3),
1515	MSM_PIN_FUNCTION(emac0_phy),
1516	MSM_PIN_FUNCTION(emac0_ptp),
1517	MSM_PIN_FUNCTION(emac1_dll0),
1518	MSM_PIN_FUNCTION(emac1_dll1),
1519	MSM_PIN_FUNCTION(emac1_mcg0),
1520	MSM_PIN_FUNCTION(emac1_mcg1),
1521	MSM_PIN_FUNCTION(emac1_mcg2),
1522	MSM_PIN_FUNCTION(emac1_mcg3),
1523	MSM_PIN_FUNCTION(emac1_phy),
1524	MSM_PIN_FUNCTION(emac1_ptp),
1525	MSM_PIN_FUNCTION(gcc_gp1),
1526	MSM_PIN_FUNCTION(gcc_gp2),
1527	MSM_PIN_FUNCTION(gcc_gp3),
1528	MSM_PIN_FUNCTION(gcc_gp4),
1529	MSM_PIN_FUNCTION(gcc_gp5),
1530	MSM_PIN_FUNCTION(gpio),
1531	MSM_PIN_FUNCTION(hs1_mi2s),
1532	MSM_PIN_FUNCTION(hs2_mi2s),
1533	MSM_PIN_FUNCTION(hs3_mi2s),
1534	MSM_PIN_FUNCTION(ibi_i3c),
1535	MSM_PIN_FUNCTION(jitter_bist),
1536	MSM_PIN_FUNCTION(lpass_slimbus),
1537	MSM_PIN_FUNCTION(mdp0_vsync0),
1538	MSM_PIN_FUNCTION(mdp0_vsync1),
1539	MSM_PIN_FUNCTION(mdp0_vsync2),
1540	MSM_PIN_FUNCTION(mdp0_vsync3),
1541	MSM_PIN_FUNCTION(mdp0_vsync4),
1542	MSM_PIN_FUNCTION(mdp0_vsync5),
1543	MSM_PIN_FUNCTION(mdp0_vsync6),
1544	MSM_PIN_FUNCTION(mdp0_vsync7),
1545	MSM_PIN_FUNCTION(mdp0_vsync8),
1546	MSM_PIN_FUNCTION(mdp1_vsync0),
1547	MSM_PIN_FUNCTION(mdp1_vsync1),
1548	MSM_PIN_FUNCTION(mdp1_vsync2),
1549	MSM_PIN_FUNCTION(mdp1_vsync3),
1550	MSM_PIN_FUNCTION(mdp1_vsync4),
1551	MSM_PIN_FUNCTION(mdp1_vsync5),
1552	MSM_PIN_FUNCTION(mdp1_vsync6),
1553	MSM_PIN_FUNCTION(mdp1_vsync7),
1554	MSM_PIN_FUNCTION(mdp1_vsync8),
1555	MSM_PIN_FUNCTION(mdp_vsync),
1556	MSM_PIN_FUNCTION(mi2s0_data0),
1557	MSM_PIN_FUNCTION(mi2s0_data1),
1558	MSM_PIN_FUNCTION(mi2s0_sck),
1559	MSM_PIN_FUNCTION(mi2s0_ws),
1560	MSM_PIN_FUNCTION(mi2s1_data0),
1561	MSM_PIN_FUNCTION(mi2s1_data1),
1562	MSM_PIN_FUNCTION(mi2s1_sck),
1563	MSM_PIN_FUNCTION(mi2s1_ws),
1564	MSM_PIN_FUNCTION(mi2s2_data0),
1565	MSM_PIN_FUNCTION(mi2s2_data1),
1566	MSM_PIN_FUNCTION(mi2s2_sck),
1567	MSM_PIN_FUNCTION(mi2s2_ws),
1568	MSM_PIN_FUNCTION(mi2s_mclk1),
1569	MSM_PIN_FUNCTION(mi2s_mclk2),
1570	MSM_PIN_FUNCTION(pcie2a_clkreq),
1571	MSM_PIN_FUNCTION(pcie2b_clkreq),
1572	MSM_PIN_FUNCTION(pcie3a_clkreq),
1573	MSM_PIN_FUNCTION(pcie3b_clkreq),
1574	MSM_PIN_FUNCTION(pcie4_clkreq),
1575	MSM_PIN_FUNCTION(phase_flag),
1576	MSM_PIN_FUNCTION(pll_bist),
1577	MSM_PIN_FUNCTION(pll_clk),
1578	MSM_PIN_FUNCTION(prng_rosc0),
1579	MSM_PIN_FUNCTION(prng_rosc1),
1580	MSM_PIN_FUNCTION(prng_rosc2),
1581	MSM_PIN_FUNCTION(prng_rosc3),
1582	MSM_PIN_FUNCTION(qdss_cti),
1583	MSM_PIN_FUNCTION(qdss_gpio),
1584	MSM_PIN_FUNCTION(qspi),
1585	MSM_PIN_FUNCTION(qspi_clk),
1586	MSM_PIN_FUNCTION(qspi_cs),
1587	MSM_PIN_FUNCTION(qup0),
1588	MSM_PIN_FUNCTION(qup1),
1589	MSM_PIN_FUNCTION(qup2),
1590	MSM_PIN_FUNCTION(qup3),
1591	MSM_PIN_FUNCTION(qup4),
1592	MSM_PIN_FUNCTION(qup5),
1593	MSM_PIN_FUNCTION(qup6),
1594	MSM_PIN_FUNCTION(qup7),
1595	MSM_PIN_FUNCTION(qup8),
1596	MSM_PIN_FUNCTION(qup9),
1597	MSM_PIN_FUNCTION(qup10),
1598	MSM_PIN_FUNCTION(qup11),
1599	MSM_PIN_FUNCTION(qup12),
1600	MSM_PIN_FUNCTION(qup13),
1601	MSM_PIN_FUNCTION(qup14),
1602	MSM_PIN_FUNCTION(qup15),
1603	MSM_PIN_FUNCTION(qup16),
1604	MSM_PIN_FUNCTION(qup17),
1605	MSM_PIN_FUNCTION(qup18),
1606	MSM_PIN_FUNCTION(qup19),
1607	MSM_PIN_FUNCTION(qup20),
1608	MSM_PIN_FUNCTION(qup21),
1609	MSM_PIN_FUNCTION(qup22),
1610	MSM_PIN_FUNCTION(qup23),
1611	MSM_PIN_FUNCTION(rgmii_0),
1612	MSM_PIN_FUNCTION(rgmii_1),
1613	MSM_PIN_FUNCTION(sd_write),
1614	MSM_PIN_FUNCTION(sdc40),
1615	MSM_PIN_FUNCTION(sdc42),
1616	MSM_PIN_FUNCTION(sdc43),
1617	MSM_PIN_FUNCTION(sdc4_clk),
1618	MSM_PIN_FUNCTION(sdc4_cmd),
1619	MSM_PIN_FUNCTION(tb_trig),
1620	MSM_PIN_FUNCTION(tgu),
1621	MSM_PIN_FUNCTION(tsense_pwm1),
1622	MSM_PIN_FUNCTION(tsense_pwm2),
1623	MSM_PIN_FUNCTION(tsense_pwm3),
1624	MSM_PIN_FUNCTION(tsense_pwm4),
1625	MSM_PIN_FUNCTION(usb0_dp),
1626	MSM_PIN_FUNCTION(usb0_phy),
1627	MSM_PIN_FUNCTION(usb0_sbrx),
1628	MSM_PIN_FUNCTION(usb0_sbtx),
1629	MSM_PIN_FUNCTION(usb0_usb4),
1630	MSM_PIN_FUNCTION(usb1_dp),
1631	MSM_PIN_FUNCTION(usb1_phy),
1632	MSM_PIN_FUNCTION(usb1_sbrx),
1633	MSM_PIN_FUNCTION(usb1_sbtx),
1634	MSM_PIN_FUNCTION(usb1_usb4),
1635	MSM_PIN_FUNCTION(usb2phy_ac),
1636	MSM_PIN_FUNCTION(vsense_trigger),
1637};
1638
1639static const struct msm_pingroup sc8280xp_groups[] = {
1640	[0] = PINGROUP(0, qup12, _, _, _, _, _, _),
1641	[1] = PINGROUP(1, qup12, mdp0_vsync0, _, _, _, _, _),
1642	[2] = PINGROUP(2, edp_hot, qup12, mdp0_vsync1, _, _, _, _),
1643	[3] = PINGROUP(3, edp_hot, qup12, qdss_cti, _, _, _, _),
1644	[4] = PINGROUP(4, qup14, ibi_i3c, qdss_cti, _, _, _, _),
1645	[5] = PINGROUP(5, qup14, ibi_i3c, _, _, _, _, _),
1646	[6] = PINGROUP(6, edp_hot, qup14, cam_mclk, _, _, _, _),
1647	[7] = PINGROUP(7, edp_hot, qup14, qdss_cti, cam_mclk, _, _, _),
1648	[8] = PINGROUP(8, mdp_vsync, mdp0_vsync2, _, _, _, _, _),
1649	[9] = PINGROUP(9, usb1_dp, mdp0_vsync3, _, _, _, _, _),
1650	[10] = PINGROUP(10, cci_i2c, mdp0_vsync4, _, qdss_gpio, _, _, _),
1651	[11] = PINGROUP(11, cci_i2c, mdp0_vsync5, _, qdss_gpio, _, _, _),
1652	[12] = PINGROUP(12, cci_i2c, mdp0_vsync6, _, qdss_gpio, _, _, _),
1653	[13] = PINGROUP(13, cci_i2c, mdp0_vsync7, _, qdss_gpio, _, _, _),
1654	[14] = PINGROUP(14, cci_timer2, qdss_gpio, _, _, _, _, _),
1655	[15] = PINGROUP(15, cci_timer3, cci_async, _, qdss_gpio, _, _, _),
1656	[16] = PINGROUP(16, cam_mclk, mdp0_vsync8, _, qdss_gpio, _, _, _),
1657	[17] = PINGROUP(17, cam_mclk, mdp1_vsync0, _, qdss_gpio, _, _, _),
1658	[18] = PINGROUP(18, qup11, mdp1_vsync1, _, _, _, _, _),
1659	[19] = PINGROUP(19, qup11, mdp1_vsync2, _, _, _, _, _),
1660	[20] = PINGROUP(20, qup11, dp2_hot, mdp1_vsync3, _, _, _, _),
1661	[21] = PINGROUP(21, qup11, usb0_dp, qdss_cti, _, _, _, _),
1662	[22] = PINGROUP(22, qup10, _, _, _, _, _, _),
1663	[23] = PINGROUP(23, qup10, _, _, _, _, _, _),
1664	[24] = PINGROUP(24, qup10, usb2phy_ac, _, _, _, _, _),
1665	[25] = PINGROUP(25, qup10, usb2phy_ac, _, _, _, _, _),
1666	[26] = PINGROUP(26, qup13, edp0_lcd, _, _, _, _, _),
1667	[27] = PINGROUP(27, qup13, edp1_lcd, _, _, _, _, _),
1668	[28] = PINGROUP(28, qup13, edp2_lcd, _, _, _, _, _),
1669	[29] = PINGROUP(29, qup13, edp3_lcd, _, _, _, _, _),
1670	[30] = PINGROUP(30, qdss_cti, qdss_cti, _, _, _, _, _),
1671	[31] = PINGROUP(31, qdss_cti, qdss_cti, _, _, _, _, _),
1672	[32] = PINGROUP(32, usb1_usb4, _, _, _, _, _, _),
1673	[33] = PINGROUP(33, cam_mclk, _, _, _, _, _, _),
1674	[34] = PINGROUP(34, cam_mclk, _, _, _, _, _, _),
1675	[35] = PINGROUP(35, _, _, _, _, _, _, _),
1676	[36] = PINGROUP(36, qup15, ibi_i3c, mdp1_vsync4, _, _, _, _),
1677	[37] = PINGROUP(37, qup15, ibi_i3c, mdp1_vsync5, _, _, _, _),
1678	[38] = PINGROUP(38, qup15, mdp1_vsync6, _, _, _, _, _),
1679	[39] = PINGROUP(39, qup15, mdp1_vsync7, _, _, _, _, _),
1680	[40] = PINGROUP(40, mdp1_vsync8, _, _, _, _, _, _),
1681	[41] = PINGROUP(41, qup9, _, _, _, _, _, _),
1682	[42] = PINGROUP(42, qup9, ddr_bist, _, _, _, _, _),
1683	[43] = PINGROUP(43, qup8, qup9, _, _, _, _, _),
1684	[44] = PINGROUP(44, qup8, qup9, _, _, _, _, _),
1685	[45] = PINGROUP(45, qup8, dp3_hot, ddr_bist, _, _, _, _),
1686	[46] = PINGROUP(46, qup8, ddr_bist, _, _, _, _, _),
1687	[47] = PINGROUP(47, ddr_bist, _, _, _, _, _, _),
1688	[48] = PINGROUP(48, _, _, _, _, _, _, _),
1689	[49] = PINGROUP(49, usb1_phy, _, _, _, _, _, _),
1690	[50] = PINGROUP(50, _, _, _, _, _, _, _),
1691	[51] = PINGROUP(51, usb1_sbtx, _, _, _, _, _, _),
1692	[52] = PINGROUP(52, usb1_sbtx, _, _, _, _, _, _),
1693	[53] = PINGROUP(53, usb1_sbrx, _, _, _, _, _, _),
1694	[54] = PINGROUP(54, emac1_phy, _, _, _, _, _, _),
1695	[55] = PINGROUP(55, emac1_ptp, emac1_ptp, qup19, _, _, _, _),
1696	[56] = PINGROUP(56, emac1_ptp, emac1_ptp, qup19, _, _, _, _),
1697	[57] = PINGROUP(57, qup19, emac1_mcg0, _, _, _, _, _),
1698	[58] = PINGROUP(58, qup19, emac1_mcg1, _, _, _, _, _),
1699	[59] = PINGROUP(59, qup23, _, _, _, _, _, _),
1700	[60] = PINGROUP(60, qup23, _, _, _, _, _, _),
1701	[61] = PINGROUP(61, qup23, qup17, _, _, _, _, _),
1702	[62] = PINGROUP(62, qup23, qup17, _, _, _, _, _),
1703	[63] = PINGROUP(63, qup17, _, _, _, _, _, _),
1704	[64] = PINGROUP(64, qup17, _, _, _, _, _, _),
1705	[65] = PINGROUP(65, tsense_pwm4, _, _, _, _, _, _),
1706	[66] = PINGROUP(66, qup18, _, _, _, _, _, _),
1707	[67] = PINGROUP(67, qup18, tsense_pwm3, _, _, _, _, _),
1708	[68] = PINGROUP(68, qup18, emac1_mcg2, _, _, _, _, _),
1709	[69] = PINGROUP(69, qup18, emac1_mcg3, tsense_pwm2, _, _, _, _),
1710	[70] = PINGROUP(70, qup16, tsense_pwm1, _, _, _, _, _),
1711	[71] = PINGROUP(71, qup16, atest_usb, _, _, _, _, _),
1712	[72] = PINGROUP(72, qup16, atest_usb, _, _, _, _, _),
1713	[73] = PINGROUP(73, qup16, atest_usb, _, _, _, _, _),
1714	[74] = PINGROUP(74, qspi_clk, sdc4_clk, atest_usb, _, _, _, _),
1715	[75] = PINGROUP(75, qspi_cs, sdc4_cmd, atest_usb, _, _, _, _),
1716	[76] = PINGROUP(76, qspi, sdc40, atest_usb, _, _, _, _),
1717	[77] = PINGROUP(77, _, _, _, _, _, _, _),
1718	[78] = PINGROUP(78, qspi, sdc42, atest_usb, _, _, _, _),
1719	[79] = PINGROUP(79, qspi, sdc43, atest_usb, ddr_pxi6, _, _, _),
1720	[80] = PINGROUP(80, mi2s_mclk1, audio_ref, phase_flag, _, qdss_gpio, _, _),
1721	[81] = PINGROUP(81, qup21, qspi_cs, phase_flag, _, vsense_trigger, _, _),
1722	[82] = PINGROUP(82, qup21, phase_flag, _, _, _, _, _),
1723	[83] = PINGROUP(83, qup21, qup22, phase_flag, _, _, _, _),
1724	[84] = PINGROUP(84, qup21, qup22, pll_bist, pll_clk, _, _, _),
1725	[85] = PINGROUP(85, qup22, _, _, _, _, _, _),
1726	[86] = PINGROUP(86, qup22, _, pll_clk, _, _, _, _),
1727	[87] = PINGROUP(87, qup20, phase_flag, _, _, _, _, _),
1728	[88] = PINGROUP(88, qup20, phase_flag, _, _, _, _, _),
1729	[89] = PINGROUP(89, qup20, phase_flag, _, _, _, _, _),
1730	[90] = PINGROUP(90, qup20, phase_flag, _, _, _, _, _),
1731	[91] = PINGROUP(91, qup20, hs2_mi2s, phase_flag, _, _, _, _),
1732	[92] = PINGROUP(92, qup20, hs2_mi2s, phase_flag, _, _, _, _),
1733	[93] = PINGROUP(93, mi2s0_sck, emac1_ptp, emac1_ptp, phase_flag, _, _, _),
1734	[94] = PINGROUP(94, mi2s0_ws, emac1_ptp, emac1_ptp, phase_flag, _, _, _),
1735	[95] = PINGROUP(95, mi2s0_data0, emac1_ptp, emac1_ptp, phase_flag, _, _, _),
1736	[96] = PINGROUP(96, mi2s0_data1, emac1_ptp, emac1_ptp, qdss_gpio, _, _, _),
1737	[97] = PINGROUP(97, rgmii_1, atest_usb, _, _, _, _, _),
1738	[98] = PINGROUP(98, rgmii_1, atest_usb, _, _, _, _, _),
1739	[99] = PINGROUP(99, rgmii_1, _, _, _, _, _, _),
1740	[100] = PINGROUP(100, mdp_vsync, rgmii_1, _, _, _, _, _),
1741	[101] = PINGROUP(101, mdp_vsync, rgmii_1, tgu, atest_usb, _, _, _),
1742	[102] = PINGROUP(102, rgmii_1, tgu, atest_usb, _, _, _, _),
1743	[103] = PINGROUP(103, rgmii_1, tgu, atest_usb, _, _, _, _),
1744	[104] = PINGROUP(104, rgmii_1, tgu, atest_usb, _, _, _, _),
1745	[105] = PINGROUP(105, rgmii_1, tgu, atest_usb, _, _, _, _),
1746	[106] = PINGROUP(106, rgmii_1, tgu, _, _, _, _, _),
1747	[107] = PINGROUP(107, rgmii_1, tgu, _, _, _, _, _),
1748	[108] = PINGROUP(108, rgmii_1, tgu, _, _, _, _, _),
1749	[109] = PINGROUP(109, rgmii_1, _, _, _, _, _, _),
1750	[110] = PINGROUP(110, qup20, rgmii_1, atest_usb, _, _, _, _),
1751	[111] = PINGROUP(111, qup4, qup5, atest_usb, _, _, _, _),
1752	[112] = PINGROUP(112, qup4, qup5, atest_usb, _, _, _, _),
1753	[113] = PINGROUP(113, cci_i2c, atest_usb, _, _, _, _, _),
1754	[114] = PINGROUP(114, cci_i2c, gcc_gp2, atest_usb, _, _, _, _),
1755	[115] = PINGROUP(115, cci_i2c, gcc_gp3, qdss_gpio, _, _, _, _),
1756	[116] = PINGROUP(116, cci_i2c, qdss_gpio, _, _, _, _, _),
1757	[117] = PINGROUP(117, cci_i2c, _, qdss_gpio, _, _, _, _),
1758	[118] = PINGROUP(118, cci_i2c, _, qdss_gpio, _, _, _, _),
1759	[119] = PINGROUP(119, cam_mclk, cci_timer0, cci_async, gcc_gp1, qdss_gpio, _, _),
1760	[120] = PINGROUP(120, cam_mclk, cci_timer1, cci_async, gcc_gp2, qdss_gpio, ddr_pxi3, _),
1761	[121] = PINGROUP(121, qup2, qdss_gpio, _, atest_usb, ddr_pxi0, _, _),
1762	[122] = PINGROUP(122, qup2, qdss_gpio, atest_usb, _, _, _, _),
1763	[123] = PINGROUP(123, qup2, cci_i2c, cmu_rng, ddr_pxi2, _, _, _),
1764	[124] = PINGROUP(124, qup2, cci_i2c, cmu_rng, ddr_pxi1, _, _, _),
1765	[125] = PINGROUP(125, qup7, dbg_out, ddr_pxi1, _, _, _, _),
1766	[126] = PINGROUP(126, qup7, cmu_rng, ddr_pxi0, _, _, _, _),
1767	[127] = PINGROUP(127, emac0_phy, _, _, _, _, _, _),
1768	[128] = PINGROUP(128, qup7, ibi_i3c, _, _, _, _, _),
1769	[129] = PINGROUP(129, qup7, ibi_i3c, _, _, _, _, _),
1770	[130] = PINGROUP(130, emac0_ptp, emac0_ptp, sd_write, atest_usb, _, _, _),
1771	[131] = PINGROUP(131, emac0_ptp, emac0_ptp, atest_usb, _, _, _, _),
1772	[132] = PINGROUP(132, usb0_usb4, phase_flag, _, _, _, _, _),
1773	[133] = PINGROUP(133, usb2phy_ac, _, _, _, _, _, _),
1774	[134] = PINGROUP(134, usb2phy_ac, atest_char, _, _, _, _, _),
1775	[135] = PINGROUP(135, qup0, qup3, _, atest_usb, ddr_pxi7, _, _),
1776	[136] = PINGROUP(136, qup0, qup3, cmu_rng, ddr_pxi7, _, _, _),
1777	[137] = PINGROUP(137, qup3, qup0, _, atest_usb, ddr_pxi3, _, _),
1778	[138] = PINGROUP(138, qup3, qup0, _, atest_usb, ddr_pxi2, _, _),
1779	[139] = PINGROUP(139, cci_timer5, gcc_gp3, atest_char, _, _, _, _),
1780	[140] = PINGROUP(140, pcie4_clkreq, jitter_bist, atest_char, _, _, _, _),
1781	[141] = PINGROUP(141, _, _, _, _, _, _, _),
1782	[142] = PINGROUP(142, pcie2a_clkreq, atest_char, _, _, _, _, _),
1783	[143] = PINGROUP(143, _, atest_char, _, _, _, _, _),
1784	[144] = PINGROUP(144, pcie2b_clkreq, phase_flag, _, _, _, _, _),
1785	[145] = PINGROUP(145, qup5, cci_i2c, phase_flag, _, _, _, _),
1786	[146] = PINGROUP(146, qup5, cci_i2c, phase_flag, _, _, _, _),
1787	[147] = PINGROUP(147, _, phase_flag, _, _, _, _, _),
1788	[148] = PINGROUP(148, usb2phy_ac, _, atest_usb, _, _, _, _),
1789	[149] = PINGROUP(149, usb2phy_ac, gcc_gp1, atest_usb, _, _, _, _),
1790	[150] = PINGROUP(150, pcie3a_clkreq, _, _, _, _, _, _),
1791	[151] = PINGROUP(151, _, _, _, _, _, _, _),
1792	[152] = PINGROUP(152, pcie3b_clkreq, _, _, _, _, _, _),
1793	[153] = PINGROUP(153, _, tb_trig, _, _, _, _, _),
1794	[154] = PINGROUP(154, qup6, ibi_i3c, _, _, _, _, _),
1795	[155] = PINGROUP(155, qup6, ibi_i3c, _, _, _, _, _),
1796	[156] = PINGROUP(156, qup6, emac0_ptp, emac0_ptp, _, _, _, _),
1797	[157] = PINGROUP(157, qup6, emac0_ptp, emac0_ptp, tb_trig, _, _, _),
1798	[158] = PINGROUP(158, qup1, emac0_ptp, emac0_ptp, _, _, _, _),
1799	[159] = PINGROUP(159, qup1, emac0_ptp, emac0_ptp, _, _, _, _),
1800	[160] = PINGROUP(160, cci_timer9, qup1, cci_async, emac0_mcg0, gcc_gp4, _, _),
1801	[161] = PINGROUP(161, cci_timer4, cci_async, qup1, emac0_mcg1, qdss_gpio, _, _),
1802	[162] = PINGROUP(162, cci_timer6, emac0_mcg2, gcc_gp4, qdss_gpio, _, _, _),
1803	[163] = PINGROUP(163, cci_timer7, emac0_mcg3, _, _, _, _, _),
1804	[164] = PINGROUP(164, cci_i2c, _, _, _, _, _, _),
1805	[165] = PINGROUP(165, cci_i2c, _, _, _, _, _, _),
1806	[166] = PINGROUP(166, usb0_phy, _, _, _, _, _, _),
1807	[167] = PINGROUP(167, cci_timer8, cci_async, gcc_gp5, _, _, _, _),
1808	[168] = PINGROUP(168, usb0_sbtx, gcc_gp5, _, _, _, _, _),
1809	[169] = PINGROUP(169, usb0_sbtx, _, _, _, _, _, _),
1810	[170] = PINGROUP(170, usb0_sbrx, _, _, _, _, _, _),
1811	[171] = PINGROUP(171, qup4, _, _, _, _, _, _),
1812	[172] = PINGROUP(172, qup4, _, _, _, _, _, _),
1813	[173] = PINGROUP(173, qup4, _, _, _, _, _, _),
1814	[174] = PINGROUP(174, qup4, _, _, _, _, _, _),
1815	[175] = PINGROUP(175, qup4, rgmii_0, _, _, _, _, _),
1816	[176] = PINGROUP(176, rgmii_0, _, _, _, _, _, _),
1817	[177] = PINGROUP(177, rgmii_0, _, _, _, _, _, _),
1818	[178] = PINGROUP(178, rgmii_0, _, _, _, _, _, _),
1819	[179] = PINGROUP(179, rgmii_0, _, _, _, _, _, _),
1820	[180] = PINGROUP(180, rgmii_0, _, _, _, _, _, _),
1821	[181] = PINGROUP(181, rgmii_0, _, _, _, _, _, _),
1822	[182] = PINGROUP(182, rgmii_0, _, _, _, _, _, _),
1823	[183] = PINGROUP(183, rgmii_0, _, _, _, _, _, _),
1824	[184] = PINGROUP(184, rgmii_0, _, _, _, _, _, _),
1825	[185] = PINGROUP(185, rgmii_0, _, _, _, _, _, _),
1826	[186] = PINGROUP(186, rgmii_0, _, _, _, _, _, _),
1827	[187] = PINGROUP(187, rgmii_0, cri_trng0, _, _, _, _, _),
1828	[188] = PINGROUP(188, rgmii_0, cri_trng1, _, _, _, _, _),
1829	[189] = PINGROUP(189, prng_rosc0, _, _, _, _, _, egpio),
1830	[190] = PINGROUP(190, cri_trng, _, _, _, _, _, egpio),
1831	[191] = PINGROUP(191, prng_rosc1, _, _, _, _, _, egpio),
1832	[192] = PINGROUP(192, _, _, _, _, _, _, egpio),
1833	[193] = PINGROUP(193, prng_rosc2, _, _, _, _, _, egpio),
1834	[194] = PINGROUP(194, prng_rosc3, _, _, _, _, _, egpio),
1835	[195] = PINGROUP(195, phase_flag, _, qdss_gpio, _, _, _, egpio),
1836	[196] = PINGROUP(196, phase_flag, _, qdss_gpio, _, _, _, egpio),
1837	[197] = PINGROUP(197, phase_flag, _, qdss_gpio, _, _, _, egpio),
1838	[198] = PINGROUP(198, phase_flag, _, qdss_gpio, _, _, _, egpio),
1839	[199] = PINGROUP(199, _, _, _, _, _, _, egpio),
1840	[200] = PINGROUP(200, _, _, _, _, _, _, egpio),
1841	[201] = PINGROUP(201, qdss_gpio, _, _, _, _, _, egpio),
1842	[202] = PINGROUP(202, phase_flag, _, qdss_gpio, _, _, _, egpio),
1843	[203] = PINGROUP(203, _, _, _, _, _, _, egpio),
1844	[204] = PINGROUP(204, _, _, _, _, _, _, egpio),
1845	[205] = PINGROUP(205, _, _, _, _, _, _, egpio),
1846	[206] = PINGROUP(206, qdss_gpio, _, _, _, _, _, egpio),
1847	[207] = PINGROUP(207, qdss_gpio, _, _, _, _, _, egpio),
1848	[208] = PINGROUP(208, hs1_mi2s, _, _, _, _, _, egpio),
1849	[209] = PINGROUP(209, hs1_mi2s, _, _, _, _, _, egpio),
1850	[210] = PINGROUP(210, hs1_mi2s, _, _, _, _, _, egpio),
1851	[211] = PINGROUP(211, hs1_mi2s, _, _, _, _, _, egpio),
1852	[212] = PINGROUP(212, mi2s2_sck, qdss_gpio, _, _, _, _, egpio),
1853	[213] = PINGROUP(213, mi2s2_ws, qdss_gpio, _, _, _, _, egpio),
1854	[214] = PINGROUP(214, mi2s2_data0, qdss_gpio, ddr_pxi5, _, _, _, egpio),
1855	[215] = PINGROUP(215, mi2s2_data1, qdss_gpio, emac1_dll0, ddr_pxi5, _, _, egpio),
1856	[216] = PINGROUP(216, mi2s_mclk1, qdss_gpio, emac0_dll, ddr_pxi4, _, _, egpio),
1857	[217] = PINGROUP(217, mi2s_mclk2, qdss_gpio, emac0_dll, ddr_pxi4, _, _, egpio),
1858	[218] = PINGROUP(218, hs2_mi2s, emac1_dll1, ddr_pxi6, _, _, _, egpio),
1859	[219] = PINGROUP(219, hs2_mi2s, phase_flag, _, _, _, _, egpio),
1860	[220] = PINGROUP(220, lpass_slimbus, mi2s1_sck, phase_flag, _, _, _, egpio),
1861	[221] = PINGROUP(221, lpass_slimbus, mi2s1_ws, phase_flag, _, _, _, egpio),
1862	[222] = PINGROUP(222, mi2s1_data0, phase_flag, _, qdss_gpio, _, _, egpio),
1863	[223] = PINGROUP(223, mi2s1_data1, phase_flag, _, qdss_gpio, _, _, egpio),
1864	[224] = PINGROUP(224, hs3_mi2s, phase_flag, _, _, _, _, egpio),
1865	[225] = PINGROUP(225, hs3_mi2s, phase_flag, _, _, _, _, egpio),
1866	[226] = PINGROUP(226, hs3_mi2s, phase_flag, _, _, _, _, egpio),
1867	[227] = PINGROUP(227, hs3_mi2s, phase_flag, _, _, _, _, egpio),
1868	[228] = UFS_RESET(ufs_reset, 0xf1000),
1869	[229] = UFS_RESET(ufs1_reset, 0xf3000),
1870	[230] = SDC_QDSD_PINGROUP(sdc2_clk, 0xe8000, 14, 6),
1871	[231] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xe8000, 11, 3),
1872	[232] = SDC_QDSD_PINGROUP(sdc2_data, 0xe8000, 9, 0),
1873};
1874
1875static const struct msm_gpio_wakeirq_map sc8280xp_pdc_map[] = {
1876	{ 3, 245 }, { 4, 263 }, { 7, 254 }, { 21, 220 }, { 25, 244 },
1877	{ 26, 211 }, { 27, 172 }, { 29, 203 }, { 30, 169 }, { 31, 180 },
1878	{ 32, 181 }, { 33, 182 }, { 36, 206 }, { 39, 246 }, { 40, 183 },
1879	{ 42, 179 }, { 46, 247 }, { 53, 248 }, { 54, 190 }, { 55, 249 },
1880	{ 56, 250 }, { 58, 251 }, { 59, 207 }, { 62, 252 }, { 63, 191 },
1881	{ 64, 192 }, { 65, 193 }, { 69, 253 }, { 73, 255 }, { 84, 256 },
1882	{ 85, 208 }, { 90, 257 }, { 102, 214 }, { 103, 215 }, { 104, 216 },
1883	{ 107, 217 }, { 110, 218 }, { 124, 224 }, { 125, 189 },
1884	{ 126, 200 }, { 127, 225 }, { 128, 262 }, { 129, 201 },
1885	{ 130, 209 }, { 131, 173 }, { 132, 202 }, { 136, 210 },
1886	{ 138, 171 }, { 139, 226 }, { 140, 227 }, { 142, 228 },
1887	{ 144, 229 }, { 145, 230 }, { 146, 231 }, { 148, 232 },
1888	{ 149, 233 }, { 150, 234 }, { 152, 235 }, { 154, 212 },
1889	{ 157, 213 }, { 161, 219 }, { 170, 236 }, { 171, 221 },
1890	{ 174, 222 }, { 175, 237 }, { 176, 223 }, { 177, 170 },
1891	{ 180, 238 }, { 181, 239 }, { 182, 240 }, { 183, 241 },
1892	{ 184, 242 }, { 185, 243 }, { 190, 178 }, { 193, 184 },
1893	{ 196, 185 }, { 198, 186 }, { 200, 174 }, { 201, 175 },
1894	{ 205, 176 }, { 206, 177 }, { 208, 187 }, { 210, 198 },
1895	{ 211, 199 }, { 212, 204 }, { 215, 205 }, { 220, 188 },
1896	{ 221, 194 }, { 223, 195 }, { 225, 196 }, { 227, 197 },
1897};
1898
1899static struct msm_pinctrl_soc_data sc8280xp_pinctrl = {
1900	.pins = sc8280xp_pins,
1901	.npins = ARRAY_SIZE(sc8280xp_pins),
1902	.functions = sc8280xp_functions,
1903	.nfunctions = ARRAY_SIZE(sc8280xp_functions),
1904	.groups = sc8280xp_groups,
1905	.ngroups = ARRAY_SIZE(sc8280xp_groups),
1906	.ngpios = 230,
1907	.wakeirq_map = sc8280xp_pdc_map,
1908	.nwakeirq_map = ARRAY_SIZE(sc8280xp_pdc_map),
1909	.egpio_func = 7,
1910};
1911
1912static int sc8280xp_pinctrl_probe(struct platform_device *pdev)
1913{
1914	return msm_pinctrl_probe(pdev, &sc8280xp_pinctrl);
1915}
1916
1917static const struct of_device_id sc8280xp_pinctrl_of_match[] = {
1918	{ .compatible = "qcom,sc8280xp-tlmm", },
1919	{ },
1920};
1921MODULE_DEVICE_TABLE(of, sc8280xp_pinctrl_of_match);
1922
1923static struct platform_driver sc8280xp_pinctrl_driver = {
1924	.driver = {
1925		.name = "sc8280xp-tlmm",
1926		.of_match_table = sc8280xp_pinctrl_of_match,
1927	},
1928	.probe = sc8280xp_pinctrl_probe,
1929	.remove_new = msm_pinctrl_remove,
1930};
1931
1932static int __init sc8280xp_pinctrl_init(void)
1933{
1934	return platform_driver_register(&sc8280xp_pinctrl_driver);
1935}
1936arch_initcall(sc8280xp_pinctrl_init);
1937
1938static void __exit sc8280xp_pinctrl_exit(void)
1939{
1940	platform_driver_unregister(&sc8280xp_pinctrl_driver);
1941}
1942module_exit(sc8280xp_pinctrl_exit);
1943
1944MODULE_DESCRIPTION("Qualcomm SC8280XP TLMM pinctrl driver");
1945MODULE_LICENSE("GPL");
1946