1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4 */ 5 6#include <linux/module.h> 7#include <linux/of.h> 8#include <linux/platform_device.h> 9 10#include "pinctrl-msm.h" 11 12static const struct pinctrl_pin_desc ipq4019_pins[] = { 13 PINCTRL_PIN(0, "GPIO_0"), 14 PINCTRL_PIN(1, "GPIO_1"), 15 PINCTRL_PIN(2, "GPIO_2"), 16 PINCTRL_PIN(3, "GPIO_3"), 17 PINCTRL_PIN(4, "GPIO_4"), 18 PINCTRL_PIN(5, "GPIO_5"), 19 PINCTRL_PIN(6, "GPIO_6"), 20 PINCTRL_PIN(7, "GPIO_7"), 21 PINCTRL_PIN(8, "GPIO_8"), 22 PINCTRL_PIN(9, "GPIO_9"), 23 PINCTRL_PIN(10, "GPIO_10"), 24 PINCTRL_PIN(11, "GPIO_11"), 25 PINCTRL_PIN(12, "GPIO_12"), 26 PINCTRL_PIN(13, "GPIO_13"), 27 PINCTRL_PIN(14, "GPIO_14"), 28 PINCTRL_PIN(15, "GPIO_15"), 29 PINCTRL_PIN(16, "GPIO_16"), 30 PINCTRL_PIN(17, "GPIO_17"), 31 PINCTRL_PIN(18, "GPIO_18"), 32 PINCTRL_PIN(19, "GPIO_19"), 33 PINCTRL_PIN(20, "GPIO_20"), 34 PINCTRL_PIN(21, "GPIO_21"), 35 PINCTRL_PIN(22, "GPIO_22"), 36 PINCTRL_PIN(23, "GPIO_23"), 37 PINCTRL_PIN(24, "GPIO_24"), 38 PINCTRL_PIN(25, "GPIO_25"), 39 PINCTRL_PIN(26, "GPIO_26"), 40 PINCTRL_PIN(27, "GPIO_27"), 41 PINCTRL_PIN(28, "GPIO_28"), 42 PINCTRL_PIN(29, "GPIO_29"), 43 PINCTRL_PIN(30, "GPIO_30"), 44 PINCTRL_PIN(31, "GPIO_31"), 45 PINCTRL_PIN(32, "GPIO_32"), 46 PINCTRL_PIN(33, "GPIO_33"), 47 PINCTRL_PIN(34, "GPIO_34"), 48 PINCTRL_PIN(35, "GPIO_35"), 49 PINCTRL_PIN(36, "GPIO_36"), 50 PINCTRL_PIN(37, "GPIO_37"), 51 PINCTRL_PIN(38, "GPIO_38"), 52 PINCTRL_PIN(39, "GPIO_39"), 53 PINCTRL_PIN(40, "GPIO_40"), 54 PINCTRL_PIN(41, "GPIO_41"), 55 PINCTRL_PIN(42, "GPIO_42"), 56 PINCTRL_PIN(43, "GPIO_43"), 57 PINCTRL_PIN(44, "GPIO_44"), 58 PINCTRL_PIN(45, "GPIO_45"), 59 PINCTRL_PIN(46, "GPIO_46"), 60 PINCTRL_PIN(47, "GPIO_47"), 61 PINCTRL_PIN(48, "GPIO_48"), 62 PINCTRL_PIN(49, "GPIO_49"), 63 PINCTRL_PIN(50, "GPIO_50"), 64 PINCTRL_PIN(51, "GPIO_51"), 65 PINCTRL_PIN(52, "GPIO_52"), 66 PINCTRL_PIN(53, "GPIO_53"), 67 PINCTRL_PIN(54, "GPIO_54"), 68 PINCTRL_PIN(55, "GPIO_55"), 69 PINCTRL_PIN(56, "GPIO_56"), 70 PINCTRL_PIN(57, "GPIO_57"), 71 PINCTRL_PIN(58, "GPIO_58"), 72 PINCTRL_PIN(59, "GPIO_59"), 73 PINCTRL_PIN(60, "GPIO_60"), 74 PINCTRL_PIN(61, "GPIO_61"), 75 PINCTRL_PIN(62, "GPIO_62"), 76 PINCTRL_PIN(63, "GPIO_63"), 77 PINCTRL_PIN(64, "GPIO_64"), 78 PINCTRL_PIN(65, "GPIO_65"), 79 PINCTRL_PIN(66, "GPIO_66"), 80 PINCTRL_PIN(67, "GPIO_67"), 81 PINCTRL_PIN(68, "GPIO_68"), 82 PINCTRL_PIN(69, "GPIO_69"), 83 PINCTRL_PIN(70, "GPIO_70"), 84 PINCTRL_PIN(71, "GPIO_71"), 85 PINCTRL_PIN(72, "GPIO_72"), 86 PINCTRL_PIN(73, "GPIO_73"), 87 PINCTRL_PIN(74, "GPIO_74"), 88 PINCTRL_PIN(75, "GPIO_75"), 89 PINCTRL_PIN(76, "GPIO_76"), 90 PINCTRL_PIN(77, "GPIO_77"), 91 PINCTRL_PIN(78, "GPIO_78"), 92 PINCTRL_PIN(79, "GPIO_79"), 93 PINCTRL_PIN(80, "GPIO_80"), 94 PINCTRL_PIN(81, "GPIO_81"), 95 PINCTRL_PIN(82, "GPIO_82"), 96 PINCTRL_PIN(83, "GPIO_83"), 97 PINCTRL_PIN(84, "GPIO_84"), 98 PINCTRL_PIN(85, "GPIO_85"), 99 PINCTRL_PIN(86, "GPIO_86"), 100 PINCTRL_PIN(87, "GPIO_87"), 101 PINCTRL_PIN(88, "GPIO_88"), 102 PINCTRL_PIN(89, "GPIO_89"), 103 PINCTRL_PIN(90, "GPIO_90"), 104 PINCTRL_PIN(91, "GPIO_91"), 105 PINCTRL_PIN(92, "GPIO_92"), 106 PINCTRL_PIN(93, "GPIO_93"), 107 PINCTRL_PIN(94, "GPIO_94"), 108 PINCTRL_PIN(95, "GPIO_95"), 109 PINCTRL_PIN(96, "GPIO_96"), 110 PINCTRL_PIN(97, "GPIO_97"), 111 PINCTRL_PIN(98, "GPIO_98"), 112 PINCTRL_PIN(99, "GPIO_99"), 113}; 114 115#define DECLARE_QCA_GPIO_PINS(pin) \ 116 static const unsigned int gpio##pin##_pins[] = { pin } 117DECLARE_QCA_GPIO_PINS(0); 118DECLARE_QCA_GPIO_PINS(1); 119DECLARE_QCA_GPIO_PINS(2); 120DECLARE_QCA_GPIO_PINS(3); 121DECLARE_QCA_GPIO_PINS(4); 122DECLARE_QCA_GPIO_PINS(5); 123DECLARE_QCA_GPIO_PINS(6); 124DECLARE_QCA_GPIO_PINS(7); 125DECLARE_QCA_GPIO_PINS(8); 126DECLARE_QCA_GPIO_PINS(9); 127DECLARE_QCA_GPIO_PINS(10); 128DECLARE_QCA_GPIO_PINS(11); 129DECLARE_QCA_GPIO_PINS(12); 130DECLARE_QCA_GPIO_PINS(13); 131DECLARE_QCA_GPIO_PINS(14); 132DECLARE_QCA_GPIO_PINS(15); 133DECLARE_QCA_GPIO_PINS(16); 134DECLARE_QCA_GPIO_PINS(17); 135DECLARE_QCA_GPIO_PINS(18); 136DECLARE_QCA_GPIO_PINS(19); 137DECLARE_QCA_GPIO_PINS(20); 138DECLARE_QCA_GPIO_PINS(21); 139DECLARE_QCA_GPIO_PINS(22); 140DECLARE_QCA_GPIO_PINS(23); 141DECLARE_QCA_GPIO_PINS(24); 142DECLARE_QCA_GPIO_PINS(25); 143DECLARE_QCA_GPIO_PINS(26); 144DECLARE_QCA_GPIO_PINS(27); 145DECLARE_QCA_GPIO_PINS(28); 146DECLARE_QCA_GPIO_PINS(29); 147DECLARE_QCA_GPIO_PINS(30); 148DECLARE_QCA_GPIO_PINS(31); 149DECLARE_QCA_GPIO_PINS(32); 150DECLARE_QCA_GPIO_PINS(33); 151DECLARE_QCA_GPIO_PINS(34); 152DECLARE_QCA_GPIO_PINS(35); 153DECLARE_QCA_GPIO_PINS(36); 154DECLARE_QCA_GPIO_PINS(37); 155DECLARE_QCA_GPIO_PINS(38); 156DECLARE_QCA_GPIO_PINS(39); 157DECLARE_QCA_GPIO_PINS(40); 158DECLARE_QCA_GPIO_PINS(41); 159DECLARE_QCA_GPIO_PINS(42); 160DECLARE_QCA_GPIO_PINS(43); 161DECLARE_QCA_GPIO_PINS(44); 162DECLARE_QCA_GPIO_PINS(45); 163DECLARE_QCA_GPIO_PINS(46); 164DECLARE_QCA_GPIO_PINS(47); 165DECLARE_QCA_GPIO_PINS(48); 166DECLARE_QCA_GPIO_PINS(49); 167DECLARE_QCA_GPIO_PINS(50); 168DECLARE_QCA_GPIO_PINS(51); 169DECLARE_QCA_GPIO_PINS(52); 170DECLARE_QCA_GPIO_PINS(53); 171DECLARE_QCA_GPIO_PINS(54); 172DECLARE_QCA_GPIO_PINS(55); 173DECLARE_QCA_GPIO_PINS(56); 174DECLARE_QCA_GPIO_PINS(57); 175DECLARE_QCA_GPIO_PINS(58); 176DECLARE_QCA_GPIO_PINS(59); 177DECLARE_QCA_GPIO_PINS(60); 178DECLARE_QCA_GPIO_PINS(61); 179DECLARE_QCA_GPIO_PINS(62); 180DECLARE_QCA_GPIO_PINS(63); 181DECLARE_QCA_GPIO_PINS(64); 182DECLARE_QCA_GPIO_PINS(65); 183DECLARE_QCA_GPIO_PINS(66); 184DECLARE_QCA_GPIO_PINS(67); 185DECLARE_QCA_GPIO_PINS(68); 186DECLARE_QCA_GPIO_PINS(69); 187DECLARE_QCA_GPIO_PINS(70); 188DECLARE_QCA_GPIO_PINS(71); 189DECLARE_QCA_GPIO_PINS(72); 190DECLARE_QCA_GPIO_PINS(73); 191DECLARE_QCA_GPIO_PINS(74); 192DECLARE_QCA_GPIO_PINS(75); 193DECLARE_QCA_GPIO_PINS(76); 194DECLARE_QCA_GPIO_PINS(77); 195DECLARE_QCA_GPIO_PINS(78); 196DECLARE_QCA_GPIO_PINS(79); 197DECLARE_QCA_GPIO_PINS(80); 198DECLARE_QCA_GPIO_PINS(81); 199DECLARE_QCA_GPIO_PINS(82); 200DECLARE_QCA_GPIO_PINS(83); 201DECLARE_QCA_GPIO_PINS(84); 202DECLARE_QCA_GPIO_PINS(85); 203DECLARE_QCA_GPIO_PINS(86); 204DECLARE_QCA_GPIO_PINS(87); 205DECLARE_QCA_GPIO_PINS(88); 206DECLARE_QCA_GPIO_PINS(89); 207DECLARE_QCA_GPIO_PINS(90); 208DECLARE_QCA_GPIO_PINS(91); 209DECLARE_QCA_GPIO_PINS(92); 210DECLARE_QCA_GPIO_PINS(93); 211DECLARE_QCA_GPIO_PINS(94); 212DECLARE_QCA_GPIO_PINS(95); 213DECLARE_QCA_GPIO_PINS(96); 214DECLARE_QCA_GPIO_PINS(97); 215DECLARE_QCA_GPIO_PINS(98); 216DECLARE_QCA_GPIO_PINS(99); 217 218#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \ 219 { \ 220 .grp = PINCTRL_PINGROUP("gpio" #id, \ 221 gpio##id##_pins, \ 222 ARRAY_SIZE(gpio##id##_pins)), \ 223 .funcs = (int[]){ \ 224 qca_mux_gpio, /* gpio mode */ \ 225 qca_mux_##f1, \ 226 qca_mux_##f2, \ 227 qca_mux_##f3, \ 228 qca_mux_##f4, \ 229 qca_mux_##f5, \ 230 qca_mux_##f6, \ 231 qca_mux_##f7, \ 232 qca_mux_##f8, \ 233 qca_mux_##f9, \ 234 qca_mux_##f10, \ 235 qca_mux_##f11, \ 236 qca_mux_##f12, \ 237 qca_mux_##f13, \ 238 qca_mux_##f14 \ 239 }, \ 240 .nfuncs = 15, \ 241 .ctl_reg = 0x0 + 0x1000 * id, \ 242 .io_reg = 0x4 + 0x1000 * id, \ 243 .intr_cfg_reg = 0x8 + 0x1000 * id, \ 244 .intr_status_reg = 0xc + 0x1000 * id, \ 245 .intr_target_reg = 0x8 + 0x1000 * id, \ 246 .mux_bit = 2, \ 247 .pull_bit = 0, \ 248 .drv_bit = 6, \ 249 .od_bit = 12, \ 250 .oe_bit = 9, \ 251 .in_bit = 0, \ 252 .out_bit = 1, \ 253 .intr_enable_bit = 0, \ 254 .intr_status_bit = 0, \ 255 .intr_target_bit = 5, \ 256 .intr_raw_status_bit = 4, \ 257 .intr_polarity_bit = 1, \ 258 .intr_detection_bit = 2, \ 259 .intr_detection_width = 2, \ 260 } 261 262 263enum ipq4019_functions { 264 qca_mux_gpio, 265 qca_mux_aud_pin, 266 qca_mux_audio_pwm, 267 qca_mux_blsp_i2c0, 268 qca_mux_blsp_i2c1, 269 qca_mux_blsp_spi0, 270 qca_mux_blsp_spi1, 271 qca_mux_blsp_uart0, 272 qca_mux_blsp_uart1, 273 qca_mux_chip_rst, 274 qca_mux_i2s_rx, 275 qca_mux_i2s_spdif_in, 276 qca_mux_i2s_spdif_out, 277 qca_mux_i2s_td, 278 qca_mux_i2s_tx, 279 qca_mux_jtag, 280 qca_mux_led0, 281 qca_mux_led1, 282 qca_mux_led2, 283 qca_mux_led3, 284 qca_mux_led4, 285 qca_mux_led5, 286 qca_mux_led6, 287 qca_mux_led7, 288 qca_mux_led8, 289 qca_mux_led9, 290 qca_mux_led10, 291 qca_mux_led11, 292 qca_mux_mdc, 293 qca_mux_mdio, 294 qca_mux_pcie, 295 qca_mux_pmu, 296 qca_mux_prng_rosc, 297 qca_mux_qpic, 298 qca_mux_rgmii, 299 qca_mux_rmii, 300 qca_mux_sdio, 301 qca_mux_smart0, 302 qca_mux_smart1, 303 qca_mux_smart2, 304 qca_mux_smart3, 305 qca_mux_tm, 306 qca_mux_wifi0, 307 qca_mux_wifi1, 308 qca_mux_NA, 309}; 310 311static const char * const gpio_groups[] = { 312 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 313 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 314 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 315 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 316 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 317 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 318 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 319 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 320 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 321 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 322 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 323 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 324 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", 325 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", 326 "gpio99", 327}; 328static const char * const aud_pin_groups[] = { 329 "gpio48", "gpio49", "gpio50", "gpio51", 330}; 331static const char * const audio_pwm_groups[] = { 332 "gpio30", "gpio31", "gpio32", "gpio33", "gpio64", "gpio65", "gpio66", 333 "gpio67", 334}; 335static const char * const blsp_i2c0_groups[] = { 336 "gpio10", "gpio11", "gpio20", "gpio21", "gpio58", "gpio59", 337}; 338static const char * const blsp_i2c1_groups[] = { 339 "gpio12", "gpio13", "gpio34", "gpio35", 340}; 341static const char * const blsp_spi0_groups[] = { 342 "gpio12", "gpio13", "gpio14", "gpio15", "gpio45", "gpio54", "gpio55", 343 "gpio56", "gpio57", 344}; 345static const char * const blsp_spi1_groups[] = { 346 "gpio44", "gpio45", "gpio46", "gpio47", 347}; 348static const char * const blsp_uart0_groups[] = { 349 "gpio16", "gpio17", "gpio60", "gpio61", 350}; 351static const char * const blsp_uart1_groups[] = { 352 "gpio8", "gpio9", "gpio10", "gpio11", 353}; 354static const char * const chip_rst_groups[] = { 355 "gpio62", 356}; 357static const char * const i2s_rx_groups[] = { 358 "gpio0", "gpio1", "gpio2", "gpio20", "gpio21", "gpio22", "gpio23", 359 "gpio58", "gpio60", "gpio61", "gpio63", 360}; 361static const char * const i2s_spdif_in_groups[] = { 362 "gpio34", "gpio59", "gpio63", 363}; 364static const char * const i2s_spdif_out_groups[] = { 365 "gpio35", "gpio62", "gpio63", 366}; 367static const char * const i2s_td_groups[] = { 368 "gpio27", "gpio28", "gpio29", "gpio54", "gpio55", "gpio56", "gpio63", 369}; 370static const char * const i2s_tx_groups[] = { 371 "gpio24", "gpio25", "gpio26", "gpio52", "gpio53", "gpio57", "gpio60", 372 "gpio61", 373}; 374static const char * const jtag_groups[] = { 375 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 376}; 377static const char * const led0_groups[] = { 378 "gpio16", "gpio36", "gpio60", 379}; 380static const char * const led1_groups[] = { 381 "gpio17", "gpio37", "gpio61", 382}; 383static const char * const led2_groups[] = { 384 "gpio36", "gpio38", "gpio58", 385}; 386static const char * const led3_groups[] = { 387 "gpio39", 388}; 389static const char * const led4_groups[] = { 390 "gpio40", 391}; 392static const char * const led5_groups[] = { 393 "gpio44", 394}; 395static const char * const led6_groups[] = { 396 "gpio45", 397}; 398static const char * const led7_groups[] = { 399 "gpio46", 400}; 401static const char * const led8_groups[] = { 402 "gpio47", 403}; 404static const char * const led9_groups[] = { 405 "gpio48", 406}; 407static const char * const led10_groups[] = { 408 "gpio49", 409}; 410static const char * const led11_groups[] = { 411 "gpio50", 412}; 413static const char * const mdc_groups[] = { 414 "gpio7", "gpio52", 415}; 416static const char * const mdio_groups[] = { 417 "gpio6", "gpio53", 418}; 419static const char * const pcie_groups[] = { 420 "gpio39", "gpio52", 421}; 422static const char * const pmu_groups[] = { 423 "gpio54", "gpio55", 424}; 425static const char * const prng_rosc_groups[] = { 426 "gpio53", 427}; 428static const char * const qpic_groups[] = { 429 "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", 430 "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", 431 "gpio66", "gpio67", "gpio68", "gpio69", 432}; 433static const char * const rgmii_groups[] = { 434 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 435 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", 436}; 437static const char * const rmii_groups[] = { 438 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 439 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 440 "gpio50", "gpio51", 441}; 442static const char * const sdio_groups[] = { 443 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 444 "gpio30", "gpio31", "gpio32", 445}; 446static const char * const smart0_groups[] = { 447 "gpio0", "gpio1", "gpio2", "gpio5", "gpio44", "gpio45", "gpio46", 448 "gpio47", 449}; 450static const char * const smart1_groups[] = { 451 "gpio8", "gpio9", "gpio16", "gpio17", "gpio58", "gpio59", "gpio60", 452 "gpio61", 453}; 454static const char * const smart2_groups[] = { 455 "gpio40", "gpio41", "gpio48", "gpio49", 456}; 457static const char * const smart3_groups[] = { 458 "gpio58", "gpio59", "gpio60", "gpio61", 459}; 460static const char * const tm_groups[] = { 461 "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", 462 "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 463}; 464static const char * const wifi0_groups[] = { 465 "gpio37", "gpio40", "gpio41", "gpio42", "gpio50", "gpio51", "gpio52", 466 "gpio53", "gpio56", "gpio57", "gpio58", "gpio98", 467}; 468static const char * const wifi1_groups[] = { 469 "gpio37", "gpio40", "gpio41", "gpio43", "gpio50", "gpio51", "gpio52", 470 "gpio53", "gpio56", "gpio57", "gpio58", "gpio98", 471}; 472 473static const struct pinfunction ipq4019_functions[] = { 474 QCA_PIN_FUNCTION(aud_pin), 475 QCA_PIN_FUNCTION(audio_pwm), 476 QCA_PIN_FUNCTION(blsp_i2c0), 477 QCA_PIN_FUNCTION(blsp_i2c1), 478 QCA_PIN_FUNCTION(blsp_spi0), 479 QCA_PIN_FUNCTION(blsp_spi1), 480 QCA_PIN_FUNCTION(blsp_uart0), 481 QCA_PIN_FUNCTION(blsp_uart1), 482 QCA_PIN_FUNCTION(chip_rst), 483 QCA_PIN_FUNCTION(gpio), 484 QCA_PIN_FUNCTION(i2s_rx), 485 QCA_PIN_FUNCTION(i2s_spdif_in), 486 QCA_PIN_FUNCTION(i2s_spdif_out), 487 QCA_PIN_FUNCTION(i2s_td), 488 QCA_PIN_FUNCTION(i2s_tx), 489 QCA_PIN_FUNCTION(jtag), 490 QCA_PIN_FUNCTION(led0), 491 QCA_PIN_FUNCTION(led1), 492 QCA_PIN_FUNCTION(led2), 493 QCA_PIN_FUNCTION(led3), 494 QCA_PIN_FUNCTION(led4), 495 QCA_PIN_FUNCTION(led5), 496 QCA_PIN_FUNCTION(led6), 497 QCA_PIN_FUNCTION(led7), 498 QCA_PIN_FUNCTION(led8), 499 QCA_PIN_FUNCTION(led9), 500 QCA_PIN_FUNCTION(led10), 501 QCA_PIN_FUNCTION(led11), 502 QCA_PIN_FUNCTION(mdc), 503 QCA_PIN_FUNCTION(mdio), 504 QCA_PIN_FUNCTION(pcie), 505 QCA_PIN_FUNCTION(pmu), 506 QCA_PIN_FUNCTION(prng_rosc), 507 QCA_PIN_FUNCTION(qpic), 508 QCA_PIN_FUNCTION(rgmii), 509 QCA_PIN_FUNCTION(rmii), 510 QCA_PIN_FUNCTION(sdio), 511 QCA_PIN_FUNCTION(smart0), 512 QCA_PIN_FUNCTION(smart1), 513 QCA_PIN_FUNCTION(smart2), 514 QCA_PIN_FUNCTION(smart3), 515 QCA_PIN_FUNCTION(tm), 516 QCA_PIN_FUNCTION(wifi0), 517 QCA_PIN_FUNCTION(wifi1), 518}; 519 520static const struct msm_pingroup ipq4019_groups[] = { 521 PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 522 NA, NA), 523 PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 524 NA, NA), 525 PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 526 NA, NA), 527 PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 528 PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 529 PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 530 NA), 531 PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 532 PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 533 PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA, 534 NA, NA, NA), 535 PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA, 536 NA, NA, NA), 537 PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, 538 NA, NA, NA), 539 PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, 540 NA, NA, NA), 541 PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, 542 NA, NA, NA), 543 PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, 544 NA, NA, NA), 545 PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 546 NA), 547 PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 548 NA), 549 PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA, 550 NA, NA, NA), 551 PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA, 552 NA, NA, NA), 553 PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 554 PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 555 PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 556 NA, NA), 557 PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 558 NA, NA), 559 PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 560 NA), 561 PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 562 NA, NA), 563 PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 564 NA, NA), 565 PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 566 NA, NA), 567 PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 568 NA, NA), 569 PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, 570 NA, NA), 571 PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, 572 NA, NA), 573 PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, 574 NA, NA), 575 PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, 576 NA, NA, NA), 577 PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, 578 NA, NA, NA), 579 PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, 580 NA, NA, NA), 581 PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 582 NA, NA), 583 PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA, 584 NA, NA, NA, NA), 585 PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA, 586 NA, NA, NA, NA), 587 PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 588 NA), 589 PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA, 590 NA, NA), 591 PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 592 NA), 593 PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 594 NA), 595 PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA, 596 NA, NA, NA), 597 PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA, 598 NA, NA, NA), 599 PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 600 NA), 601 PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 602 NA), 603 PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA, 604 NA, NA, NA), 605 PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA, 606 NA, NA, NA, NA, NA), 607 PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA, 608 NA, NA, NA), 609 PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA, 610 NA, NA, NA), 611 PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA, 612 NA, NA, NA), 613 PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA, 614 NA, NA, NA), 615 PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA, 616 NA, NA, NA, NA), 617 PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, 618 NA, NA, NA), 619 PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA, 620 NA, NA, NA), 621 PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA, 622 NA, NA, NA, NA, NA), 623 PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA, 624 NA, NA, NA), 625 PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA, 626 NA, NA, NA), 627 PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA, 628 NA, NA, NA, NA), 629 PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA, 630 NA, NA, NA, NA), 631 PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm, 632 wifi0, wifi1, NA, NA, NA), 633 PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA, 634 NA, NA, tm, NA, NA, NA), 635 PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx, 636 NA, NA, NA, NA, NA, tm, NA), 637 PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx, 638 NA, NA, NA, NA, NA, tm, NA), 639 PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA, 640 tm, NA, NA, NA), 641 PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out, 642 i2s_spdif_in, NA, NA, NA, NA, tm, NA), 643 PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 644 NA, NA), 645 PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 646 NA, NA), 647 PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 648 NA, NA), 649 PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 650 NA, NA), 651 PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 652 PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 653 PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 654 PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 655 PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 656 PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 657 PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 658 PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 659 PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 660 PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 661 PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 662 PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 663 PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 664 PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 665 PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 666 PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 667 PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 668 PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 669 PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 670 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 671 PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 672 PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 673 PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 674 PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 675 PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 676 PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 677 PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 678 PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 679 PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 680 PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 681 PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 682 NA), 683 PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 684}; 685 686static const struct msm_pinctrl_soc_data ipq4019_pinctrl = { 687 .pins = ipq4019_pins, 688 .npins = ARRAY_SIZE(ipq4019_pins), 689 .functions = ipq4019_functions, 690 .nfunctions = ARRAY_SIZE(ipq4019_functions), 691 .groups = ipq4019_groups, 692 .ngroups = ARRAY_SIZE(ipq4019_groups), 693 .ngpios = 100, 694 .pull_no_keeper = true, 695}; 696 697static int ipq4019_pinctrl_probe(struct platform_device *pdev) 698{ 699 return msm_pinctrl_probe(pdev, &ipq4019_pinctrl); 700} 701 702static const struct of_device_id ipq4019_pinctrl_of_match[] = { 703 { .compatible = "qcom,ipq4019-pinctrl", }, 704 { }, 705}; 706 707static struct platform_driver ipq4019_pinctrl_driver = { 708 .driver = { 709 .name = "ipq4019-pinctrl", 710 .of_match_table = ipq4019_pinctrl_of_match, 711 }, 712 .probe = ipq4019_pinctrl_probe, 713 .remove_new = msm_pinctrl_remove, 714}; 715 716static int __init ipq4019_pinctrl_init(void) 717{ 718 return platform_driver_register(&ipq4019_pinctrl_driver); 719} 720arch_initcall(ipq4019_pinctrl_init); 721 722static void __exit ipq4019_pinctrl_exit(void) 723{ 724 platform_driver_unregister(&ipq4019_pinctrl_driver); 725} 726module_exit(ipq4019_pinctrl_exit); 727 728MODULE_DESCRIPTION("Qualcomm ipq4019 pinctrl driver"); 729MODULE_LICENSE("GPL v2"); 730MODULE_DEVICE_TABLE(of, ipq4019_pinctrl_of_match); 731