1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Pin controller and GPIO driver for Amlogic Meson GXL. 4 * 5 * Copyright (C) 2016 Endless Mobile, Inc. 6 * Author: Carlo Caione <carlo@endlessm.com> 7 */ 8 9#include <dt-bindings/gpio/meson-gxl-gpio.h> 10#include "pinctrl-meson.h" 11#include "pinctrl-meson8-pmx.h" 12 13static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { 14 MESON_PIN(GPIOZ_0), 15 MESON_PIN(GPIOZ_1), 16 MESON_PIN(GPIOZ_2), 17 MESON_PIN(GPIOZ_3), 18 MESON_PIN(GPIOZ_4), 19 MESON_PIN(GPIOZ_5), 20 MESON_PIN(GPIOZ_6), 21 MESON_PIN(GPIOZ_7), 22 MESON_PIN(GPIOZ_8), 23 MESON_PIN(GPIOZ_9), 24 MESON_PIN(GPIOZ_10), 25 MESON_PIN(GPIOZ_11), 26 MESON_PIN(GPIOZ_12), 27 MESON_PIN(GPIOZ_13), 28 MESON_PIN(GPIOZ_14), 29 MESON_PIN(GPIOZ_15), 30 31 MESON_PIN(GPIOH_0), 32 MESON_PIN(GPIOH_1), 33 MESON_PIN(GPIOH_2), 34 MESON_PIN(GPIOH_3), 35 MESON_PIN(GPIOH_4), 36 MESON_PIN(GPIOH_5), 37 MESON_PIN(GPIOH_6), 38 MESON_PIN(GPIOH_7), 39 MESON_PIN(GPIOH_8), 40 MESON_PIN(GPIOH_9), 41 42 MESON_PIN(BOOT_0), 43 MESON_PIN(BOOT_1), 44 MESON_PIN(BOOT_2), 45 MESON_PIN(BOOT_3), 46 MESON_PIN(BOOT_4), 47 MESON_PIN(BOOT_5), 48 MESON_PIN(BOOT_6), 49 MESON_PIN(BOOT_7), 50 MESON_PIN(BOOT_8), 51 MESON_PIN(BOOT_9), 52 MESON_PIN(BOOT_10), 53 MESON_PIN(BOOT_11), 54 MESON_PIN(BOOT_12), 55 MESON_PIN(BOOT_13), 56 MESON_PIN(BOOT_14), 57 MESON_PIN(BOOT_15), 58 59 MESON_PIN(CARD_0), 60 MESON_PIN(CARD_1), 61 MESON_PIN(CARD_2), 62 MESON_PIN(CARD_3), 63 MESON_PIN(CARD_4), 64 MESON_PIN(CARD_5), 65 MESON_PIN(CARD_6), 66 67 MESON_PIN(GPIODV_0), 68 MESON_PIN(GPIODV_1), 69 MESON_PIN(GPIODV_2), 70 MESON_PIN(GPIODV_3), 71 MESON_PIN(GPIODV_4), 72 MESON_PIN(GPIODV_5), 73 MESON_PIN(GPIODV_6), 74 MESON_PIN(GPIODV_7), 75 MESON_PIN(GPIODV_8), 76 MESON_PIN(GPIODV_9), 77 MESON_PIN(GPIODV_10), 78 MESON_PIN(GPIODV_11), 79 MESON_PIN(GPIODV_12), 80 MESON_PIN(GPIODV_13), 81 MESON_PIN(GPIODV_14), 82 MESON_PIN(GPIODV_15), 83 MESON_PIN(GPIODV_16), 84 MESON_PIN(GPIODV_17), 85 MESON_PIN(GPIODV_18), 86 MESON_PIN(GPIODV_19), 87 MESON_PIN(GPIODV_20), 88 MESON_PIN(GPIODV_21), 89 MESON_PIN(GPIODV_22), 90 MESON_PIN(GPIODV_23), 91 MESON_PIN(GPIODV_24), 92 MESON_PIN(GPIODV_25), 93 MESON_PIN(GPIODV_26), 94 MESON_PIN(GPIODV_27), 95 MESON_PIN(GPIODV_28), 96 MESON_PIN(GPIODV_29), 97 98 MESON_PIN(GPIOX_0), 99 MESON_PIN(GPIOX_1), 100 MESON_PIN(GPIOX_2), 101 MESON_PIN(GPIOX_3), 102 MESON_PIN(GPIOX_4), 103 MESON_PIN(GPIOX_5), 104 MESON_PIN(GPIOX_6), 105 MESON_PIN(GPIOX_7), 106 MESON_PIN(GPIOX_8), 107 MESON_PIN(GPIOX_9), 108 MESON_PIN(GPIOX_10), 109 MESON_PIN(GPIOX_11), 110 MESON_PIN(GPIOX_12), 111 MESON_PIN(GPIOX_13), 112 MESON_PIN(GPIOX_14), 113 MESON_PIN(GPIOX_15), 114 MESON_PIN(GPIOX_16), 115 MESON_PIN(GPIOX_17), 116 MESON_PIN(GPIOX_18), 117 118 MESON_PIN(GPIOCLK_0), 119 MESON_PIN(GPIOCLK_1), 120}; 121 122static const unsigned int emmc_nand_d07_pins[] = { 123 BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7, 124}; 125static const unsigned int emmc_clk_pins[] = { BOOT_8 }; 126static const unsigned int emmc_cmd_pins[] = { BOOT_10 }; 127static const unsigned int emmc_ds_pins[] = { BOOT_15 }; 128 129static const unsigned int nor_d_pins[] = { BOOT_11 }; 130static const unsigned int nor_q_pins[] = { BOOT_12 }; 131static const unsigned int nor_c_pins[] = { BOOT_13 }; 132static const unsigned int nor_cs_pins[] = { BOOT_15 }; 133 134static const unsigned int spi_mosi_pins[] = { GPIOX_8 }; 135static const unsigned int spi_miso_pins[] = { GPIOX_9 }; 136static const unsigned int spi_ss0_pins[] = { GPIOX_10 }; 137static const unsigned int spi_sclk_pins[] = { GPIOX_11 }; 138 139static const unsigned int sdcard_d0_pins[] = { CARD_1 }; 140static const unsigned int sdcard_d1_pins[] = { CARD_0 }; 141static const unsigned int sdcard_d2_pins[] = { CARD_5 }; 142static const unsigned int sdcard_d3_pins[] = { CARD_4 }; 143static const unsigned int sdcard_cmd_pins[] = { CARD_3 }; 144static const unsigned int sdcard_clk_pins[] = { CARD_2 }; 145 146static const unsigned int sdio_d0_pins[] = { GPIOX_0 }; 147static const unsigned int sdio_d1_pins[] = { GPIOX_1 }; 148static const unsigned int sdio_d2_pins[] = { GPIOX_2 }; 149static const unsigned int sdio_d3_pins[] = { GPIOX_3 }; 150static const unsigned int sdio_clk_pins[] = { GPIOX_4 }; 151static const unsigned int sdio_cmd_pins[] = { GPIOX_5 }; 152static const unsigned int sdio_irq_pins[] = { GPIOX_7 }; 153 154static const unsigned int nand_ce0_pins[] = { BOOT_8 }; 155static const unsigned int nand_ce1_pins[] = { BOOT_9 }; 156static const unsigned int nand_rb0_pins[] = { BOOT_10 }; 157static const unsigned int nand_ale_pins[] = { BOOT_11 }; 158static const unsigned int nand_cle_pins[] = { BOOT_12 }; 159static const unsigned int nand_wen_clk_pins[] = { BOOT_13 }; 160static const unsigned int nand_ren_wr_pins[] = { BOOT_14 }; 161static const unsigned int nand_dqs_pins[] = { BOOT_15 }; 162 163static const unsigned int uart_tx_a_pins[] = { GPIOX_12 }; 164static const unsigned int uart_rx_a_pins[] = { GPIOX_13 }; 165static const unsigned int uart_cts_a_pins[] = { GPIOX_14 }; 166static const unsigned int uart_rts_a_pins[] = { GPIOX_15 }; 167 168static const unsigned int uart_tx_b_pins[] = { GPIODV_24 }; 169static const unsigned int uart_rx_b_pins[] = { GPIODV_25 }; 170static const unsigned int uart_cts_b_pins[] = { GPIODV_26 }; 171static const unsigned int uart_rts_b_pins[] = { GPIODV_27 }; 172 173static const unsigned int uart_tx_c_pins[] = { GPIOX_8 }; 174static const unsigned int uart_rx_c_pins[] = { GPIOX_9 }; 175static const unsigned int uart_cts_c_pins[] = { GPIOX_10 }; 176static const unsigned int uart_rts_c_pins[] = { GPIOX_11 }; 177 178static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 }; 179static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 }; 180 181static const unsigned int i2c_sck_b_pins[] = { GPIODV_27 }; 182static const unsigned int i2c_sda_b_pins[] = { GPIODV_26 }; 183 184static const unsigned int i2c_sck_c_pins[] = { GPIODV_29 }; 185static const unsigned int i2c_sda_c_pins[] = { GPIODV_28 }; 186 187static const unsigned int i2c_sck_c_dv19_pins[] = { GPIODV_19 }; 188static const unsigned int i2c_sda_c_dv18_pins[] = { GPIODV_18 }; 189 190static const unsigned int eth_mdio_pins[] = { GPIOZ_0 }; 191static const unsigned int eth_mdc_pins[] = { GPIOZ_1 }; 192static const unsigned int eth_clk_rx_clk_pins[] = { GPIOZ_2 }; 193static const unsigned int eth_rx_dv_pins[] = { GPIOZ_3 }; 194static const unsigned int eth_rxd0_pins[] = { GPIOZ_4 }; 195static const unsigned int eth_rxd1_pins[] = { GPIOZ_5 }; 196static const unsigned int eth_rxd2_pins[] = { GPIOZ_6 }; 197static const unsigned int eth_rxd3_pins[] = { GPIOZ_7 }; 198static const unsigned int eth_rgmii_tx_clk_pins[] = { GPIOZ_8 }; 199static const unsigned int eth_tx_en_pins[] = { GPIOZ_9 }; 200static const unsigned int eth_txd0_pins[] = { GPIOZ_10 }; 201static const unsigned int eth_txd1_pins[] = { GPIOZ_11 }; 202static const unsigned int eth_txd2_pins[] = { GPIOZ_12 }; 203static const unsigned int eth_txd3_pins[] = { GPIOZ_13 }; 204 205static const unsigned int pwm_a_pins[] = { GPIOX_6 }; 206 207static const unsigned int pwm_b_pins[] = { GPIODV_29 }; 208 209static const unsigned int pwm_c_pins[] = { GPIOZ_15 }; 210 211static const unsigned int pwm_d_pins[] = { GPIODV_28 }; 212 213static const unsigned int pwm_e_pins[] = { GPIOX_16 }; 214 215static const unsigned int pwm_f_clk_pins[] = { GPIOCLK_1 }; 216static const unsigned int pwm_f_x_pins[] = { GPIOX_7 }; 217 218static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 }; 219static const unsigned int hdmi_sda_pins[] = { GPIOH_1 }; 220static const unsigned int hdmi_scl_pins[] = { GPIOH_2 }; 221 222static const unsigned int i2s_am_clk_pins[] = { GPIOH_6 }; 223static const unsigned int i2s_out_ao_clk_pins[] = { GPIOH_7 }; 224static const unsigned int i2s_out_lr_clk_pins[] = { GPIOH_8 }; 225static const unsigned int i2s_out_ch01_pins[] = { GPIOH_9 }; 226static const unsigned int i2s_out_ch23_z_pins[] = { GPIOZ_5 }; 227static const unsigned int i2s_out_ch45_z_pins[] = { GPIOZ_6 }; 228static const unsigned int i2s_out_ch67_z_pins[] = { GPIOZ_7 }; 229 230static const unsigned int spdif_out_h_pins[] = { GPIOH_4 }; 231 232static const unsigned int eth_link_led_pins[] = { GPIOZ_14 }; 233static const unsigned int eth_act_led_pins[] = { GPIOZ_15 }; 234 235static const unsigned int tsin_a_d0_pins[] = { GPIODV_0 }; 236static const unsigned int tsin_a_clk_pins[] = { GPIODV_8 }; 237static const unsigned int tsin_a_sop_pins[] = { GPIODV_9 }; 238static const unsigned int tsin_a_d_valid_pins[] = { GPIODV_10 }; 239static const unsigned int tsin_a_fail_pins[] = { GPIODV_11 }; 240static const unsigned int tsin_a_dp_pins[] = { 241 GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5, GPIODV_6, GPIODV_7, 242}; 243 244static const unsigned int tsin_b_clk_pins[] = { GPIOH_6 }; 245static const unsigned int tsin_b_d0_pins[] = { GPIOH_7 }; 246static const unsigned int tsin_b_sop_pins[] = { GPIOH_8 }; 247static const unsigned int tsin_b_d_valid_pins[] = { GPIOH_9 }; 248 249static const unsigned int tsin_b_fail_z4_pins[] = { GPIOZ_4 }; 250static const unsigned int tsin_b_clk_z3_pins[] = { GPIOZ_3 }; 251static const unsigned int tsin_b_d0_z2_pins[] = { GPIOZ_2 }; 252static const unsigned int tsin_b_sop_z1_pins[] = { GPIOZ_1 }; 253static const unsigned int tsin_b_d_valid_z0_pins[] = { GPIOZ_0 }; 254 255static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { 256 MESON_PIN(GPIOAO_0), 257 MESON_PIN(GPIOAO_1), 258 MESON_PIN(GPIOAO_2), 259 MESON_PIN(GPIOAO_3), 260 MESON_PIN(GPIOAO_4), 261 MESON_PIN(GPIOAO_5), 262 MESON_PIN(GPIOAO_6), 263 MESON_PIN(GPIOAO_7), 264 MESON_PIN(GPIOAO_8), 265 MESON_PIN(GPIOAO_9), 266 267 MESON_PIN(GPIO_TEST_N), 268}; 269 270static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; 271static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 }; 272static const unsigned int uart_tx_ao_b_0_pins[] = { GPIOAO_0 }; 273static const unsigned int uart_rx_ao_b_1_pins[] = { GPIOAO_1 }; 274static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 }; 275static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 }; 276static const unsigned int uart_tx_ao_b_pins[] = { GPIOAO_4 }; 277static const unsigned int uart_rx_ao_b_pins[] = { GPIOAO_5 }; 278static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 }; 279static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 }; 280 281static const unsigned int i2c_sck_ao_pins[] = {GPIOAO_4 }; 282static const unsigned int i2c_sda_ao_pins[] = {GPIOAO_5 }; 283static const unsigned int i2c_slave_sck_ao_pins[] = {GPIOAO_4 }; 284static const unsigned int i2c_slave_sda_ao_pins[] = {GPIOAO_5 }; 285 286static const unsigned int remote_input_ao_pins[] = {GPIOAO_7 }; 287 288static const unsigned int pwm_ao_a_3_pins[] = { GPIOAO_3 }; 289static const unsigned int pwm_ao_a_8_pins[] = { GPIOAO_8 }; 290 291static const unsigned int pwm_ao_b_pins[] = { GPIOAO_9 }; 292static const unsigned int pwm_ao_b_6_pins[] = { GPIOAO_6 }; 293 294static const unsigned int i2s_out_ch23_ao_pins[] = { GPIOAO_8 }; 295static const unsigned int i2s_out_ch45_ao_pins[] = { GPIOAO_9 }; 296static const unsigned int i2s_out_ch67_ao_pins[] = { GPIO_TEST_N }; 297 298static const unsigned int spdif_out_ao_6_pins[] = { GPIOAO_6 }; 299static const unsigned int spdif_out_ao_9_pins[] = { GPIOAO_9 }; 300 301static const unsigned int ao_cec_pins[] = { GPIOAO_8 }; 302static const unsigned int ee_cec_pins[] = { GPIOAO_8 }; 303 304static struct meson_pmx_group meson_gxl_periphs_groups[] = { 305 GPIO_GROUP(GPIOZ_0), 306 GPIO_GROUP(GPIOZ_1), 307 GPIO_GROUP(GPIOZ_2), 308 GPIO_GROUP(GPIOZ_3), 309 GPIO_GROUP(GPIOZ_4), 310 GPIO_GROUP(GPIOZ_5), 311 GPIO_GROUP(GPIOZ_6), 312 GPIO_GROUP(GPIOZ_7), 313 GPIO_GROUP(GPIOZ_8), 314 GPIO_GROUP(GPIOZ_9), 315 GPIO_GROUP(GPIOZ_10), 316 GPIO_GROUP(GPIOZ_11), 317 GPIO_GROUP(GPIOZ_12), 318 GPIO_GROUP(GPIOZ_13), 319 GPIO_GROUP(GPIOZ_14), 320 GPIO_GROUP(GPIOZ_15), 321 322 GPIO_GROUP(GPIOH_0), 323 GPIO_GROUP(GPIOH_1), 324 GPIO_GROUP(GPIOH_2), 325 GPIO_GROUP(GPIOH_3), 326 GPIO_GROUP(GPIOH_4), 327 GPIO_GROUP(GPIOH_5), 328 GPIO_GROUP(GPIOH_6), 329 GPIO_GROUP(GPIOH_7), 330 GPIO_GROUP(GPIOH_8), 331 GPIO_GROUP(GPIOH_9), 332 333 GPIO_GROUP(BOOT_0), 334 GPIO_GROUP(BOOT_1), 335 GPIO_GROUP(BOOT_2), 336 GPIO_GROUP(BOOT_3), 337 GPIO_GROUP(BOOT_4), 338 GPIO_GROUP(BOOT_5), 339 GPIO_GROUP(BOOT_6), 340 GPIO_GROUP(BOOT_7), 341 GPIO_GROUP(BOOT_8), 342 GPIO_GROUP(BOOT_9), 343 GPIO_GROUP(BOOT_10), 344 GPIO_GROUP(BOOT_11), 345 GPIO_GROUP(BOOT_12), 346 GPIO_GROUP(BOOT_13), 347 GPIO_GROUP(BOOT_14), 348 GPIO_GROUP(BOOT_15), 349 350 GPIO_GROUP(CARD_0), 351 GPIO_GROUP(CARD_1), 352 GPIO_GROUP(CARD_2), 353 GPIO_GROUP(CARD_3), 354 GPIO_GROUP(CARD_4), 355 GPIO_GROUP(CARD_5), 356 GPIO_GROUP(CARD_6), 357 358 GPIO_GROUP(GPIODV_0), 359 GPIO_GROUP(GPIODV_1), 360 GPIO_GROUP(GPIODV_2), 361 GPIO_GROUP(GPIODV_3), 362 GPIO_GROUP(GPIODV_4), 363 GPIO_GROUP(GPIODV_5), 364 GPIO_GROUP(GPIODV_6), 365 GPIO_GROUP(GPIODV_7), 366 GPIO_GROUP(GPIODV_8), 367 GPIO_GROUP(GPIODV_9), 368 GPIO_GROUP(GPIODV_10), 369 GPIO_GROUP(GPIODV_11), 370 GPIO_GROUP(GPIODV_12), 371 GPIO_GROUP(GPIODV_13), 372 GPIO_GROUP(GPIODV_14), 373 GPIO_GROUP(GPIODV_15), 374 GPIO_GROUP(GPIODV_16), 375 GPIO_GROUP(GPIODV_17), 376 GPIO_GROUP(GPIODV_19), 377 GPIO_GROUP(GPIODV_20), 378 GPIO_GROUP(GPIODV_21), 379 GPIO_GROUP(GPIODV_22), 380 GPIO_GROUP(GPIODV_23), 381 GPIO_GROUP(GPIODV_24), 382 GPIO_GROUP(GPIODV_25), 383 GPIO_GROUP(GPIODV_26), 384 GPIO_GROUP(GPIODV_27), 385 GPIO_GROUP(GPIODV_28), 386 GPIO_GROUP(GPIODV_29), 387 388 GPIO_GROUP(GPIOX_0), 389 GPIO_GROUP(GPIOX_1), 390 GPIO_GROUP(GPIOX_2), 391 GPIO_GROUP(GPIOX_3), 392 GPIO_GROUP(GPIOX_4), 393 GPIO_GROUP(GPIOX_5), 394 GPIO_GROUP(GPIOX_6), 395 GPIO_GROUP(GPIOX_7), 396 GPIO_GROUP(GPIOX_8), 397 GPIO_GROUP(GPIOX_9), 398 GPIO_GROUP(GPIOX_10), 399 GPIO_GROUP(GPIOX_11), 400 GPIO_GROUP(GPIOX_12), 401 GPIO_GROUP(GPIOX_13), 402 GPIO_GROUP(GPIOX_14), 403 GPIO_GROUP(GPIOX_15), 404 GPIO_GROUP(GPIOX_16), 405 GPIO_GROUP(GPIOX_17), 406 GPIO_GROUP(GPIOX_18), 407 408 GPIO_GROUP(GPIOCLK_0), 409 GPIO_GROUP(GPIOCLK_1), 410 411 GPIO_GROUP(GPIO_TEST_N), 412 413 /* Bank X */ 414 GROUP(sdio_d0, 5, 31), 415 GROUP(sdio_d1, 5, 30), 416 GROUP(sdio_d2, 5, 29), 417 GROUP(sdio_d3, 5, 28), 418 GROUP(sdio_clk, 5, 27), 419 GROUP(sdio_cmd, 5, 26), 420 GROUP(sdio_irq, 5, 24), 421 GROUP(uart_tx_a, 5, 19), 422 GROUP(uart_rx_a, 5, 18), 423 GROUP(uart_cts_a, 5, 17), 424 GROUP(uart_rts_a, 5, 16), 425 GROUP(uart_tx_c, 5, 13), 426 GROUP(uart_rx_c, 5, 12), 427 GROUP(uart_cts_c, 5, 11), 428 GROUP(uart_rts_c, 5, 10), 429 GROUP(pwm_a, 5, 25), 430 GROUP(pwm_e, 5, 15), 431 GROUP(pwm_f_x, 5, 14), 432 GROUP(spi_mosi, 5, 3), 433 GROUP(spi_miso, 5, 2), 434 GROUP(spi_ss0, 5, 1), 435 GROUP(spi_sclk, 5, 0), 436 437 /* Bank Z */ 438 GROUP(eth_mdio, 4, 23), 439 GROUP(eth_mdc, 4, 22), 440 GROUP(eth_clk_rx_clk, 4, 21), 441 GROUP(eth_rx_dv, 4, 20), 442 GROUP(eth_rxd0, 4, 19), 443 GROUP(eth_rxd1, 4, 18), 444 GROUP(eth_rxd2, 4, 17), 445 GROUP(eth_rxd3, 4, 16), 446 GROUP(eth_rgmii_tx_clk, 4, 15), 447 GROUP(eth_tx_en, 4, 14), 448 GROUP(eth_txd0, 4, 13), 449 GROUP(eth_txd1, 4, 12), 450 GROUP(eth_txd2, 4, 11), 451 GROUP(eth_txd3, 4, 10), 452 GROUP(tsin_b_fail_z4, 3, 15), 453 GROUP(tsin_b_clk_z3, 3, 16), 454 GROUP(tsin_b_d0_z2, 3, 17), 455 GROUP(tsin_b_sop_z1, 3, 18), 456 GROUP(tsin_b_d_valid_z0, 3, 19), 457 GROUP(pwm_c, 3, 20), 458 GROUP(i2s_out_ch23_z, 3, 26), 459 GROUP(i2s_out_ch45_z, 3, 25), 460 GROUP(i2s_out_ch67_z, 3, 24), 461 GROUP(eth_link_led, 4, 25), 462 GROUP(eth_act_led, 4, 24), 463 464 /* Bank H */ 465 GROUP(hdmi_hpd, 6, 31), 466 GROUP(hdmi_sda, 6, 30), 467 GROUP(hdmi_scl, 6, 29), 468 GROUP(i2s_am_clk, 6, 26), 469 GROUP(i2s_out_ao_clk, 6, 25), 470 GROUP(i2s_out_lr_clk, 6, 24), 471 GROUP(i2s_out_ch01, 6, 23), 472 GROUP(spdif_out_h, 6, 28), 473 GROUP(tsin_b_d0, 6, 17), 474 GROUP(tsin_b_sop, 6, 18), 475 GROUP(tsin_b_d_valid, 6, 19), 476 GROUP(tsin_b_clk, 6, 20), 477 478 /* Bank DV */ 479 GROUP(uart_tx_b, 2, 16), 480 GROUP(uart_rx_b, 2, 15), 481 GROUP(uart_cts_b, 2, 14), 482 GROUP(uart_rts_b, 2, 13), 483 GROUP(i2c_sda_c_dv18, 1, 17), 484 GROUP(i2c_sck_c_dv19, 1, 16), 485 GROUP(i2c_sda_a, 1, 15), 486 GROUP(i2c_sck_a, 1, 14), 487 GROUP(i2c_sda_b, 1, 13), 488 GROUP(i2c_sck_b, 1, 12), 489 GROUP(i2c_sda_c, 1, 11), 490 GROUP(i2c_sck_c, 1, 10), 491 GROUP(pwm_b, 2, 11), 492 GROUP(pwm_d, 2, 12), 493 GROUP(tsin_a_d0, 2, 4), 494 GROUP(tsin_a_dp, 2, 3), 495 GROUP(tsin_a_clk, 2, 2), 496 GROUP(tsin_a_sop, 2, 1), 497 GROUP(tsin_a_d_valid, 2, 0), 498 GROUP(tsin_a_fail, 1, 31), 499 500 /* Bank BOOT */ 501 GROUP(emmc_nand_d07, 7, 31), 502 GROUP(emmc_clk, 7, 30), 503 GROUP(emmc_cmd, 7, 29), 504 GROUP(emmc_ds, 7, 28), 505 GROUP(nor_d, 7, 13), 506 GROUP(nor_q, 7, 12), 507 GROUP(nor_c, 7, 11), 508 GROUP(nor_cs, 7, 10), 509 GROUP(nand_ce0, 7, 7), 510 GROUP(nand_ce1, 7, 6), 511 GROUP(nand_rb0, 7, 5), 512 GROUP(nand_ale, 7, 4), 513 GROUP(nand_cle, 7, 3), 514 GROUP(nand_wen_clk, 7, 2), 515 GROUP(nand_ren_wr, 7, 1), 516 GROUP(nand_dqs, 7, 0), 517 518 /* Bank CARD */ 519 GROUP(sdcard_d1, 6, 5), 520 GROUP(sdcard_d0, 6, 4), 521 GROUP(sdcard_d3, 6, 1), 522 GROUP(sdcard_d2, 6, 0), 523 GROUP(sdcard_cmd, 6, 2), 524 GROUP(sdcard_clk, 6, 3), 525 526 /* Bank CLK */ 527 GROUP(pwm_f_clk, 8, 30), 528}; 529 530static struct meson_pmx_group meson_gxl_aobus_groups[] = { 531 GPIO_GROUP(GPIOAO_0), 532 GPIO_GROUP(GPIOAO_1), 533 GPIO_GROUP(GPIOAO_2), 534 GPIO_GROUP(GPIOAO_3), 535 GPIO_GROUP(GPIOAO_4), 536 GPIO_GROUP(GPIOAO_5), 537 GPIO_GROUP(GPIOAO_6), 538 GPIO_GROUP(GPIOAO_7), 539 GPIO_GROUP(GPIOAO_8), 540 GPIO_GROUP(GPIOAO_9), 541 542 /* bank AO */ 543 GROUP(uart_tx_ao_b_0, 0, 26), 544 GROUP(uart_rx_ao_b_1, 0, 25), 545 GROUP(uart_tx_ao_b, 0, 24), 546 GROUP(uart_rx_ao_b, 0, 23), 547 GROUP(uart_tx_ao_a, 0, 12), 548 GROUP(uart_rx_ao_a, 0, 11), 549 GROUP(uart_cts_ao_a, 0, 10), 550 GROUP(uart_rts_ao_a, 0, 9), 551 GROUP(uart_cts_ao_b, 0, 8), 552 GROUP(uart_rts_ao_b, 0, 7), 553 GROUP(i2c_sck_ao, 0, 6), 554 GROUP(i2c_sda_ao, 0, 5), 555 GROUP(i2c_slave_sck_ao, 0, 2), 556 GROUP(i2c_slave_sda_ao, 0, 1), 557 GROUP(remote_input_ao, 0, 0), 558 GROUP(pwm_ao_a_3, 0, 22), 559 GROUP(pwm_ao_b_6, 0, 18), 560 GROUP(pwm_ao_a_8, 0, 17), 561 GROUP(pwm_ao_b, 0, 3), 562 GROUP(i2s_out_ch23_ao, 1, 0), 563 GROUP(i2s_out_ch45_ao, 1, 1), 564 GROUP(spdif_out_ao_6, 0, 16), 565 GROUP(spdif_out_ao_9, 0, 4), 566 GROUP(ao_cec, 0, 15), 567 GROUP(ee_cec, 0, 14), 568 569 /* test n pin */ 570 GROUP(i2s_out_ch67_ao, 1, 2), 571}; 572 573static const char * const gpio_periphs_groups[] = { 574 "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", 575 "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", 576 "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14", 577 "GPIOZ_15", 578 579 "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", 580 "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9", 581 582 "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", 583 "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", 584 "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", 585 "BOOT_15", 586 587 "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", 588 "CARD_5", "CARD_6", 589 590 "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4", 591 "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9", 592 "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14", 593 "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19", 594 "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24", 595 "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29", 596 597 "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", 598 "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", 599 "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", 600 "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", 601}; 602 603static const char * const emmc_groups[] = { 604 "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds", 605}; 606 607static const char * const nor_groups[] = { 608 "nor_d", "nor_q", "nor_c", "nor_cs", 609}; 610 611static const char * const spi_groups[] = { 612 "spi_mosi", "spi_miso", "spi_ss0", "spi_sclk", 613}; 614 615static const char * const sdcard_groups[] = { 616 "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3", 617 "sdcard_cmd", "sdcard_clk", 618}; 619 620static const char * const sdio_groups[] = { 621 "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", 622 "sdio_cmd", "sdio_clk", "sdio_irq", 623}; 624 625static const char * const nand_groups[] = { 626 "emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", 627 "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs", 628}; 629 630static const char * const uart_a_groups[] = { 631 "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", 632}; 633 634static const char * const uart_b_groups[] = { 635 "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b", 636}; 637 638static const char * const uart_c_groups[] = { 639 "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c", 640}; 641 642static const char * const i2c_a_groups[] = { 643 "i2c_sck_a", "i2c_sda_a", 644}; 645 646static const char * const i2c_b_groups[] = { 647 "i2c_sck_b", "i2c_sda_b", 648}; 649 650static const char * const i2c_c_groups[] = { 651 "i2c_sck_c", "i2c_sda_c", "i2c_sda_c_dv18", "i2c_sck_c_dv19", 652}; 653 654static const char * const eth_groups[] = { 655 "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv", 656 "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3", 657 "eth_rgmii_tx_clk", "eth_tx_en", 658 "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3", 659}; 660 661static const char * const pwm_a_groups[] = { 662 "pwm_a", 663}; 664 665static const char * const pwm_b_groups[] = { 666 "pwm_b", 667}; 668 669static const char * const pwm_c_groups[] = { 670 "pwm_c", 671}; 672 673static const char * const pwm_d_groups[] = { 674 "pwm_d", 675}; 676 677static const char * const pwm_e_groups[] = { 678 "pwm_e", 679}; 680 681static const char * const pwm_f_groups[] = { 682 "pwm_f_clk", "pwm_f_x", 683}; 684 685static const char * const hdmi_hpd_groups[] = { 686 "hdmi_hpd", 687}; 688 689static const char * const hdmi_i2c_groups[] = { 690 "hdmi_sda", "hdmi_scl", 691}; 692 693static const char * const i2s_out_groups[] = { 694 "i2s_am_clk", "i2s_out_ao_clk", "i2s_out_lr_clk", 695 "i2s_out_ch01", "i2s_out_ch23_z", "i2s_out_ch45_z", "i2s_out_ch67_z", 696}; 697 698static const char * const spdif_out_groups[] = { 699 "spdif_out_h", 700}; 701 702static const char * const eth_led_groups[] = { 703 "eth_link_led", "eth_act_led", 704}; 705 706static const char * const tsin_a_groups[] = { 707 "tsin_a_clk", "tsin_a_sop", 708 "tsin_a_d_valid", "tsin_a_d0", 709 "tsin_a_dp", "tsin_a_fail", 710}; 711 712static const char * const tsin_b_groups[] = { 713 "tsin_b_clk", "tsin_b_sop", "tsin_b_d_valid", "tsin_b_d0", 714 "tsin_b_clk_z3", "tsin_b_sop_z1", "tsin_b_d_valid_z0", "tsin_b_d0_z2", 715 "tsin_b_fail_z4", 716}; 717 718static const char * const gpio_aobus_groups[] = { 719 "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", 720 "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", 721 722 "GPIO_TEST_N", 723}; 724 725static const char * const uart_ao_groups[] = { 726 "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a", 727}; 728 729static const char * const uart_ao_b_groups[] = { 730 "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b", 731 "uart_tx_ao_b_0", "uart_rx_ao_b_1", 732}; 733 734static const char * const i2c_ao_groups[] = { 735 "i2c_sck_ao", "i2c_sda_ao", 736}; 737 738static const char * const i2c_slave_ao_groups[] = { 739 "i2c_slave_sck_ao", "i2c_slave_sda_ao", 740}; 741 742static const char * const remote_input_ao_groups[] = { 743 "remote_input_ao", 744}; 745 746static const char * const pwm_ao_a_groups[] = { 747 "pwm_ao_a_3", "pwm_ao_a_8", 748}; 749 750static const char * const pwm_ao_b_groups[] = { 751 "pwm_ao_b", "pwm_ao_b_6", 752}; 753 754static const char * const i2s_out_ao_groups[] = { 755 "i2s_out_ch23_ao", "i2s_out_ch45_ao", "i2s_out_ch67_ao", 756}; 757 758static const char * const spdif_out_ao_groups[] = { 759 "spdif_out_ao_6", "spdif_out_ao_9", 760}; 761 762static const char * const cec_ao_groups[] = { 763 "ao_cec", "ee_cec", 764}; 765 766static struct meson_pmx_func meson_gxl_periphs_functions[] = { 767 FUNCTION(gpio_periphs), 768 FUNCTION(emmc), 769 FUNCTION(nor), 770 FUNCTION(spi), 771 FUNCTION(sdcard), 772 FUNCTION(sdio), 773 FUNCTION(nand), 774 FUNCTION(uart_a), 775 FUNCTION(uart_b), 776 FUNCTION(uart_c), 777 FUNCTION(i2c_a), 778 FUNCTION(i2c_b), 779 FUNCTION(i2c_c), 780 FUNCTION(eth), 781 FUNCTION(pwm_a), 782 FUNCTION(pwm_b), 783 FUNCTION(pwm_c), 784 FUNCTION(pwm_d), 785 FUNCTION(pwm_e), 786 FUNCTION(pwm_f), 787 FUNCTION(hdmi_hpd), 788 FUNCTION(hdmi_i2c), 789 FUNCTION(i2s_out), 790 FUNCTION(spdif_out), 791 FUNCTION(eth_led), 792 FUNCTION(tsin_a), 793 FUNCTION(tsin_b), 794}; 795 796static struct meson_pmx_func meson_gxl_aobus_functions[] = { 797 FUNCTION(gpio_aobus), 798 FUNCTION(uart_ao), 799 FUNCTION(uart_ao_b), 800 FUNCTION(i2c_ao), 801 FUNCTION(i2c_slave_ao), 802 FUNCTION(remote_input_ao), 803 FUNCTION(pwm_ao_a), 804 FUNCTION(pwm_ao_b), 805 FUNCTION(i2s_out_ao), 806 FUNCTION(spdif_out_ao), 807 FUNCTION(cec_ao), 808}; 809 810static struct meson_bank meson_gxl_periphs_banks[] = { 811 /* name first last irq pullen pull dir out in */ 812 BANK("X", GPIOX_0, GPIOX_18, 89, 107, 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), 813 BANK("DV", GPIODV_0, GPIODV_29, 83, 88, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0), 814 BANK("H", GPIOH_0, GPIOH_9, 26, 35, 1, 20, 1, 20, 3, 20, 4, 20, 5, 20), 815 BANK("Z", GPIOZ_0, GPIOZ_15, 10, 25, 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), 816 BANK("CARD", CARD_0, CARD_6, 52, 58, 2, 20, 2, 20, 6, 20, 7, 20, 8, 20), 817 BANK("BOOT", BOOT_0, BOOT_15, 36, 51, 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), 818 BANK("CLK", GPIOCLK_0, GPIOCLK_1, 108, 109, 3, 28, 3, 28, 9, 28, 10, 28, 11, 28), 819}; 820 821static struct meson_bank meson_gxl_aobus_banks[] = { 822 /* name first last irq pullen pull dir out in */ 823 BANK("AO", GPIOAO_0, GPIOAO_9, 0, 9, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0), 824}; 825 826static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { 827 .name = "periphs-banks", 828 .pins = meson_gxl_periphs_pins, 829 .groups = meson_gxl_periphs_groups, 830 .funcs = meson_gxl_periphs_functions, 831 .banks = meson_gxl_periphs_banks, 832 .num_pins = ARRAY_SIZE(meson_gxl_periphs_pins), 833 .num_groups = ARRAY_SIZE(meson_gxl_periphs_groups), 834 .num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions), 835 .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks), 836 .pmx_ops = &meson8_pmx_ops, 837}; 838 839static struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { 840 .name = "aobus-banks", 841 .pins = meson_gxl_aobus_pins, 842 .groups = meson_gxl_aobus_groups, 843 .funcs = meson_gxl_aobus_functions, 844 .banks = meson_gxl_aobus_banks, 845 .num_pins = ARRAY_SIZE(meson_gxl_aobus_pins), 846 .num_groups = ARRAY_SIZE(meson_gxl_aobus_groups), 847 .num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions), 848 .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks), 849 .pmx_ops = &meson8_pmx_ops, 850 .parse_dt = meson8_aobus_parse_dt_extra, 851}; 852 853static const struct of_device_id meson_gxl_pinctrl_dt_match[] = { 854 { 855 .compatible = "amlogic,meson-gxl-periphs-pinctrl", 856 .data = &meson_gxl_periphs_pinctrl_data, 857 }, 858 { 859 .compatible = "amlogic,meson-gxl-aobus-pinctrl", 860 .data = &meson_gxl_aobus_pinctrl_data, 861 }, 862 { }, 863}; 864MODULE_DEVICE_TABLE(of, meson_gxl_pinctrl_dt_match); 865 866static struct platform_driver meson_gxl_pinctrl_driver = { 867 .probe = meson_pinctrl_probe, 868 .driver = { 869 .name = "meson-gxl-pinctrl", 870 .of_match_table = meson_gxl_pinctrl_dt_match, 871 }, 872}; 873module_platform_driver(meson_gxl_pinctrl_driver); 874MODULE_LICENSE("GPL v2"); 875