1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright(c) 2009-2012  Realtek Corporation.*/
3
4#ifndef __RTL92D_PHY_COMMON_H__
5#define __RTL92D_PHY_COMMON_H__
6
7#define TARGET_CHNL_NUM_5G			221
8#define TARGET_CHNL_NUM_2G			14
9#define CV_CURVE_CNT				64
10#define RT_CANNOT_IO(hw)			false
11#define RX_INDEX_MAPPING_NUM			15
12#define IQK_BB_REG_NUM				10
13
14#define IQK_DELAY_TIME				1
15#define MAX_TOLERANCE				5
16#define MAX_TOLERANCE_92D			3
17
18enum baseband_config_type {
19	BASEBAND_CONFIG_PHY_REG = 0,
20	BASEBAND_CONFIG_AGC_TAB = 1,
21};
22
23enum rf_content {
24	radioa_txt = 0,
25	radiob_txt = 1,
26	radioc_txt = 2,
27	radiod_txt = 3
28};
29
30static inline void rtl92d_acquire_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
31						     unsigned long *flag)
32{
33	struct rtl_priv *rtlpriv = rtl_priv(hw);
34
35	if (rtlpriv->rtlhal.interface == INTF_USB)
36		return;
37
38	if (rtlpriv->rtlhal.interfaceindex == 1)
39		spin_lock_irqsave(&rtlpriv->locks.cck_and_rw_pagea_lock, *flag);
40}
41
42static inline void rtl92d_release_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
43						     unsigned long *flag)
44{
45	struct rtl_priv *rtlpriv = rtl_priv(hw);
46
47	if (rtlpriv->rtlhal.interface == INTF_USB)
48		return;
49
50	if (rtlpriv->rtlhal.interfaceindex == 1)
51		spin_unlock_irqrestore(&rtlpriv->locks.cck_and_rw_pagea_lock,
52				       *flag);
53}
54
55u32 rtl92d_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
56			    u32 regaddr, u32 bitmask);
57void rtl92d_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
58			   u32 regaddr, u32 bitmask, u32 data);
59void rtl92d_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
60void rtl92d_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw,
61					   u32 regaddr, u32 bitmask, u32 data);
62void rtl92d_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
63void rtl92d_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
64void rtl92d_phy_enable_rf_env(struct ieee80211_hw *hw, u8 rfpath,
65			      u32 *pu4_regval);
66void rtl92d_phy_restore_rf_env(struct ieee80211_hw *hw, u8 rfpath,
67			       u32 *pu4_regval);
68u8 rtl92d_get_rightchnlplace_for_iqk(u8 chnl);
69void rtl92d_phy_save_adda_registers(struct ieee80211_hw *hw, const u32 *adda_reg,
70				    u32 *adda_backup, u32 regnum);
71void rtl92d_phy_save_mac_registers(struct ieee80211_hw *hw,
72				   const u32 *macreg, u32 *macbackup);
73void rtl92d_phy_path_adda_on(struct ieee80211_hw *hw,
74			     const u32 *adda_reg, bool patha_on, bool is2t);
75void rtl92d_phy_mac_setting_calibration(struct ieee80211_hw *hw,
76					const u32 *macreg, u32 *macbackup);
77void rtl92d_phy_calc_curvindex(struct ieee80211_hw *hw,
78			       const u32 *targetchnl, u32 *curvecount_val,
79			       bool is5g, u32 *curveindex);
80void rtl92d_phy_reset_iqk_result(struct ieee80211_hw *hw);
81bool rtl92d_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
82void rtl92d_phy_config_macphymode(struct ieee80211_hw *hw);
83void rtl92d_phy_config_macphymode_info(struct ieee80211_hw *hw);
84u8 rtl92d_get_chnlgroup_fromarray(u8 chnl);
85u8 rtl92d_phy_get_chnlgroup_bypg(u8 chnlindex);
86void rtl92d_phy_config_maccoexist_rfpage(struct ieee80211_hw *hw);
87/* Without these declarations sparse warns about context imbalance. */
88void rtl92d_acquire_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
89				       unsigned long *flag);
90void rtl92d_release_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
91				       unsigned long *flag);
92
93/* Without these helpers and the declarations sparse warns about
94 * context imbalance.
95 */
96static inline void rtl92d_pci_lock(struct rtl_priv *rtlpriv)
97{
98	if (rtlpriv->rtlhal.interface == INTF_PCI)
99		spin_lock(&rtlpriv->locks.rf_lock);
100}
101
102static inline void rtl92d_pci_unlock(struct rtl_priv *rtlpriv)
103{
104	if (rtlpriv->rtlhal.interface == INTF_PCI)
105		spin_unlock(&rtlpriv->locks.rf_lock);
106}
107
108void rtl92d_pci_lock(struct rtl_priv *rtlpriv);
109void rtl92d_pci_unlock(struct rtl_priv *rtlpriv);
110
111#endif
112