1/* SPDX-License-Identifier: GPL-2.0+ */
2/* Copyright (c) 2018 Quantenna Communications, Inc. All rights reserved. */
3
4#ifndef _QTN_FMAC_PCIE_H_
5#define _QTN_FMAC_PCIE_H_
6
7#include <linux/pci.h>
8#include <linux/spinlock.h>
9#include <linux/io.h>
10#include <linux/skbuff.h>
11#include <linux/workqueue.h>
12#include <linux/interrupt.h>
13
14#include "shm_ipc.h"
15#include "bus.h"
16
17#define SKB_BUF_SIZE		2048
18
19#define QTN_FW_DL_TIMEOUT_MS	3000
20#define QTN_FW_QLINK_TIMEOUT_MS	30000
21#define QTN_EP_RESET_WAIT_MS	1000
22
23struct qtnf_pcie_bus_priv {
24	struct pci_dev *pdev;
25
26	int (*probe_cb)(struct qtnf_bus *bus, unsigned int tx_bd_size,
27			unsigned int rx_bd_size);
28	void (*remove_cb)(struct qtnf_bus *bus);
29	int (*suspend_cb)(struct qtnf_bus *bus);
30	int (*resume_cb)(struct qtnf_bus *bus);
31	u64 (*dma_mask_get_cb)(void);
32
33	spinlock_t tx_reclaim_lock;
34	spinlock_t tx_lock;
35
36	struct workqueue_struct *workqueue;
37	struct tasklet_struct reclaim_tq;
38
39	void __iomem *sysctl_bar;
40	void __iomem *epmem_bar;
41	void __iomem *dmareg_bar;
42
43	struct qtnf_shm_ipc shm_ipc_ep_in;
44	struct qtnf_shm_ipc shm_ipc_ep_out;
45
46	u16 tx_bd_num;
47	u16 rx_bd_num;
48
49	struct sk_buff **tx_skb;
50	struct sk_buff **rx_skb;
51
52	unsigned int fw_blksize;
53
54	u32 rx_bd_w_index;
55	u32 rx_bd_r_index;
56
57	u32 tx_bd_w_index;
58	u32 tx_bd_r_index;
59
60	/* diagnostics stats */
61	u32 pcie_irq_count;
62	u32 tx_full_count;
63	u32 tx_done_count;
64	u32 tx_reclaim_done;
65	u32 tx_reclaim_req;
66
67	u8 msi_enabled;
68	u8 tx_stopped;
69	bool flashboot;
70};
71
72int qtnf_pcie_control_tx(struct qtnf_bus *bus, struct sk_buff *skb);
73int qtnf_pcie_alloc_skb_array(struct qtnf_pcie_bus_priv *priv);
74int qtnf_pcie_fw_boot_done(struct qtnf_bus *bus);
75void qtnf_pcie_init_shm_ipc(struct qtnf_pcie_bus_priv *priv,
76			    struct qtnf_shm_ipc_region __iomem *ipc_tx_reg,
77			    struct qtnf_shm_ipc_region __iomem *ipc_rx_reg,
78			    const struct qtnf_shm_ipc_int *ipc_int);
79struct qtnf_bus *qtnf_pcie_pearl_alloc(struct pci_dev *pdev);
80struct qtnf_bus *qtnf_pcie_topaz_alloc(struct pci_dev *pdev);
81
82static inline void qtnf_non_posted_write(u32 val, void __iomem *basereg)
83{
84	writel(val, basereg);
85
86	/* flush posted write */
87	readl(basereg);
88}
89
90#endif /* _QTN_FMAC_PCIE_H_ */
91