1/* SPDX-License-Identifier: ISC */
2/* Copyright (C) 2019 MediaTek Inc. */
3
4#ifndef __MT7615_H
5#define __MT7615_H
6
7#include <linux/completion.h>
8#include <linux/interrupt.h>
9#include <linux/ktime.h>
10#include <linux/regmap.h>
11#include "../mt76_connac_mcu.h"
12#include "regs.h"
13
14#define MT7615_MAX_INTERFACES		16
15#define MT7615_MAX_WMM_SETS		4
16#define MT7663_WTBL_SIZE		32
17#define MT7615_WTBL_SIZE		128
18#define MT7615_WTBL_RESERVED		(mt7615_wtbl_size(dev) - 1)
19#define MT7615_WTBL_STA			(MT7615_WTBL_RESERVED - \
20					 MT7615_MAX_INTERFACES)
21
22#define MT7615_PM_TIMEOUT		(HZ / 12)
23#define MT7615_HW_SCAN_TIMEOUT		(HZ / 10)
24#define MT7615_RESET_TIMEOUT		(30 * HZ)
25#define MT7615_RATE_RETRY		2
26
27#define MT7615_TX_RING_SIZE		1024
28#define MT7615_TX_MGMT_RING_SIZE	128
29#define MT7615_TX_MCU_RING_SIZE		128
30#define MT7615_TX_FWDL_RING_SIZE	128
31
32#define MT7615_RX_RING_SIZE		1024
33#define MT7615_RX_MCU_RING_SIZE		512
34
35#define MT7615_DRV_OWN_RETRY_COUNT	10
36
37#define MT7615_FIRMWARE_CR4		"mediatek/mt7615_cr4.bin"
38#define MT7615_FIRMWARE_N9		"mediatek/mt7615_n9.bin"
39#define MT7615_ROM_PATCH		"mediatek/mt7615_rom_patch.bin"
40
41#define MT7622_FIRMWARE_N9		"mediatek/mt7622_n9.bin"
42#define MT7622_ROM_PATCH		"mediatek/mt7622_rom_patch.bin"
43
44#define MT7615_FIRMWARE_V1		1
45#define MT7615_FIRMWARE_V2		2
46#define MT7615_FIRMWARE_V3		3
47
48#define MT7663_OFFLOAD_ROM_PATCH	"mediatek/mt7663pr2h.bin"
49#define MT7663_OFFLOAD_FIRMWARE_N9	"mediatek/mt7663_n9_v3.bin"
50#define MT7663_ROM_PATCH		"mediatek/mt7663pr2h_rebb.bin"
51#define MT7663_FIRMWARE_N9		"mediatek/mt7663_n9_rebb.bin"
52
53#define MT7615_EEPROM_SIZE		1024
54#define MT7663_EEPROM_SIZE		1536
55#define MT7615_TOKEN_SIZE		4096
56
57#define MT_FRAC_SCALE		12
58#define MT_FRAC(val, div)	(((val) << MT_FRAC_SCALE) / (div))
59
60#define MT_CHFREQ_VALID		BIT(7)
61#define MT_CHFREQ_DBDC_IDX	BIT(6)
62#define MT_CHFREQ_SEQ		GENMASK(5, 0)
63
64#define MT7615_BAR_RATE_DEFAULT		0x4b /* OFDM 6M */
65#define MT7615_CFEND_RATE_DEFAULT	0x49 /* OFDM 24M */
66#define MT7615_CFEND_RATE_11B		0x03 /* 11B LP, 11M */
67
68struct mt7615_vif;
69struct mt7615_sta;
70struct mt7615_dfs_pulse;
71struct mt7615_dfs_pattern;
72enum mt7615_cipher_type;
73
74enum mt7615_hw_txq_id {
75	MT7615_TXQ_MAIN,
76	MT7615_TXQ_EXT,
77	MT7615_TXQ_MCU,
78	MT7615_TXQ_FWDL,
79};
80
81enum mt7622_hw_txq_id {
82	MT7622_TXQ_AC0,
83	MT7622_TXQ_AC1,
84	MT7622_TXQ_AC2,
85	MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,
86	MT7622_TXQ_AC3,
87	MT7622_TXQ_MGMT,
88	MT7622_TXQ_MCU = 15,
89};
90
91struct mt7615_rate_set {
92	struct ieee80211_tx_rate probe_rate;
93	struct ieee80211_tx_rate rates[4];
94};
95
96struct mt7615_rate_desc {
97	bool rateset;
98	u16 probe_val;
99	u16 val[4];
100	u8 bw_idx;
101	u8 bw;
102};
103
104struct mt7615_wtbl_rate_desc {
105	struct list_head node;
106
107	struct mt7615_rate_desc rate;
108	struct mt7615_sta *sta;
109};
110
111struct mt7663s_intr {
112	u32 isr;
113	struct {
114		u32 wtqcr[8];
115	} tx;
116	struct {
117		u16 num[2];
118		u16 len[2][16];
119	} rx;
120	u32 rec_mb[2];
121} __packed;
122
123struct mt7615_sta {
124	struct mt76_wcid wcid; /* must be first */
125
126	struct mt7615_vif *vif;
127
128	u32 airtime_ac[8];
129
130	struct ieee80211_tx_rate rates[4];
131
132	struct mt7615_rate_set rateset[2];
133	u32 rate_set_tsf;
134
135	u8 rate_count;
136	u8 n_rates;
137
138	u8 rate_probe;
139};
140
141struct mt7615_vif {
142	struct mt76_vif mt76; /* must be first */
143	struct mt7615_sta sta;
144	bool sta_added;
145};
146
147struct mib_stats {
148	u32 ack_fail_cnt;
149	u32 fcs_err_cnt;
150	u32 rts_cnt;
151	u32 rts_retries_cnt;
152	u32 ba_miss_cnt;
153	unsigned long aggr_per;
154};
155
156struct mt7615_phy {
157	struct mt76_phy *mt76;
158	struct mt7615_dev *dev;
159
160	struct ieee80211_vif *monitor_vif;
161
162	u8 n_beacon_vif;
163
164	u32 rxfilter;
165	u64 omac_mask;
166
167	u16 noise;
168
169	bool scs_en;
170
171	unsigned long last_cca_adj;
172	int false_cca_ofdm, false_cca_cck;
173	s8 ofdm_sensitivity;
174	s8 cck_sensitivity;
175
176	s16 coverage_class;
177	u8 slottime;
178
179	u8 chfreq;
180	u8 rdd_state;
181
182	u32 rx_ampdu_ts;
183	u32 ampdu_ref;
184
185	struct mib_stats mib;
186
187	struct sk_buff_head scan_event_list;
188	struct delayed_work scan_work;
189
190	struct work_struct roc_work;
191	struct timer_list roc_timer;
192	wait_queue_head_t roc_wait;
193	bool roc_grant;
194
195#ifdef CONFIG_NL80211_TESTMODE
196	struct {
197		u32 *reg_backup;
198
199		s16 last_freq_offset;
200		u8 last_rcpi[4];
201		s8 last_ib_rssi[4];
202		s8 last_wb_rssi[4];
203	} test;
204#endif
205};
206
207#define mt7615_mcu_add_tx_ba(dev, ...)	(dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
208#define mt7615_mcu_add_rx_ba(dev, ...)	(dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
209#define mt7615_mcu_sta_add(phy, ...)	((phy)->dev)->mcu_ops->sta_add((phy),  __VA_ARGS__)
210#define mt7615_mcu_add_dev_info(phy, ...) ((phy)->dev)->mcu_ops->add_dev_info((phy),  __VA_ARGS__)
211#define mt7615_mcu_add_bss_info(phy, ...) ((phy)->dev)->mcu_ops->add_bss_info((phy),  __VA_ARGS__)
212#define mt7615_mcu_add_beacon(dev, ...)	(dev)->mcu_ops->add_beacon_offload((dev),  __VA_ARGS__)
213#define mt7615_mcu_set_pm(dev, ...)	(dev)->mcu_ops->set_pm_state((dev),  __VA_ARGS__)
214#define mt7615_mcu_set_drv_ctrl(dev)	(dev)->mcu_ops->set_drv_ctrl((dev))
215#define mt7615_mcu_set_fw_ctrl(dev)	(dev)->mcu_ops->set_fw_ctrl((dev))
216#define mt7615_mcu_set_sta_decap_offload(dev, ...) (dev)->mcu_ops->set_sta_decap_offload((dev), __VA_ARGS__)
217struct mt7615_mcu_ops {
218	int (*add_tx_ba)(struct mt7615_dev *dev,
219			 struct ieee80211_ampdu_params *params,
220			 bool enable);
221	int (*add_rx_ba)(struct mt7615_dev *dev,
222			 struct ieee80211_ampdu_params *params,
223			 bool enable);
224	int (*sta_add)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
225		       struct ieee80211_sta *sta, bool enable);
226	int (*add_dev_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
227			    bool enable);
228	int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
229			    struct ieee80211_sta *sta, bool enable);
230	int (*add_beacon_offload)(struct mt7615_dev *dev,
231				  struct ieee80211_hw *hw,
232				  struct ieee80211_vif *vif, bool enable);
233	int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
234	int (*set_drv_ctrl)(struct mt7615_dev *dev);
235	int (*set_fw_ctrl)(struct mt7615_dev *dev);
236	int (*set_sta_decap_offload)(struct mt7615_dev *dev,
237				     struct ieee80211_vif *vif,
238				     struct ieee80211_sta *sta);
239};
240
241struct mt7615_dev {
242	union { /* must be first */
243		struct mt76_dev mt76;
244		struct mt76_phy mphy;
245	};
246
247	const struct mt76_bus_ops *bus_ops;
248	struct mt7615_phy phy;
249	u64 omac_mask;
250
251	u16 chainmask;
252
253	struct ieee80211_ops *ops;
254	const struct mt7615_mcu_ops *mcu_ops;
255	struct regmap *infracfg;
256	const u32 *reg_map;
257
258	struct work_struct mcu_work;
259
260	struct work_struct reset_work;
261	wait_queue_head_t reset_wait;
262	u32 reset_state;
263
264	struct {
265		u8 n_pulses;
266		u32 period;
267		u16 width;
268		s16 power;
269	} radar_pattern;
270	u32 hw_pattern;
271
272	bool fw_debug;
273	bool flash_eeprom;
274	bool dbdc_support;
275
276	u8 fw_ver;
277
278	struct work_struct rate_work;
279	struct list_head wrd_head;
280
281	u32 debugfs_rf_wf;
282	u32 debugfs_rf_reg;
283
284	u32 muar_mask;
285
286	struct mt76_connac_pm pm;
287	struct mt76_connac_coredump coredump;
288};
289
290enum tx_pkt_queue_idx {
291	MT_LMAC_AC00,
292	MT_LMAC_AC01,
293	MT_LMAC_AC02,
294	MT_LMAC_AC03,
295	MT_LMAC_ALTX0 = 0x10,
296	MT_LMAC_BMC0,
297	MT_LMAC_BCN0,
298	MT_LMAC_PSMP0,
299	MT_LMAC_ALTX1,
300	MT_LMAC_BMC1,
301	MT_LMAC_BCN1,
302	MT_LMAC_PSMP1,
303};
304
305enum {
306	MT_RX_SEL0,
307	MT_RX_SEL1,
308};
309
310enum mt7615_rdd_cmd {
311	RDD_STOP,
312	RDD_START,
313	RDD_DET_MODE,
314	RDD_DET_STOP,
315	RDD_CAC_START,
316	RDD_CAC_END,
317	RDD_NORMAL_START,
318	RDD_DISABLE_DFS_CAL,
319	RDD_PULSE_DBG,
320	RDD_READ_PULSE,
321	RDD_RESUME_BF,
322};
323
324static inline struct mt7615_phy *
325mt7615_hw_phy(struct ieee80211_hw *hw)
326{
327	struct mt76_phy *phy = hw->priv;
328
329	return phy->priv;
330}
331
332static inline struct mt7615_dev *
333mt7615_hw_dev(struct ieee80211_hw *hw)
334{
335	struct mt76_phy *phy = hw->priv;
336
337	return container_of(phy->dev, struct mt7615_dev, mt76);
338}
339
340static inline struct mt7615_phy *
341mt7615_ext_phy(struct mt7615_dev *dev)
342{
343	struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
344
345	if (!phy)
346		return NULL;
347
348	return phy->priv;
349}
350
351extern struct ieee80211_rate mt7615_rates[12];
352extern const struct ieee80211_ops mt7615_ops;
353extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
354extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
355extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];
356extern struct pci_driver mt7615_pci_driver;
357extern struct platform_driver mt7622_wmac_driver;
358extern const struct mt76_testmode_ops mt7615_testmode_ops;
359
360#ifdef CONFIG_MT7622_WMAC
361int mt7622_wmac_init(struct mt7615_dev *dev);
362#else
363static inline int mt7622_wmac_init(struct mt7615_dev *dev)
364{
365	return 0;
366}
367#endif
368
369int mt7615_thermal_init(struct mt7615_dev *dev);
370int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
371		      int irq, const u32 *map);
372u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
373
374u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
375int mt7615_led_set_blink(struct led_classdev *led_cdev,
376			 unsigned long *delay_on,
377			 unsigned long *delay_off);
378void mt7615_led_set_brightness(struct led_classdev *led_cdev,
379			       enum led_brightness brightness);
380void mt7615_init_device(struct mt7615_dev *dev);
381int mt7615_register_device(struct mt7615_dev *dev);
382void mt7615_unregister_device(struct mt7615_dev *dev);
383int mt7615_register_ext_phy(struct mt7615_dev *dev);
384void mt7615_unregister_ext_phy(struct mt7615_dev *dev);
385int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);
386int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
387					 struct ieee80211_channel *chan,
388					 u8 chain_idx);
389int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
390					enum nl80211_band band);
391int mt7615_wait_pdma_busy(struct mt7615_dev *dev);
392int mt7615_dma_init(struct mt7615_dev *dev);
393void mt7615_dma_start(struct mt7615_dev *dev);
394void mt7615_dma_cleanup(struct mt7615_dev *dev);
395int mt7615_mcu_init(struct mt7615_dev *dev);
396bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
397void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
398			  struct ieee80211_tx_rate *probe_rate,
399			  struct ieee80211_tx_rate *rates);
400void mt7615_pm_wake_work(struct work_struct *work);
401void mt7615_pm_power_save_work(struct work_struct *work);
402int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
403int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
404int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
405		       const struct ieee80211_tx_queue_params *params);
406void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
407int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
408int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
409
410static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
411{
412	return dev->fw_ver > MT7615_FIRMWARE_V2;
413}
414
415static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)
416{
417	if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))
418		return MT7663_WTBL_SIZE;
419	else
420		return MT7615_WTBL_SIZE;
421}
422
423#define mt7615_mutex_acquire(dev)	\
424	mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)
425#define mt7615_mutex_release(dev)	\
426	mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)
427
428static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
429{
430	static const u8 lmac_queue_map[] = {
431		[IEEE80211_AC_BK] = MT_LMAC_AC00,
432		[IEEE80211_AC_BE] = MT_LMAC_AC01,
433		[IEEE80211_AC_VI] = MT_LMAC_AC02,
434		[IEEE80211_AC_VO] = MT_LMAC_AC03,
435	};
436
437	if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
438		return MT_LMAC_AC01; /* BE */
439
440	return lmac_queue_map[ac];
441}
442
443static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
444{
445	return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx);
446}
447
448static inline unsigned long
449mt7615_get_macwork_timeout(struct mt7615_dev *dev)
450{
451	return dev->pm.enable ? HZ / 3 : HZ / 10;
452}
453
454void mt7615_dma_reset(struct mt7615_dev *dev);
455void mt7615_scan_work(struct work_struct *work);
456void mt7615_roc_work(struct work_struct *work);
457void mt7615_roc_timer(struct timer_list *timer);
458void mt7615_init_txpower(struct mt7615_dev *dev,
459			 struct ieee80211_supported_band *sband);
460int mt7615_set_channel(struct mt7615_phy *phy);
461void mt7615_init_work(struct mt7615_dev *dev);
462
463int mt7615_mcu_restart(struct mt76_dev *dev);
464void mt7615_update_channel(struct mt76_phy *mphy);
465bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
466void mt7615_mac_reset_counters(struct mt7615_phy *phy);
467void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
468void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
469void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
470void mt7615_mac_enable_rtscts(struct mt7615_dev *dev,
471			      struct ieee80211_vif *vif, bool enable);
472void mt7615_mac_sta_poll(struct mt7615_dev *dev);
473int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
474			  struct sk_buff *skb, struct mt76_wcid *wcid,
475			  struct ieee80211_sta *sta, int pid,
476			  struct ieee80211_key_conf *key,
477			  enum mt76_txq_id qid, bool beacon);
478void mt7615_mac_set_timing(struct mt7615_phy *phy);
479int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
480			      struct mt76_wcid *wcid,
481			      struct ieee80211_key_conf *key);
482int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
483			    struct ieee80211_key_conf *key);
484void mt7615_mac_reset_work(struct work_struct *work);
485u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);
486
487int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,
488			      struct sk_buff *skb, int seq);
489u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);
490int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);
491int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
492int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
493int mt7615_mcu_get_temperature(struct mt7615_dev *dev);
494int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);
495void mt7615_mcu_exit(struct mt7615_dev *dev);
496void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
497			 int cmd, int *wait_seq);
498
499int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
500			  enum mt76_txq_id qid, struct mt76_wcid *wcid,
501			  struct ieee80211_sta *sta,
502			  struct mt76_tx_info *tx_info);
503
504void mt7615_tx_worker(struct mt76_worker *w);
505void mt7615_tx_token_put(struct mt7615_dev *dev);
506bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len);
507void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
508			 struct sk_buff *skb, u32 *info);
509int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
510		       struct ieee80211_sta *sta);
511void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
512			   struct ieee80211_sta *sta);
513void mt7615_mac_work(struct work_struct *work);
514int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev);
515int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
516int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
517			    const struct mt7615_dfs_pulse *pulse);
518int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
519			    const struct mt7615_dfs_pattern *pattern);
520int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
521			      u32 val);
522int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);
523int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);
524int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);
525int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);
526
527int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
528		       struct ieee80211_channel *chan, int duration);
529
530int mt7615_init_debugfs(struct mt7615_dev *dev);
531int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
532
533int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,
534				 struct ieee80211_vif *vif,
535				 bool enable);
536int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
537			  bool enable);
538int __mt7663_load_firmware(struct mt7615_dev *dev);
539void mt7615_coredump_work(struct work_struct *work);
540
541void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en);
542
543/* usb */
544int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
545				   enum mt76_txq_id qid, struct mt76_wcid *wcid,
546				   struct ieee80211_sta *sta,
547				   struct mt76_tx_info *tx_info);
548bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
549void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
550				     struct mt76_queue_entry *e);
551int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);
552int mt7663u_mcu_init(struct mt7615_dev *dev);
553int mt7663u_mcu_power_on(struct mt7615_dev *dev);
554
555/* sdio */
556int mt7663s_mcu_init(struct mt7615_dev *dev);
557
558#endif
559