1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * NXP Wireless LAN device driver: SDIO specific handling 4 * 5 * Copyright 2011-2020 NXP 6 */ 7 8#include <linux/firmware.h> 9 10#include "decl.h" 11#include "ioctl.h" 12#include "util.h" 13#include "fw.h" 14#include "main.h" 15#include "wmm.h" 16#include "11n.h" 17#include "sdio.h" 18 19 20#define SDIO_VERSION "1.0" 21 22static void mwifiex_sdio_work(struct work_struct *work); 23 24static struct mwifiex_if_ops sdio_ops; 25 26static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = { 27 .start_rd_port = 1, 28 .start_wr_port = 1, 29 .base_0_reg = 0x0040, 30 .base_1_reg = 0x0041, 31 .poll_reg = 0x30, 32 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK, 33 .host_int_rsr_reg = 0x1, 34 .host_int_mask_reg = 0x02, 35 .host_int_status_reg = 0x03, 36 .status_reg_0 = 0x60, 37 .status_reg_1 = 0x61, 38 .sdio_int_mask = 0x3f, 39 .data_port_mask = 0x0000fffe, 40 .io_port_0_reg = 0x78, 41 .io_port_1_reg = 0x79, 42 .io_port_2_reg = 0x7A, 43 .max_mp_regs = 64, 44 .rd_bitmap_l = 0x04, 45 .rd_bitmap_u = 0x05, 46 .wr_bitmap_l = 0x06, 47 .wr_bitmap_u = 0x07, 48 .rd_len_p0_l = 0x08, 49 .rd_len_p0_u = 0x09, 50 .card_misc_cfg_reg = 0x6c, 51 .func1_dump_reg_start = 0x0, 52 .func1_dump_reg_end = 0x9, 53 .func1_scratch_reg = 0x60, 54 .func1_spec_reg_num = 5, 55 .func1_spec_reg_table = {0x28, 0x30, 0x34, 0x38, 0x3c}, 56}; 57 58static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = { 59 .start_rd_port = 0, 60 .start_wr_port = 0, 61 .base_0_reg = 0x60, 62 .base_1_reg = 0x61, 63 .poll_reg = 0x50, 64 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 65 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 66 .host_int_rsr_reg = 0x1, 67 .host_int_status_reg = 0x03, 68 .host_int_mask_reg = 0x02, 69 .status_reg_0 = 0xc0, 70 .status_reg_1 = 0xc1, 71 .sdio_int_mask = 0xff, 72 .data_port_mask = 0xffffffff, 73 .io_port_0_reg = 0xD8, 74 .io_port_1_reg = 0xD9, 75 .io_port_2_reg = 0xDA, 76 .max_mp_regs = 184, 77 .rd_bitmap_l = 0x04, 78 .rd_bitmap_u = 0x05, 79 .rd_bitmap_1l = 0x06, 80 .rd_bitmap_1u = 0x07, 81 .wr_bitmap_l = 0x08, 82 .wr_bitmap_u = 0x09, 83 .wr_bitmap_1l = 0x0a, 84 .wr_bitmap_1u = 0x0b, 85 .rd_len_p0_l = 0x0c, 86 .rd_len_p0_u = 0x0d, 87 .card_misc_cfg_reg = 0xcc, 88 .card_cfg_2_1_reg = 0xcd, 89 .cmd_rd_len_0 = 0xb4, 90 .cmd_rd_len_1 = 0xb5, 91 .cmd_rd_len_2 = 0xb6, 92 .cmd_rd_len_3 = 0xb7, 93 .cmd_cfg_0 = 0xb8, 94 .cmd_cfg_1 = 0xb9, 95 .cmd_cfg_2 = 0xba, 96 .cmd_cfg_3 = 0xbb, 97 .fw_dump_host_ready = 0xee, 98 .fw_dump_ctrl = 0xe2, 99 .fw_dump_start = 0xe3, 100 .fw_dump_end = 0xea, 101 .func1_dump_reg_start = 0x0, 102 .func1_dump_reg_end = 0xb, 103 .func1_scratch_reg = 0xc0, 104 .func1_spec_reg_num = 8, 105 .func1_spec_reg_table = {0x4C, 0x50, 0x54, 0x55, 0x58, 106 0x59, 0x5c, 0x5d}, 107}; 108 109static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8977 = { 110 .start_rd_port = 0, 111 .start_wr_port = 0, 112 .base_0_reg = 0xF8, 113 .base_1_reg = 0xF9, 114 .poll_reg = 0x5C, 115 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 116 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 117 .host_int_rsr_reg = 0x4, 118 .host_int_status_reg = 0x0C, 119 .host_int_mask_reg = 0x08, 120 .status_reg_0 = 0xE8, 121 .status_reg_1 = 0xE9, 122 .sdio_int_mask = 0xff, 123 .data_port_mask = 0xffffffff, 124 .io_port_0_reg = 0xE4, 125 .io_port_1_reg = 0xE5, 126 .io_port_2_reg = 0xE6, 127 .max_mp_regs = 196, 128 .rd_bitmap_l = 0x10, 129 .rd_bitmap_u = 0x11, 130 .rd_bitmap_1l = 0x12, 131 .rd_bitmap_1u = 0x13, 132 .wr_bitmap_l = 0x14, 133 .wr_bitmap_u = 0x15, 134 .wr_bitmap_1l = 0x16, 135 .wr_bitmap_1u = 0x17, 136 .rd_len_p0_l = 0x18, 137 .rd_len_p0_u = 0x19, 138 .card_misc_cfg_reg = 0xd8, 139 .card_cfg_2_1_reg = 0xd9, 140 .cmd_rd_len_0 = 0xc0, 141 .cmd_rd_len_1 = 0xc1, 142 .cmd_rd_len_2 = 0xc2, 143 .cmd_rd_len_3 = 0xc3, 144 .cmd_cfg_0 = 0xc4, 145 .cmd_cfg_1 = 0xc5, 146 .cmd_cfg_2 = 0xc6, 147 .cmd_cfg_3 = 0xc7, 148 .fw_dump_host_ready = 0xcc, 149 .fw_dump_ctrl = 0xf0, 150 .fw_dump_start = 0xf1, 151 .fw_dump_end = 0xf8, 152 .func1_dump_reg_start = 0x10, 153 .func1_dump_reg_end = 0x17, 154 .func1_scratch_reg = 0xe8, 155 .func1_spec_reg_num = 13, 156 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 157 0x60, 0x61, 0x62, 0x64, 158 0x65, 0x66, 0x68, 0x69, 159 0x6a}, 160}; 161 162static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = { 163 .start_rd_port = 0, 164 .start_wr_port = 0, 165 .base_0_reg = 0xF8, 166 .base_1_reg = 0xF9, 167 .poll_reg = 0x5C, 168 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 169 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 170 .host_int_rsr_reg = 0x4, 171 .host_int_status_reg = 0x0C, 172 .host_int_mask_reg = 0x08, 173 .host_strap_reg = 0xF4, 174 .host_strap_mask = 0x01, 175 .host_strap_value = 0x00, 176 .status_reg_0 = 0xE8, 177 .status_reg_1 = 0xE9, 178 .sdio_int_mask = 0xff, 179 .data_port_mask = 0xffffffff, 180 .io_port_0_reg = 0xE4, 181 .io_port_1_reg = 0xE5, 182 .io_port_2_reg = 0xE6, 183 .max_mp_regs = 196, 184 .rd_bitmap_l = 0x10, 185 .rd_bitmap_u = 0x11, 186 .rd_bitmap_1l = 0x12, 187 .rd_bitmap_1u = 0x13, 188 .wr_bitmap_l = 0x14, 189 .wr_bitmap_u = 0x15, 190 .wr_bitmap_1l = 0x16, 191 .wr_bitmap_1u = 0x17, 192 .rd_len_p0_l = 0x18, 193 .rd_len_p0_u = 0x19, 194 .card_misc_cfg_reg = 0xd8, 195 .card_cfg_2_1_reg = 0xd9, 196 .cmd_rd_len_0 = 0xc0, 197 .cmd_rd_len_1 = 0xc1, 198 .cmd_rd_len_2 = 0xc2, 199 .cmd_rd_len_3 = 0xc3, 200 .cmd_cfg_0 = 0xc4, 201 .cmd_cfg_1 = 0xc5, 202 .cmd_cfg_2 = 0xc6, 203 .cmd_cfg_3 = 0xc7, 204 .fw_dump_host_ready = 0xcc, 205 .fw_dump_ctrl = 0xf0, 206 .fw_dump_start = 0xf1, 207 .fw_dump_end = 0xf8, 208 .func1_dump_reg_start = 0x10, 209 .func1_dump_reg_end = 0x17, 210 .func1_scratch_reg = 0xe8, 211 .func1_spec_reg_num = 13, 212 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 213 0x60, 0x61, 0x62, 0x64, 214 0x65, 0x66, 0x68, 0x69, 215 0x6a}, 216}; 217 218static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = { 219 .start_rd_port = 0, 220 .start_wr_port = 0, 221 .base_0_reg = 0x6C, 222 .base_1_reg = 0x6D, 223 .poll_reg = 0x5C, 224 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 225 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 226 .host_int_rsr_reg = 0x4, 227 .host_int_status_reg = 0x0C, 228 .host_int_mask_reg = 0x08, 229 .status_reg_0 = 0x90, 230 .status_reg_1 = 0x91, 231 .sdio_int_mask = 0xff, 232 .data_port_mask = 0xffffffff, 233 .io_port_0_reg = 0xE4, 234 .io_port_1_reg = 0xE5, 235 .io_port_2_reg = 0xE6, 236 .max_mp_regs = 196, 237 .rd_bitmap_l = 0x10, 238 .rd_bitmap_u = 0x11, 239 .rd_bitmap_1l = 0x12, 240 .rd_bitmap_1u = 0x13, 241 .wr_bitmap_l = 0x14, 242 .wr_bitmap_u = 0x15, 243 .wr_bitmap_1l = 0x16, 244 .wr_bitmap_1u = 0x17, 245 .rd_len_p0_l = 0x18, 246 .rd_len_p0_u = 0x19, 247 .card_misc_cfg_reg = 0xd8, 248 .card_cfg_2_1_reg = 0xd9, 249 .cmd_rd_len_0 = 0xc0, 250 .cmd_rd_len_1 = 0xc1, 251 .cmd_rd_len_2 = 0xc2, 252 .cmd_rd_len_3 = 0xc3, 253 .cmd_cfg_0 = 0xc4, 254 .cmd_cfg_1 = 0xc5, 255 .cmd_cfg_2 = 0xc6, 256 .cmd_cfg_3 = 0xc7, 257 .func1_dump_reg_start = 0x10, 258 .func1_dump_reg_end = 0x17, 259 .func1_scratch_reg = 0x90, 260 .func1_spec_reg_num = 13, 261 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60, 262 0x61, 0x62, 0x64, 0x65, 0x66, 263 0x68, 0x69, 0x6a}, 264}; 265 266static const struct mwifiex_sdio_card_reg mwifiex_reg_sd89xx = { 267 .start_rd_port = 0, 268 .start_wr_port = 0, 269 .base_0_reg = 0xF8, 270 .base_1_reg = 0xF9, 271 .poll_reg = 0x5C, 272 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 273 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 274 .host_int_rsr_reg = 0x4, 275 .host_int_status_reg = 0x0C, 276 .host_int_mask_reg = 0x08, 277 .host_strap_reg = 0xF4, 278 .host_strap_mask = 0x01, 279 .host_strap_value = 0x00, 280 .status_reg_0 = 0xE8, 281 .status_reg_1 = 0xE9, 282 .sdio_int_mask = 0xff, 283 .data_port_mask = 0xffffffff, 284 .io_port_0_reg = 0xE4, 285 .io_port_1_reg = 0xE5, 286 .io_port_2_reg = 0xE6, 287 .max_mp_regs = 196, 288 .rd_bitmap_l = 0x10, 289 .rd_bitmap_u = 0x11, 290 .rd_bitmap_1l = 0x12, 291 .rd_bitmap_1u = 0x13, 292 .wr_bitmap_l = 0x14, 293 .wr_bitmap_u = 0x15, 294 .wr_bitmap_1l = 0x16, 295 .wr_bitmap_1u = 0x17, 296 .rd_len_p0_l = 0x18, 297 .rd_len_p0_u = 0x19, 298 .card_misc_cfg_reg = 0xd8, 299 .card_cfg_2_1_reg = 0xd9, 300 .cmd_rd_len_0 = 0xc0, 301 .cmd_rd_len_1 = 0xc1, 302 .cmd_rd_len_2 = 0xc2, 303 .cmd_rd_len_3 = 0xc3, 304 .cmd_cfg_0 = 0xc4, 305 .cmd_cfg_1 = 0xc5, 306 .cmd_cfg_2 = 0xc6, 307 .cmd_cfg_3 = 0xc7, 308 .fw_dump_host_ready = 0xcc, 309 .fw_dump_ctrl = 0xf9, 310 .fw_dump_start = 0xf1, 311 .fw_dump_end = 0xf8, 312 .func1_dump_reg_start = 0x10, 313 .func1_dump_reg_end = 0x17, 314 .func1_scratch_reg = 0xE8, 315 .func1_spec_reg_num = 13, 316 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60, 317 0x61, 0x62, 0x64, 0x65, 0x66, 318 0x68, 0x69, 0x6a}, 319}; 320 321static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = { 322 .firmware = SD8786_DEFAULT_FW_NAME, 323 .reg = &mwifiex_reg_sd87xx, 324 .max_ports = 16, 325 .mp_agg_pkt_limit = 8, 326 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 327 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 328 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 329 .supports_sdio_new_mode = false, 330 .has_control_mask = true, 331 .can_dump_fw = false, 332 .can_auto_tdls = false, 333 .can_ext_scan = false, 334 .fw_ready_extra_delay = false, 335}; 336 337static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = { 338 .firmware = SD8787_DEFAULT_FW_NAME, 339 .reg = &mwifiex_reg_sd87xx, 340 .max_ports = 16, 341 .mp_agg_pkt_limit = 8, 342 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 343 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 344 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 345 .supports_sdio_new_mode = false, 346 .has_control_mask = true, 347 .can_dump_fw = false, 348 .can_auto_tdls = false, 349 .can_ext_scan = true, 350 .fw_ready_extra_delay = false, 351}; 352 353static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = { 354 .firmware = SD8797_DEFAULT_FW_NAME, 355 .reg = &mwifiex_reg_sd87xx, 356 .max_ports = 16, 357 .mp_agg_pkt_limit = 8, 358 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 359 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 360 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 361 .supports_sdio_new_mode = false, 362 .has_control_mask = true, 363 .can_dump_fw = false, 364 .can_auto_tdls = false, 365 .can_ext_scan = true, 366 .fw_ready_extra_delay = false, 367}; 368 369static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = { 370 .firmware = SD8897_DEFAULT_FW_NAME, 371 .reg = &mwifiex_reg_sd8897, 372 .max_ports = 32, 373 .mp_agg_pkt_limit = 16, 374 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 375 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 376 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 377 .supports_sdio_new_mode = true, 378 .has_control_mask = false, 379 .can_dump_fw = true, 380 .can_auto_tdls = false, 381 .can_ext_scan = true, 382 .fw_ready_extra_delay = false, 383}; 384 385static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = { 386 .firmware = SD8977_DEFAULT_FW_NAME, 387 .reg = &mwifiex_reg_sd8977, 388 .max_ports = 32, 389 .mp_agg_pkt_limit = 16, 390 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 391 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 392 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 393 .supports_sdio_new_mode = true, 394 .has_control_mask = false, 395 .can_dump_fw = true, 396 .fw_dump_enh = true, 397 .can_auto_tdls = false, 398 .can_ext_scan = true, 399 .fw_ready_extra_delay = false, 400}; 401 402static const struct mwifiex_sdio_device mwifiex_sdio_sd8978 = { 403 .firmware_sdiouart = SD8978_SDIOUART_FW_NAME, 404 .reg = &mwifiex_reg_sd89xx, 405 .max_ports = 32, 406 .mp_agg_pkt_limit = 16, 407 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 408 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 409 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 410 .supports_sdio_new_mode = true, 411 .has_control_mask = false, 412 .can_dump_fw = true, 413 .fw_dump_enh = true, 414 .can_auto_tdls = false, 415 .can_ext_scan = true, 416 .fw_ready_extra_delay = true, 417}; 418 419static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = { 420 .firmware = SD8997_DEFAULT_FW_NAME, 421 .firmware_sdiouart = SD8997_SDIOUART_FW_NAME, 422 .reg = &mwifiex_reg_sd8997, 423 .max_ports = 32, 424 .mp_agg_pkt_limit = 16, 425 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 426 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 427 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 428 .supports_sdio_new_mode = true, 429 .has_control_mask = false, 430 .can_dump_fw = true, 431 .fw_dump_enh = true, 432 .can_auto_tdls = false, 433 .can_ext_scan = true, 434 .fw_ready_extra_delay = false, 435}; 436 437static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = { 438 .firmware = SD8887_DEFAULT_FW_NAME, 439 .reg = &mwifiex_reg_sd8887, 440 .max_ports = 32, 441 .mp_agg_pkt_limit = 16, 442 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 443 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K, 444 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K, 445 .supports_sdio_new_mode = true, 446 .has_control_mask = false, 447 .can_dump_fw = false, 448 .can_auto_tdls = true, 449 .can_ext_scan = true, 450 .fw_ready_extra_delay = false, 451}; 452 453static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = { 454 .firmware = SD8987_DEFAULT_FW_NAME, 455 .reg = &mwifiex_reg_sd89xx, 456 .max_ports = 32, 457 .mp_agg_pkt_limit = 16, 458 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 459 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 460 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 461 .supports_sdio_new_mode = true, 462 .has_control_mask = false, 463 .can_dump_fw = true, 464 .fw_dump_enh = true, 465 .can_auto_tdls = true, 466 .can_ext_scan = true, 467 .fw_ready_extra_delay = false, 468}; 469 470static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = { 471 .firmware = SD8801_DEFAULT_FW_NAME, 472 .reg = &mwifiex_reg_sd87xx, 473 .max_ports = 16, 474 .mp_agg_pkt_limit = 8, 475 .supports_sdio_new_mode = false, 476 .has_control_mask = true, 477 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 478 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 479 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 480 .can_dump_fw = false, 481 .can_auto_tdls = false, 482 .can_ext_scan = true, 483 .fw_ready_extra_delay = false, 484}; 485 486static struct memory_type_mapping generic_mem_type_map[] = { 487 {"DUMP", NULL, 0, 0xDD}, 488}; 489 490static struct memory_type_mapping mem_type_mapping_tbl[] = { 491 {"ITCM", NULL, 0, 0xF0}, 492 {"DTCM", NULL, 0, 0xF1}, 493 {"SQRAM", NULL, 0, 0xF2}, 494 {"APU", NULL, 0, 0xF3}, 495 {"CIU", NULL, 0, 0xF4}, 496 {"ICU", NULL, 0, 0xF5}, 497 {"MAC", NULL, 0, 0xF6}, 498 {"EXT7", NULL, 0, 0xF7}, 499 {"EXT8", NULL, 0, 0xF8}, 500 {"EXT9", NULL, 0, 0xF9}, 501 {"EXT10", NULL, 0, 0xFA}, 502 {"EXT11", NULL, 0, 0xFB}, 503 {"EXT12", NULL, 0, 0xFC}, 504 {"EXT13", NULL, 0, 0xFD}, 505 {"EXTLAST", NULL, 0, 0xFE}, 506}; 507 508static const struct of_device_id mwifiex_sdio_of_match_table[] __maybe_unused = { 509 { .compatible = "marvell,sd8787" }, 510 { .compatible = "marvell,sd8897" }, 511 { .compatible = "marvell,sd8978" }, 512 { .compatible = "marvell,sd8997" }, 513 { .compatible = "nxp,iw416" }, 514 { } 515}; 516 517/* This function parse device tree node using mmc subnode devicetree API. 518 * The device node is saved in card->plt_of_node. 519 * if the device tree node exist and include interrupts attributes, this 520 * function will also request platform specific wakeup interrupt. 521 */ 522static int mwifiex_sdio_probe_of(struct device *dev) 523{ 524 if (!of_match_node(mwifiex_sdio_of_match_table, dev->of_node)) { 525 dev_err(dev, "required compatible string missing\n"); 526 return -EINVAL; 527 } 528 529 return 0; 530} 531 532/* 533 * SDIO probe. 534 * 535 * This function probes an mwifiex device and registers it. It allocates 536 * the card structure, enables SDIO function number and initiates the 537 * device registration and initialization procedure by adding a logical 538 * interface. 539 */ 540static int 541mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id) 542{ 543 int ret; 544 struct sdio_mmc_card *card = NULL; 545 546 pr_debug("info: vendor=0x%4.04X device=0x%4.04X class=%d function=%d\n", 547 func->vendor, func->device, func->class, func->num); 548 549 card = devm_kzalloc(&func->dev, sizeof(*card), GFP_KERNEL); 550 if (!card) 551 return -ENOMEM; 552 553 init_completion(&card->fw_done); 554 555 card->func = func; 556 557 func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE; 558 559 if (id->driver_data) { 560 struct mwifiex_sdio_device *data = (void *)id->driver_data; 561 562 card->firmware = data->firmware; 563 card->firmware_sdiouart = data->firmware_sdiouart; 564 card->reg = data->reg; 565 card->max_ports = data->max_ports; 566 card->mp_agg_pkt_limit = data->mp_agg_pkt_limit; 567 card->supports_sdio_new_mode = data->supports_sdio_new_mode; 568 card->has_control_mask = data->has_control_mask; 569 card->tx_buf_size = data->tx_buf_size; 570 card->mp_tx_agg_buf_size = data->mp_tx_agg_buf_size; 571 card->mp_rx_agg_buf_size = data->mp_rx_agg_buf_size; 572 card->can_dump_fw = data->can_dump_fw; 573 card->fw_dump_enh = data->fw_dump_enh; 574 card->can_auto_tdls = data->can_auto_tdls; 575 card->can_ext_scan = data->can_ext_scan; 576 card->fw_ready_extra_delay = data->fw_ready_extra_delay; 577 INIT_WORK(&card->work, mwifiex_sdio_work); 578 } 579 580 sdio_claim_host(func); 581 ret = sdio_enable_func(func); 582 sdio_release_host(func); 583 584 if (ret) { 585 dev_err(&func->dev, "failed to enable function\n"); 586 return ret; 587 } 588 589 /* device tree node parsing and platform specific configuration*/ 590 if (func->dev.of_node) { 591 ret = mwifiex_sdio_probe_of(&func->dev); 592 if (ret) 593 goto err_disable; 594 } 595 596 ret = mwifiex_add_card(card, &card->fw_done, &sdio_ops, 597 MWIFIEX_SDIO, &func->dev); 598 if (ret) { 599 dev_err(&func->dev, "add card failed\n"); 600 goto err_disable; 601 } 602 603 return 0; 604 605err_disable: 606 sdio_claim_host(func); 607 sdio_disable_func(func); 608 sdio_release_host(func); 609 610 return ret; 611} 612 613/* 614 * SDIO resume. 615 * 616 * Kernel needs to suspend all functions separately. Therefore all 617 * registered functions must have drivers with suspend and resume 618 * methods. Failing that the kernel simply removes the whole card. 619 * 620 * If already not resumed, this function turns on the traffic and 621 * sends a host sleep cancel request to the firmware. 622 */ 623static int mwifiex_sdio_resume(struct device *dev) 624{ 625 struct sdio_func *func = dev_to_sdio_func(dev); 626 struct sdio_mmc_card *card; 627 struct mwifiex_adapter *adapter; 628 629 card = sdio_get_drvdata(func); 630 if (!card || !card->adapter) { 631 dev_err(dev, "resume: invalid card or adapter\n"); 632 return 0; 633 } 634 635 adapter = card->adapter; 636 637 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 638 mwifiex_dbg(adapter, WARN, 639 "device already resumed\n"); 640 return 0; 641 } 642 643 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 644 645 /* Disable Host Sleep */ 646 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 647 MWIFIEX_SYNC_CMD); 648 649 mwifiex_disable_wake(adapter); 650 651 return 0; 652} 653 654/* Write data into SDIO card register. Caller claims SDIO device. */ 655static int 656mwifiex_write_reg_locked(struct sdio_func *func, u32 reg, u8 data) 657{ 658 int ret = -1; 659 660 sdio_writeb(func, data, reg, &ret); 661 return ret; 662} 663 664/* This function writes data into SDIO card register. 665 */ 666static int 667mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data) 668{ 669 struct sdio_mmc_card *card = adapter->card; 670 int ret; 671 672 sdio_claim_host(card->func); 673 ret = mwifiex_write_reg_locked(card->func, reg, data); 674 sdio_release_host(card->func); 675 676 return ret; 677} 678 679/* This function reads data from SDIO card register. 680 */ 681static int 682mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data) 683{ 684 struct sdio_mmc_card *card = adapter->card; 685 int ret = -1; 686 u8 val; 687 688 sdio_claim_host(card->func); 689 val = sdio_readb(card->func, reg, &ret); 690 sdio_release_host(card->func); 691 692 *data = val; 693 694 return ret; 695} 696 697/* This function writes multiple data into SDIO card memory. 698 * 699 * This does not work in suspended mode. 700 */ 701static int 702mwifiex_write_data_sync(struct mwifiex_adapter *adapter, 703 u8 *buffer, u32 pkt_len, u32 port) 704{ 705 struct sdio_mmc_card *card = adapter->card; 706 int ret; 707 u8 blk_mode = 708 (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE; 709 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1; 710 u32 blk_cnt = 711 (blk_mode == 712 BLOCK_MODE) ? (pkt_len / 713 MWIFIEX_SDIO_BLOCK_SIZE) : pkt_len; 714 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK); 715 716 if (test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 717 mwifiex_dbg(adapter, ERROR, 718 "%s: not allowed while suspended\n", __func__); 719 return -1; 720 } 721 722 sdio_claim_host(card->func); 723 724 ret = sdio_writesb(card->func, ioport, buffer, blk_cnt * blk_size); 725 726 sdio_release_host(card->func); 727 728 return ret; 729} 730 731/* This function reads multiple data from SDIO card memory. 732 */ 733static int mwifiex_read_data_sync(struct mwifiex_adapter *adapter, u8 *buffer, 734 u32 len, u32 port, u8 claim) 735{ 736 struct sdio_mmc_card *card = adapter->card; 737 int ret; 738 u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE 739 : BLOCK_MODE; 740 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1; 741 u32 blk_cnt = (blk_mode == BLOCK_MODE) ? (len / MWIFIEX_SDIO_BLOCK_SIZE) 742 : len; 743 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK); 744 745 if (claim) 746 sdio_claim_host(card->func); 747 748 ret = sdio_readsb(card->func, buffer, ioport, blk_cnt * blk_size); 749 750 if (claim) 751 sdio_release_host(card->func); 752 753 return ret; 754} 755 756/* This function reads the firmware status. 757 */ 758static int 759mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat) 760{ 761 struct sdio_mmc_card *card = adapter->card; 762 const struct mwifiex_sdio_card_reg *reg = card->reg; 763 u8 fws0, fws1; 764 765 if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0)) 766 return -1; 767 768 if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1)) 769 return -1; 770 771 *dat = (u16)((fws1 << 8) | fws0); 772 return 0; 773} 774 775/* This function checks the firmware status in card. 776 */ 777static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter, 778 u32 poll_num) 779{ 780 struct sdio_mmc_card *card = adapter->card; 781 int ret = 0; 782 u16 firmware_stat = 0; 783 u32 tries; 784 785 for (tries = 0; tries < poll_num; tries++) { 786 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat); 787 if (ret) 788 continue; 789 if (firmware_stat == FIRMWARE_READY_SDIO) { 790 ret = 0; 791 break; 792 } 793 794 msleep(100); 795 ret = -1; 796 } 797 798 if (card->fw_ready_extra_delay && 799 firmware_stat == FIRMWARE_READY_SDIO) 800 /* firmware might pretend to be ready, when it's not. 801 * Wait a little bit more as a workaround. 802 */ 803 msleep(100); 804 805 return ret; 806} 807 808/* This function checks if WLAN is the winner. 809 */ 810static int mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 811{ 812 int ret = 0; 813 u8 winner = 0; 814 struct sdio_mmc_card *card = adapter->card; 815 816 if (mwifiex_read_reg(adapter, card->reg->status_reg_0, &winner)) 817 return -1; 818 819 if (winner) 820 adapter->winner = 0; 821 else 822 adapter->winner = 1; 823 824 return ret; 825} 826 827/* 828 * SDIO remove. 829 * 830 * This function removes the interface and frees up the card structure. 831 */ 832static void 833mwifiex_sdio_remove(struct sdio_func *func) 834{ 835 struct sdio_mmc_card *card; 836 struct mwifiex_adapter *adapter; 837 struct mwifiex_private *priv; 838 int ret = 0; 839 u16 firmware_stat; 840 841 card = sdio_get_drvdata(func); 842 if (!card) 843 return; 844 845 wait_for_completion(&card->fw_done); 846 847 adapter = card->adapter; 848 if (!adapter || !adapter->priv_num) 849 return; 850 851 mwifiex_dbg(adapter, INFO, "info: SDIO func num=%d\n", func->num); 852 853 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat); 854 if (!ret && firmware_stat == FIRMWARE_READY_SDIO && 855 !adapter->mfg_mode) { 856 mwifiex_deauthenticate_all(adapter); 857 858 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 859 mwifiex_disable_auto_ds(priv); 860 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 861 } 862 863 mwifiex_remove_card(adapter); 864} 865 866/* 867 * SDIO suspend. 868 * 869 * Kernel needs to suspend all functions separately. Therefore all 870 * registered functions must have drivers with suspend and resume 871 * methods. Failing that the kernel simply removes the whole card. 872 * 873 * If already not suspended, this function allocates and sends a host 874 * sleep activate request to the firmware and turns off the traffic. 875 */ 876static int mwifiex_sdio_suspend(struct device *dev) 877{ 878 struct sdio_func *func = dev_to_sdio_func(dev); 879 struct sdio_mmc_card *card; 880 struct mwifiex_adapter *adapter; 881 mmc_pm_flag_t pm_flag = 0; 882 int ret = 0; 883 884 pm_flag = sdio_get_host_pm_caps(func); 885 pr_debug("cmd: %s: suspend: PM flag = 0x%x\n", 886 sdio_func_id(func), pm_flag); 887 if (!(pm_flag & MMC_PM_KEEP_POWER)) { 888 dev_err(dev, "%s: cannot remain alive while host is" 889 " suspended\n", sdio_func_id(func)); 890 return -ENOSYS; 891 } 892 893 card = sdio_get_drvdata(func); 894 if (!card) { 895 dev_err(dev, "suspend: invalid card\n"); 896 return 0; 897 } 898 899 /* Might still be loading firmware */ 900 wait_for_completion(&card->fw_done); 901 902 adapter = card->adapter; 903 if (!adapter) { 904 dev_err(dev, "adapter is not valid\n"); 905 return 0; 906 } 907 908 if (!adapter->is_up) 909 return -EBUSY; 910 911 mwifiex_enable_wake(adapter); 912 913 /* Enable the Host Sleep */ 914 if (!mwifiex_enable_hs(adapter)) { 915 mwifiex_dbg(adapter, ERROR, 916 "cmd: failed to suspend\n"); 917 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 918 mwifiex_disable_wake(adapter); 919 return -EFAULT; 920 } 921 922 mwifiex_dbg(adapter, INFO, 923 "cmd: suspend with MMC_PM_KEEP_POWER\n"); 924 ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 925 926 /* Indicate device suspended */ 927 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 928 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 929 930 return ret; 931} 932 933static void mwifiex_sdio_coredump(struct device *dev) 934{ 935 struct sdio_func *func = dev_to_sdio_func(dev); 936 struct sdio_mmc_card *card; 937 938 card = sdio_get_drvdata(func); 939 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 940 &card->work_flags)) 941 schedule_work(&card->work); 942} 943 944/* WLAN IDs */ 945static const struct sdio_device_id mwifiex_ids[] = { 946 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786_WLAN), 947 .driver_data = (unsigned long) &mwifiex_sdio_sd8786}, 948 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787_WLAN), 949 .driver_data = (unsigned long) &mwifiex_sdio_sd8787}, 950 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797_WLAN), 951 .driver_data = (unsigned long) &mwifiex_sdio_sd8797}, 952 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8897_WLAN), 953 .driver_data = (unsigned long) &mwifiex_sdio_sd8897}, 954 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8887_WLAN), 955 .driver_data = (unsigned long)&mwifiex_sdio_sd8887}, 956 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8801_WLAN), 957 .driver_data = (unsigned long)&mwifiex_sdio_sd8801}, 958 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8977_WLAN), 959 .driver_data = (unsigned long)&mwifiex_sdio_sd8977}, 960 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8978_WLAN), 961 .driver_data = (unsigned long)&mwifiex_sdio_sd8978}, 962 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8987_WLAN), 963 .driver_data = (unsigned long)&mwifiex_sdio_sd8987}, 964 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997_WLAN), 965 .driver_data = (unsigned long)&mwifiex_sdio_sd8997}, 966 {}, 967}; 968 969MODULE_DEVICE_TABLE(sdio, mwifiex_ids); 970 971static const struct dev_pm_ops mwifiex_sdio_pm_ops = { 972 .suspend = mwifiex_sdio_suspend, 973 .resume = mwifiex_sdio_resume, 974}; 975 976static struct sdio_driver mwifiex_sdio = { 977 .name = "mwifiex_sdio", 978 .id_table = mwifiex_ids, 979 .probe = mwifiex_sdio_probe, 980 .remove = mwifiex_sdio_remove, 981 .drv = { 982 .owner = THIS_MODULE, 983 .coredump = mwifiex_sdio_coredump, 984 .pm = &mwifiex_sdio_pm_ops, 985 } 986}; 987 988/* 989 * This function wakes up the card. 990 * 991 * A host power up command is written to the card configuration 992 * register to wake up the card. 993 */ 994static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 995{ 996 mwifiex_dbg(adapter, EVENT, 997 "event: wakeup device...\n"); 998 999 return mwifiex_write_reg(adapter, CONFIGURATION_REG, HOST_POWER_UP); 1000} 1001 1002/* 1003 * This function is called after the card has woken up. 1004 * 1005 * The card configuration register is reset. 1006 */ 1007static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 1008{ 1009 mwifiex_dbg(adapter, EVENT, 1010 "cmd: wakeup device completed\n"); 1011 1012 return mwifiex_write_reg(adapter, CONFIGURATION_REG, 0); 1013} 1014 1015static int mwifiex_sdio_dnld_fw(struct mwifiex_adapter *adapter, 1016 struct mwifiex_fw_image *fw) 1017{ 1018 struct sdio_mmc_card *card = adapter->card; 1019 int ret; 1020 1021 sdio_claim_host(card->func); 1022 ret = mwifiex_dnld_fw(adapter, fw); 1023 sdio_release_host(card->func); 1024 1025 return ret; 1026} 1027 1028/* 1029 * This function is used to initialize IO ports for the 1030 * chipsets supporting SDIO new mode eg SD8897. 1031 */ 1032static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter) 1033{ 1034 u8 reg; 1035 struct sdio_mmc_card *card = adapter->card; 1036 1037 adapter->ioport = MEM_PORT; 1038 1039 /* enable sdio new mode */ 1040 if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®)) 1041 return -1; 1042 if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg, 1043 reg | CMD53_NEW_MODE)) 1044 return -1; 1045 1046 /* Configure cmd port and enable reading rx length from the register */ 1047 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®)) 1048 return -1; 1049 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0, 1050 reg | CMD_PORT_RD_LEN_EN)) 1051 return -1; 1052 1053 /* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is 1054 * completed 1055 */ 1056 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®)) 1057 return -1; 1058 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1, 1059 reg | CMD_PORT_AUTO_EN)) 1060 return -1; 1061 1062 return 0; 1063} 1064 1065/* This function initializes the IO ports. 1066 * 1067 * The following operations are performed - 1068 * - Read the IO ports (0, 1 and 2) 1069 * - Set host interrupt Reset-To-Read to clear 1070 * - Set auto re-enable interrupt 1071 */ 1072static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter) 1073{ 1074 u8 reg; 1075 struct sdio_mmc_card *card = adapter->card; 1076 1077 adapter->ioport = 0; 1078 1079 if (card->supports_sdio_new_mode) { 1080 if (mwifiex_init_sdio_new_mode(adapter)) 1081 return -1; 1082 goto cont; 1083 } 1084 1085 /* Read the IO port */ 1086 if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®)) 1087 adapter->ioport |= (reg & 0xff); 1088 else 1089 return -1; 1090 1091 if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®)) 1092 adapter->ioport |= ((reg & 0xff) << 8); 1093 else 1094 return -1; 1095 1096 if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®)) 1097 adapter->ioport |= ((reg & 0xff) << 16); 1098 else 1099 return -1; 1100cont: 1101 mwifiex_dbg(adapter, INFO, 1102 "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport); 1103 1104 /* Set Host interrupt reset to read to clear */ 1105 if (mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®)) 1106 return -1; 1107 if (mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg, 1108 reg | card->reg->sdio_int_mask)) 1109 return -1; 1110 1111 /* Dnld/Upld ready set to auto reset */ 1112 if (mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, ®)) 1113 return -1; 1114 if (mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg, 1115 reg | AUTO_RE_ENABLE_INT)) 1116 return -1; 1117 1118 return 0; 1119} 1120 1121/* 1122 * This function sends data to the card. 1123 */ 1124static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter, 1125 u8 *payload, u32 pkt_len, u32 port) 1126{ 1127 u32 i = 0; 1128 int ret; 1129 1130 do { 1131 ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port); 1132 if (ret) { 1133 i++; 1134 mwifiex_dbg(adapter, ERROR, 1135 "host_to_card, write iomem\t" 1136 "(%d) failed: %d\n", i, ret); 1137 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04)) 1138 mwifiex_dbg(adapter, ERROR, 1139 "write CFG reg failed\n"); 1140 1141 ret = -1; 1142 if (i > MAX_WRITE_IOMEM_RETRY) 1143 return ret; 1144 } 1145 } while (ret == -1); 1146 1147 return ret; 1148} 1149 1150/* 1151 * This function gets the read port. 1152 * 1153 * If control port bit is set in MP read bitmap, the control port 1154 * is returned, otherwise the current read port is returned and 1155 * the value is increased (provided it does not reach the maximum 1156 * limit, in which case it is reset to 1) 1157 */ 1158static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port) 1159{ 1160 struct sdio_mmc_card *card = adapter->card; 1161 const struct mwifiex_sdio_card_reg *reg = card->reg; 1162 u32 rd_bitmap = card->mp_rd_bitmap; 1163 1164 mwifiex_dbg(adapter, DATA, 1165 "data: mp_rd_bitmap=0x%08x\n", rd_bitmap); 1166 1167 if (card->supports_sdio_new_mode) { 1168 if (!(rd_bitmap & reg->data_port_mask)) 1169 return -1; 1170 } else { 1171 if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask))) 1172 return -1; 1173 } 1174 1175 if ((card->has_control_mask) && 1176 (card->mp_rd_bitmap & CTRL_PORT_MASK)) { 1177 card->mp_rd_bitmap &= (u32) (~CTRL_PORT_MASK); 1178 *port = CTRL_PORT; 1179 mwifiex_dbg(adapter, DATA, 1180 "data: port=%d mp_rd_bitmap=0x%08x\n", 1181 *port, card->mp_rd_bitmap); 1182 return 0; 1183 } 1184 1185 if (!(card->mp_rd_bitmap & (1 << card->curr_rd_port))) 1186 return -1; 1187 1188 /* We are now handling the SDIO data ports */ 1189 card->mp_rd_bitmap &= (u32)(~(1 << card->curr_rd_port)); 1190 *port = card->curr_rd_port; 1191 1192 if (++card->curr_rd_port == card->max_ports) 1193 card->curr_rd_port = reg->start_rd_port; 1194 1195 mwifiex_dbg(adapter, DATA, 1196 "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n", 1197 *port, rd_bitmap, card->mp_rd_bitmap); 1198 1199 return 0; 1200} 1201 1202/* 1203 * This function gets the write port for data. 1204 * 1205 * The current write port is returned if available and the value is 1206 * increased (provided it does not reach the maximum limit, in which 1207 * case it is reset to 1) 1208 */ 1209static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port) 1210{ 1211 struct sdio_mmc_card *card = adapter->card; 1212 const struct mwifiex_sdio_card_reg *reg = card->reg; 1213 u32 wr_bitmap = card->mp_wr_bitmap; 1214 1215 mwifiex_dbg(adapter, DATA, 1216 "data: mp_wr_bitmap=0x%08x\n", wr_bitmap); 1217 1218 if (!(wr_bitmap & card->mp_data_port_mask)) { 1219 adapter->data_sent = true; 1220 return -EBUSY; 1221 } 1222 1223 if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) { 1224 card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port)); 1225 *port = card->curr_wr_port; 1226 if (++card->curr_wr_port == card->mp_end_port) 1227 card->curr_wr_port = reg->start_wr_port; 1228 } else { 1229 adapter->data_sent = true; 1230 return -EBUSY; 1231 } 1232 1233 if ((card->has_control_mask) && (*port == CTRL_PORT)) { 1234 mwifiex_dbg(adapter, ERROR, 1235 "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n", 1236 *port, card->curr_wr_port, wr_bitmap, 1237 card->mp_wr_bitmap); 1238 return -1; 1239 } 1240 1241 mwifiex_dbg(adapter, DATA, 1242 "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n", 1243 *port, wr_bitmap, card->mp_wr_bitmap); 1244 1245 return 0; 1246} 1247 1248/* 1249 * This function polls the card status. 1250 */ 1251static int 1252mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits) 1253{ 1254 struct sdio_mmc_card *card = adapter->card; 1255 u32 tries; 1256 u8 cs; 1257 1258 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1259 if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs)) 1260 break; 1261 else if ((cs & bits) == bits) 1262 return 0; 1263 1264 usleep_range(10, 20); 1265 } 1266 1267 mwifiex_dbg(adapter, ERROR, 1268 "poll card status failed, tries = %d\n", tries); 1269 1270 return -1; 1271} 1272 1273/* 1274 * This function disables the host interrupt. 1275 * 1276 * The host interrupt mask is read, the disable bit is reset and 1277 * written back to the card host interrupt mask register. 1278 */ 1279static void mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter) 1280{ 1281 struct sdio_mmc_card *card = adapter->card; 1282 struct sdio_func *func = card->func; 1283 1284 sdio_claim_host(func); 1285 mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0); 1286 sdio_release_irq(func); 1287 sdio_release_host(func); 1288} 1289 1290/* 1291 * This function reads the interrupt status from card. 1292 */ 1293static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter) 1294{ 1295 struct sdio_mmc_card *card = adapter->card; 1296 u8 sdio_ireg; 1297 unsigned long flags; 1298 1299 if (mwifiex_read_data_sync(adapter, card->mp_regs, 1300 card->reg->max_mp_regs, 1301 REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) { 1302 mwifiex_dbg(adapter, ERROR, "read mp_regs failed\n"); 1303 return; 1304 } 1305 1306 sdio_ireg = card->mp_regs[card->reg->host_int_status_reg]; 1307 if (sdio_ireg) { 1308 /* 1309 * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS 1310 * For SDIO new mode CMD port interrupts 1311 * DN_LD_CMD_PORT_HOST_INT_STATUS and/or 1312 * UP_LD_CMD_PORT_HOST_INT_STATUS 1313 * Clear the interrupt status register 1314 */ 1315 mwifiex_dbg(adapter, INTR, 1316 "int: sdio_ireg = %#x\n", sdio_ireg); 1317 spin_lock_irqsave(&adapter->int_lock, flags); 1318 adapter->int_status |= sdio_ireg; 1319 spin_unlock_irqrestore(&adapter->int_lock, flags); 1320 } 1321} 1322 1323/* 1324 * SDIO interrupt handler. 1325 * 1326 * This function reads the interrupt status from firmware and handles 1327 * the interrupt in current thread (ksdioirqd) right away. 1328 */ 1329static void 1330mwifiex_sdio_interrupt(struct sdio_func *func) 1331{ 1332 struct mwifiex_adapter *adapter; 1333 struct sdio_mmc_card *card; 1334 1335 card = sdio_get_drvdata(func); 1336 if (!card || !card->adapter) { 1337 pr_err("int: func=%p card=%p adapter=%p\n", 1338 func, card, card ? card->adapter : NULL); 1339 return; 1340 } 1341 adapter = card->adapter; 1342 1343 if (!adapter->pps_uapsd_mode && adapter->ps_state == PS_STATE_SLEEP) 1344 adapter->ps_state = PS_STATE_AWAKE; 1345 1346 mwifiex_interrupt_status(adapter); 1347 mwifiex_main_process(adapter); 1348} 1349 1350/* 1351 * This function enables the host interrupt. 1352 * 1353 * The host interrupt enable mask is written to the card 1354 * host interrupt mask register. 1355 */ 1356static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter) 1357{ 1358 struct sdio_mmc_card *card = adapter->card; 1359 struct sdio_func *func = card->func; 1360 int ret; 1361 1362 sdio_claim_host(func); 1363 1364 /* Request the SDIO IRQ */ 1365 ret = sdio_claim_irq(func, mwifiex_sdio_interrupt); 1366 if (ret) { 1367 mwifiex_dbg(adapter, ERROR, 1368 "claim irq failed: ret=%d\n", ret); 1369 goto out; 1370 } 1371 1372 /* Simply write the mask to the register */ 1373 ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 1374 card->reg->host_int_enable); 1375 if (ret) { 1376 mwifiex_dbg(adapter, ERROR, 1377 "enable host interrupt failed\n"); 1378 sdio_release_irq(func); 1379 } 1380 1381out: 1382 sdio_release_host(func); 1383 return ret; 1384} 1385 1386/* 1387 * This function sends a data buffer to the card. 1388 */ 1389static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter, 1390 u32 *type, u8 *buffer, 1391 u32 npayload, u32 ioport) 1392{ 1393 int ret; 1394 u32 nb; 1395 1396 if (!buffer) { 1397 mwifiex_dbg(adapter, ERROR, 1398 "%s: buffer is NULL\n", __func__); 1399 return -1; 1400 } 1401 1402 ret = mwifiex_read_data_sync(adapter, buffer, npayload, ioport, 1); 1403 1404 if (ret) { 1405 mwifiex_dbg(adapter, ERROR, 1406 "%s: read iomem failed: %d\n", __func__, 1407 ret); 1408 return -1; 1409 } 1410 1411 nb = get_unaligned_le16((buffer)); 1412 if (nb > npayload) { 1413 mwifiex_dbg(adapter, ERROR, 1414 "%s: invalid packet, nb=%d npayload=%d\n", 1415 __func__, nb, npayload); 1416 return -1; 1417 } 1418 1419 *type = get_unaligned_le16((buffer + 2)); 1420 1421 return ret; 1422} 1423 1424/* 1425 * This function downloads the firmware to the card. 1426 * 1427 * Firmware is downloaded to the card in blocks. Every block download 1428 * is tested for CRC errors, and retried a number of times before 1429 * returning failure. 1430 */ 1431static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 1432 struct mwifiex_fw_image *fw) 1433{ 1434 struct sdio_mmc_card *card = adapter->card; 1435 const struct mwifiex_sdio_card_reg *reg = card->reg; 1436 int ret; 1437 u8 *firmware = fw->fw_buf; 1438 u32 firmware_len = fw->fw_len; 1439 u32 offset = 0; 1440 u8 base0, base1; 1441 u8 *fwbuf; 1442 u16 len = 0; 1443 u32 txlen, tx_blocks = 0, tries; 1444 u32 i = 0; 1445 1446 if (!firmware_len) { 1447 mwifiex_dbg(adapter, ERROR, 1448 "firmware image not found! Terminating download\n"); 1449 return -1; 1450 } 1451 1452 mwifiex_dbg(adapter, INFO, 1453 "info: downloading FW image (%d bytes)\n", 1454 firmware_len); 1455 1456 /* Assume that the allocated buffer is 8-byte aligned */ 1457 fwbuf = kzalloc(MWIFIEX_UPLD_SIZE, GFP_KERNEL); 1458 if (!fwbuf) 1459 return -ENOMEM; 1460 1461 sdio_claim_host(card->func); 1462 1463 /* Perform firmware data transfer */ 1464 do { 1465 /* The host polls for the DN_LD_CARD_RDY and CARD_IO_READY 1466 bits */ 1467 ret = mwifiex_sdio_poll_card_status(adapter, CARD_IO_READY | 1468 DN_LD_CARD_RDY); 1469 if (ret) { 1470 mwifiex_dbg(adapter, ERROR, 1471 "FW download with helper:\t" 1472 "poll status timeout @ %d\n", offset); 1473 goto done; 1474 } 1475 1476 /* More data? */ 1477 if (offset >= firmware_len) 1478 break; 1479 1480 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1481 ret = mwifiex_read_reg(adapter, reg->base_0_reg, 1482 &base0); 1483 if (ret) { 1484 mwifiex_dbg(adapter, ERROR, 1485 "dev BASE0 register read failed:\t" 1486 "base0=%#04X(%d). Terminating dnld\n", 1487 base0, base0); 1488 goto done; 1489 } 1490 ret = mwifiex_read_reg(adapter, reg->base_1_reg, 1491 &base1); 1492 if (ret) { 1493 mwifiex_dbg(adapter, ERROR, 1494 "dev BASE1 register read failed:\t" 1495 "base1=%#04X(%d). Terminating dnld\n", 1496 base1, base1); 1497 goto done; 1498 } 1499 len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff)); 1500 1501 if (len) 1502 break; 1503 1504 usleep_range(10, 20); 1505 } 1506 1507 if (!len) { 1508 break; 1509 } else if (len > MWIFIEX_UPLD_SIZE) { 1510 mwifiex_dbg(adapter, ERROR, 1511 "FW dnld failed @ %d, invalid length %d\n", 1512 offset, len); 1513 ret = -1; 1514 goto done; 1515 } 1516 1517 txlen = len; 1518 1519 if (len & BIT(0)) { 1520 i++; 1521 if (i > MAX_WRITE_IOMEM_RETRY) { 1522 mwifiex_dbg(adapter, ERROR, 1523 "FW dnld failed @ %d, over max retry\n", 1524 offset); 1525 ret = -1; 1526 goto done; 1527 } 1528 mwifiex_dbg(adapter, ERROR, 1529 "CRC indicated by the helper:\t" 1530 "len = 0x%04X, txlen = %d\n", len, txlen); 1531 len &= ~BIT(0); 1532 /* Setting this to 0 to resend from same offset */ 1533 txlen = 0; 1534 } else { 1535 i = 0; 1536 1537 /* Set blocksize to transfer - checking for last 1538 block */ 1539 if (firmware_len - offset < txlen) 1540 txlen = firmware_len - offset; 1541 1542 tx_blocks = (txlen + MWIFIEX_SDIO_BLOCK_SIZE - 1) 1543 / MWIFIEX_SDIO_BLOCK_SIZE; 1544 1545 /* Copy payload to buffer */ 1546 memmove(fwbuf, &firmware[offset], txlen); 1547 } 1548 1549 ret = mwifiex_write_data_sync(adapter, fwbuf, tx_blocks * 1550 MWIFIEX_SDIO_BLOCK_SIZE, 1551 adapter->ioport); 1552 if (ret) { 1553 mwifiex_dbg(adapter, ERROR, 1554 "FW download, write iomem (%d) failed @ %d\n", 1555 i, offset); 1556 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04)) 1557 mwifiex_dbg(adapter, ERROR, 1558 "write CFG reg failed\n"); 1559 1560 ret = -1; 1561 goto done; 1562 } 1563 1564 offset += txlen; 1565 } while (true); 1566 1567 mwifiex_dbg(adapter, MSG, 1568 "info: FW download over, size %d bytes\n", offset); 1569 1570 ret = 0; 1571done: 1572 sdio_release_host(card->func); 1573 kfree(fwbuf); 1574 return ret; 1575} 1576 1577/* 1578 * This function decodes sdio aggregation pkt. 1579 * 1580 * Based on the data block size and pkt_len, 1581 * skb data will be decoded to few packets. 1582 */ 1583static void mwifiex_deaggr_sdio_pkt(struct mwifiex_adapter *adapter, 1584 struct sk_buff *skb) 1585{ 1586 u32 total_pkt_len, pkt_len; 1587 struct sk_buff *skb_deaggr; 1588 u16 blk_size; 1589 u8 blk_num; 1590 u8 *data; 1591 1592 data = skb->data; 1593 total_pkt_len = skb->len; 1594 1595 while (total_pkt_len >= (SDIO_HEADER_OFFSET + adapter->intf_hdr_len)) { 1596 if (total_pkt_len < adapter->sdio_rx_block_size) 1597 break; 1598 blk_num = *(data + BLOCK_NUMBER_OFFSET); 1599 blk_size = adapter->sdio_rx_block_size * blk_num; 1600 if (blk_size > total_pkt_len) { 1601 mwifiex_dbg(adapter, ERROR, 1602 "%s: error in blk_size,\t" 1603 "blk_num=%d, blk_size=%d, total_pkt_len=%d\n", 1604 __func__, blk_num, blk_size, total_pkt_len); 1605 break; 1606 } 1607 pkt_len = get_unaligned_le16((data + 1608 SDIO_HEADER_OFFSET)); 1609 if ((pkt_len + SDIO_HEADER_OFFSET) > blk_size) { 1610 mwifiex_dbg(adapter, ERROR, 1611 "%s: error in pkt_len,\t" 1612 "pkt_len=%d, blk_size=%d\n", 1613 __func__, pkt_len, blk_size); 1614 break; 1615 } 1616 1617 skb_deaggr = mwifiex_alloc_dma_align_buf(pkt_len, GFP_KERNEL); 1618 if (!skb_deaggr) 1619 break; 1620 skb_put(skb_deaggr, pkt_len); 1621 memcpy(skb_deaggr->data, data + SDIO_HEADER_OFFSET, pkt_len); 1622 skb_pull(skb_deaggr, adapter->intf_hdr_len); 1623 1624 mwifiex_handle_rx_packet(adapter, skb_deaggr); 1625 data += blk_size; 1626 total_pkt_len -= blk_size; 1627 } 1628} 1629 1630/* 1631 * This function decodes a received packet. 1632 * 1633 * Based on the type, the packet is treated as either a data, or 1634 * a command response, or an event, and the correct handler 1635 * function is invoked. 1636 */ 1637static int mwifiex_decode_rx_packet(struct mwifiex_adapter *adapter, 1638 struct sk_buff *skb, u32 upld_typ) 1639{ 1640 u8 *cmd_buf; 1641 u16 pkt_len; 1642 struct mwifiex_rxinfo *rx_info; 1643 1644 pkt_len = get_unaligned_le16(skb->data); 1645 1646 if (upld_typ != MWIFIEX_TYPE_AGGR_DATA) { 1647 skb_trim(skb, pkt_len); 1648 skb_pull(skb, adapter->intf_hdr_len); 1649 } 1650 1651 switch (upld_typ) { 1652 case MWIFIEX_TYPE_AGGR_DATA: 1653 mwifiex_dbg(adapter, INFO, 1654 "info: --- Rx: Aggr Data packet ---\n"); 1655 rx_info = MWIFIEX_SKB_RXCB(skb); 1656 rx_info->buf_type = MWIFIEX_TYPE_AGGR_DATA; 1657 if (adapter->rx_work_enabled) { 1658 skb_queue_tail(&adapter->rx_data_q, skb); 1659 atomic_inc(&adapter->rx_pending); 1660 adapter->data_received = true; 1661 } else { 1662 mwifiex_deaggr_sdio_pkt(adapter, skb); 1663 dev_kfree_skb_any(skb); 1664 } 1665 break; 1666 1667 case MWIFIEX_TYPE_DATA: 1668 mwifiex_dbg(adapter, DATA, 1669 "info: --- Rx: Data packet ---\n"); 1670 if (adapter->rx_work_enabled) { 1671 skb_queue_tail(&adapter->rx_data_q, skb); 1672 adapter->data_received = true; 1673 atomic_inc(&adapter->rx_pending); 1674 } else { 1675 mwifiex_handle_rx_packet(adapter, skb); 1676 } 1677 break; 1678 1679 case MWIFIEX_TYPE_CMD: 1680 mwifiex_dbg(adapter, CMD, 1681 "info: --- Rx: Cmd Response ---\n"); 1682 /* take care of curr_cmd = NULL case */ 1683 if (!adapter->curr_cmd) { 1684 cmd_buf = adapter->upld_buf; 1685 1686 if (adapter->ps_state == PS_STATE_SLEEP_CFM) 1687 mwifiex_process_sleep_confirm_resp(adapter, 1688 skb->data, 1689 skb->len); 1690 1691 memcpy(cmd_buf, skb->data, 1692 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, 1693 skb->len)); 1694 1695 dev_kfree_skb_any(skb); 1696 } else { 1697 adapter->cmd_resp_received = true; 1698 adapter->curr_cmd->resp_skb = skb; 1699 } 1700 break; 1701 1702 case MWIFIEX_TYPE_EVENT: 1703 mwifiex_dbg(adapter, EVENT, 1704 "info: --- Rx: Event ---\n"); 1705 adapter->event_cause = get_unaligned_le32(skb->data); 1706 1707 if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE)) 1708 memcpy(adapter->event_body, 1709 skb->data + MWIFIEX_EVENT_HEADER_LEN, 1710 skb->len); 1711 1712 /* event cause has been saved to adapter->event_cause */ 1713 adapter->event_received = true; 1714 adapter->event_skb = skb; 1715 1716 break; 1717 1718 default: 1719 mwifiex_dbg(adapter, ERROR, 1720 "unknown upload type %#x\n", upld_typ); 1721 dev_kfree_skb_any(skb); 1722 break; 1723 } 1724 1725 return 0; 1726} 1727 1728/* 1729 * This function transfers received packets from card to driver, performing 1730 * aggregation if required. 1731 * 1732 * For data received on control port, or if aggregation is disabled, the 1733 * received buffers are uploaded as separate packets. However, if aggregation 1734 * is enabled and required, the buffers are copied onto an aggregation buffer, 1735 * provided there is space left, processed and finally uploaded. 1736 */ 1737static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter, 1738 u16 rx_len, u8 port) 1739{ 1740 struct sdio_mmc_card *card = adapter->card; 1741 s32 f_do_rx_aggr = 0; 1742 s32 f_do_rx_cur = 0; 1743 s32 f_aggr_cur = 0; 1744 s32 f_post_aggr_cur = 0; 1745 struct sk_buff *skb_deaggr; 1746 struct sk_buff *skb = NULL; 1747 u32 pkt_len, pkt_type, mport, pind; 1748 u8 *curr_ptr; 1749 1750 if ((card->has_control_mask) && (port == CTRL_PORT)) { 1751 /* Read the command Resp without aggr */ 1752 mwifiex_dbg(adapter, CMD, 1753 "info: %s: no aggregation for cmd\t" 1754 "response\n", __func__); 1755 1756 f_do_rx_cur = 1; 1757 goto rx_curr_single; 1758 } 1759 1760 if (!card->mpa_rx.enabled) { 1761 mwifiex_dbg(adapter, WARN, 1762 "info: %s: rx aggregation disabled\n", 1763 __func__); 1764 1765 f_do_rx_cur = 1; 1766 goto rx_curr_single; 1767 } 1768 1769 if ((!card->has_control_mask && (card->mp_rd_bitmap & 1770 card->reg->data_port_mask)) || 1771 (card->has_control_mask && (card->mp_rd_bitmap & 1772 (~((u32) CTRL_PORT_MASK))))) { 1773 /* Some more data RX pending */ 1774 mwifiex_dbg(adapter, INFO, 1775 "info: %s: not last packet\n", __func__); 1776 1777 if (MP_RX_AGGR_IN_PROGRESS(card)) { 1778 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) { 1779 f_aggr_cur = 1; 1780 } else { 1781 /* No room in Aggr buf, do rx aggr now */ 1782 f_do_rx_aggr = 1; 1783 f_post_aggr_cur = 1; 1784 } 1785 } else { 1786 /* Rx aggr not in progress */ 1787 f_aggr_cur = 1; 1788 } 1789 1790 } else { 1791 /* No more data RX pending */ 1792 mwifiex_dbg(adapter, INFO, 1793 "info: %s: last packet\n", __func__); 1794 1795 if (MP_RX_AGGR_IN_PROGRESS(card)) { 1796 f_do_rx_aggr = 1; 1797 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) 1798 f_aggr_cur = 1; 1799 else 1800 /* No room in Aggr buf, do rx aggr now */ 1801 f_do_rx_cur = 1; 1802 } else { 1803 f_do_rx_cur = 1; 1804 } 1805 } 1806 1807 if (f_aggr_cur) { 1808 mwifiex_dbg(adapter, INFO, 1809 "info: current packet aggregation\n"); 1810 /* Curr pkt can be aggregated */ 1811 mp_rx_aggr_setup(card, rx_len, port); 1812 1813 if (MP_RX_AGGR_PKT_LIMIT_REACHED(card) || 1814 mp_rx_aggr_port_limit_reached(card)) { 1815 mwifiex_dbg(adapter, INFO, 1816 "info: %s: aggregated packet\t" 1817 "limit reached\n", __func__); 1818 /* No more pkts allowed in Aggr buf, rx it */ 1819 f_do_rx_aggr = 1; 1820 } 1821 } 1822 1823 if (f_do_rx_aggr) { 1824 /* do aggr RX now */ 1825 mwifiex_dbg(adapter, DATA, 1826 "info: do_rx_aggr: num of packets: %d\n", 1827 card->mpa_rx.pkt_cnt); 1828 1829 if (card->supports_sdio_new_mode) { 1830 int i; 1831 u32 port_count; 1832 1833 for (i = 0, port_count = 0; i < card->max_ports; i++) 1834 if (card->mpa_rx.ports & BIT(i)) 1835 port_count++; 1836 1837 /* Reading data from "start_port + 0" to "start_port + 1838 * port_count -1", so decrease the count by 1 1839 */ 1840 port_count--; 1841 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1842 (port_count << 8)) + card->mpa_rx.start_port; 1843 } else { 1844 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1845 (card->mpa_rx.ports << 4)) + 1846 card->mpa_rx.start_port; 1847 } 1848 1849 if (card->mpa_rx.pkt_cnt == 1) 1850 mport = adapter->ioport + card->mpa_rx.start_port; 1851 1852 if (mwifiex_read_data_sync(adapter, card->mpa_rx.buf, 1853 card->mpa_rx.buf_len, mport, 1)) 1854 goto error; 1855 1856 curr_ptr = card->mpa_rx.buf; 1857 1858 for (pind = 0; pind < card->mpa_rx.pkt_cnt; pind++) { 1859 u32 *len_arr = card->mpa_rx.len_arr; 1860 1861 /* get curr PKT len & type */ 1862 pkt_len = get_unaligned_le16(&curr_ptr[0]); 1863 pkt_type = get_unaligned_le16(&curr_ptr[2]); 1864 1865 /* copy pkt to deaggr buf */ 1866 skb_deaggr = mwifiex_alloc_dma_align_buf(len_arr[pind], 1867 GFP_KERNEL); 1868 if (!skb_deaggr) { 1869 mwifiex_dbg(adapter, ERROR, "skb allocation failure\t" 1870 "drop pkt len=%d type=%d\n", 1871 pkt_len, pkt_type); 1872 curr_ptr += len_arr[pind]; 1873 continue; 1874 } 1875 1876 skb_put(skb_deaggr, len_arr[pind]); 1877 1878 if ((pkt_type == MWIFIEX_TYPE_DATA || 1879 (pkt_type == MWIFIEX_TYPE_AGGR_DATA && 1880 adapter->sdio_rx_aggr_enable)) && 1881 (pkt_len <= len_arr[pind])) { 1882 1883 memcpy(skb_deaggr->data, curr_ptr, pkt_len); 1884 1885 skb_trim(skb_deaggr, pkt_len); 1886 1887 /* Process de-aggr packet */ 1888 mwifiex_decode_rx_packet(adapter, skb_deaggr, 1889 pkt_type); 1890 } else { 1891 mwifiex_dbg(adapter, ERROR, 1892 "drop wrong aggr pkt:\t" 1893 "sdio_single_port_rx_aggr=%d\t" 1894 "type=%d len=%d max_len=%d\n", 1895 adapter->sdio_rx_aggr_enable, 1896 pkt_type, pkt_len, len_arr[pind]); 1897 dev_kfree_skb_any(skb_deaggr); 1898 } 1899 curr_ptr += len_arr[pind]; 1900 } 1901 MP_RX_AGGR_BUF_RESET(card); 1902 } 1903 1904rx_curr_single: 1905 if (f_do_rx_cur) { 1906 mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n", 1907 port, rx_len); 1908 1909 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL); 1910 if (!skb) { 1911 mwifiex_dbg(adapter, ERROR, 1912 "single skb allocated fail,\t" 1913 "drop pkt port=%d len=%d\n", port, rx_len); 1914 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, 1915 card->mpa_rx.buf, rx_len, 1916 adapter->ioport + port)) 1917 goto error; 1918 return 0; 1919 } 1920 1921 skb_put(skb, rx_len); 1922 1923 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, 1924 skb->data, skb->len, 1925 adapter->ioport + port)) 1926 goto error; 1927 if (!adapter->sdio_rx_aggr_enable && 1928 pkt_type == MWIFIEX_TYPE_AGGR_DATA) { 1929 mwifiex_dbg(adapter, ERROR, "drop wrong pkt type %d\t" 1930 "current SDIO RX Aggr not enabled\n", 1931 pkt_type); 1932 dev_kfree_skb_any(skb); 1933 return 0; 1934 } 1935 1936 mwifiex_decode_rx_packet(adapter, skb, pkt_type); 1937 } 1938 if (f_post_aggr_cur) { 1939 mwifiex_dbg(adapter, INFO, 1940 "info: current packet aggregation\n"); 1941 /* Curr pkt can be aggregated */ 1942 mp_rx_aggr_setup(card, rx_len, port); 1943 } 1944 1945 return 0; 1946error: 1947 if (MP_RX_AGGR_IN_PROGRESS(card)) 1948 MP_RX_AGGR_BUF_RESET(card); 1949 1950 if (f_do_rx_cur && skb) 1951 /* Single transfer pending. Free curr buff also */ 1952 dev_kfree_skb_any(skb); 1953 1954 return -1; 1955} 1956 1957/* 1958 * This function checks the current interrupt status. 1959 * 1960 * The following interrupts are checked and handled by this function - 1961 * - Data sent 1962 * - Command sent 1963 * - Packets received 1964 * 1965 * Since the firmware does not generate download ready interrupt if the 1966 * port updated is command port only, command sent interrupt checking 1967 * should be done manually, and for every SDIO interrupt. 1968 * 1969 * In case of Rx packets received, the packets are uploaded from card to 1970 * host and processed accordingly. 1971 */ 1972static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 1973{ 1974 struct sdio_mmc_card *card = adapter->card; 1975 const struct mwifiex_sdio_card_reg *reg = card->reg; 1976 int ret = 0; 1977 u8 sdio_ireg; 1978 struct sk_buff *skb; 1979 u8 port = CTRL_PORT; 1980 u32 len_reg_l, len_reg_u; 1981 u32 rx_blocks; 1982 u16 rx_len; 1983 unsigned long flags; 1984 u32 bitmap; 1985 u8 cr; 1986 1987 spin_lock_irqsave(&adapter->int_lock, flags); 1988 sdio_ireg = adapter->int_status; 1989 adapter->int_status = 0; 1990 spin_unlock_irqrestore(&adapter->int_lock, flags); 1991 1992 if (!sdio_ireg) 1993 return ret; 1994 1995 /* Following interrupt is only for SDIO new mode */ 1996 if (sdio_ireg & DN_LD_CMD_PORT_HOST_INT_STATUS && adapter->cmd_sent) 1997 adapter->cmd_sent = false; 1998 1999 /* Following interrupt is only for SDIO new mode */ 2000 if (sdio_ireg & UP_LD_CMD_PORT_HOST_INT_STATUS) { 2001 u32 pkt_type; 2002 2003 /* read the len of control packet */ 2004 rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8; 2005 rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0]; 2006 rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE); 2007 if (rx_len <= adapter->intf_hdr_len || 2008 (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) > 2009 MWIFIEX_RX_DATA_BUF_SIZE) 2010 return -1; 2011 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE); 2012 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", rx_len); 2013 2014 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL); 2015 if (!skb) 2016 return -1; 2017 2018 skb_put(skb, rx_len); 2019 2020 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, skb->data, 2021 skb->len, adapter->ioport | 2022 CMD_PORT_SLCT)) { 2023 mwifiex_dbg(adapter, ERROR, 2024 "%s: failed to card_to_host", __func__); 2025 dev_kfree_skb_any(skb); 2026 goto term_cmd; 2027 } 2028 2029 if ((pkt_type != MWIFIEX_TYPE_CMD) && 2030 (pkt_type != MWIFIEX_TYPE_EVENT)) 2031 mwifiex_dbg(adapter, ERROR, 2032 "%s:Received wrong packet on cmd port", 2033 __func__); 2034 2035 mwifiex_decode_rx_packet(adapter, skb, pkt_type); 2036 } 2037 2038 if (sdio_ireg & DN_LD_HOST_INT_STATUS) { 2039 bitmap = (u32) card->mp_regs[reg->wr_bitmap_l]; 2040 bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8; 2041 if (card->supports_sdio_new_mode) { 2042 bitmap |= 2043 ((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16; 2044 bitmap |= 2045 ((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24; 2046 } 2047 card->mp_wr_bitmap = bitmap; 2048 2049 mwifiex_dbg(adapter, INTR, 2050 "int: DNLD: wr_bitmap=0x%x\n", 2051 card->mp_wr_bitmap); 2052 if (adapter->data_sent && 2053 (card->mp_wr_bitmap & card->mp_data_port_mask)) { 2054 mwifiex_dbg(adapter, INTR, 2055 "info: <--- Tx DONE Interrupt --->\n"); 2056 adapter->data_sent = false; 2057 } 2058 } 2059 2060 /* As firmware will not generate download ready interrupt if the port 2061 updated is command port only, cmd_sent should be done for any SDIO 2062 interrupt. */ 2063 if (card->has_control_mask && adapter->cmd_sent) { 2064 /* Check if firmware has attach buffer at command port and 2065 update just that in wr_bit_map. */ 2066 card->mp_wr_bitmap |= 2067 (u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK; 2068 if (card->mp_wr_bitmap & CTRL_PORT_MASK) 2069 adapter->cmd_sent = false; 2070 } 2071 2072 mwifiex_dbg(adapter, INTR, "info: cmd_sent=%d data_sent=%d\n", 2073 adapter->cmd_sent, adapter->data_sent); 2074 if (sdio_ireg & UP_LD_HOST_INT_STATUS) { 2075 bitmap = (u32) card->mp_regs[reg->rd_bitmap_l]; 2076 bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8; 2077 if (card->supports_sdio_new_mode) { 2078 bitmap |= 2079 ((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16; 2080 bitmap |= 2081 ((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24; 2082 } 2083 card->mp_rd_bitmap = bitmap; 2084 mwifiex_dbg(adapter, INTR, 2085 "int: UPLD: rd_bitmap=0x%x\n", 2086 card->mp_rd_bitmap); 2087 2088 while (true) { 2089 ret = mwifiex_get_rd_port(adapter, &port); 2090 if (ret) { 2091 mwifiex_dbg(adapter, INFO, 2092 "info: no more rd_port available\n"); 2093 break; 2094 } 2095 len_reg_l = reg->rd_len_p0_l + (port << 1); 2096 len_reg_u = reg->rd_len_p0_u + (port << 1); 2097 rx_len = ((u16) card->mp_regs[len_reg_u]) << 8; 2098 rx_len |= (u16) card->mp_regs[len_reg_l]; 2099 mwifiex_dbg(adapter, INFO, 2100 "info: RX: port=%d rx_len=%u\n", 2101 port, rx_len); 2102 rx_blocks = 2103 (rx_len + MWIFIEX_SDIO_BLOCK_SIZE - 2104 1) / MWIFIEX_SDIO_BLOCK_SIZE; 2105 if (rx_len <= adapter->intf_hdr_len || 2106 (card->mpa_rx.enabled && 2107 ((rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) > 2108 card->mpa_rx.buf_size))) { 2109 mwifiex_dbg(adapter, ERROR, 2110 "invalid rx_len=%d\n", 2111 rx_len); 2112 return -1; 2113 } 2114 2115 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE); 2116 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", 2117 rx_len); 2118 2119 if (mwifiex_sdio_card_to_host_mp_aggr(adapter, rx_len, 2120 port)) { 2121 mwifiex_dbg(adapter, ERROR, 2122 "card_to_host_mpa failed: int status=%#x\n", 2123 sdio_ireg); 2124 goto term_cmd; 2125 } 2126 } 2127 } 2128 2129 return 0; 2130 2131term_cmd: 2132 /* terminate cmd */ 2133 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr)) 2134 mwifiex_dbg(adapter, ERROR, "read CFG reg failed\n"); 2135 else 2136 mwifiex_dbg(adapter, INFO, 2137 "info: CFG reg val = %d\n", cr); 2138 2139 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, (cr | 0x04))) 2140 mwifiex_dbg(adapter, ERROR, 2141 "write CFG reg failed\n"); 2142 else 2143 mwifiex_dbg(adapter, INFO, "info: write success\n"); 2144 2145 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr)) 2146 mwifiex_dbg(adapter, ERROR, 2147 "read CFG reg failed\n"); 2148 else 2149 mwifiex_dbg(adapter, INFO, 2150 "info: CFG reg val =%x\n", cr); 2151 2152 return -1; 2153} 2154 2155/* 2156 * This function aggregates transmission buffers in driver and downloads 2157 * the aggregated packet to card. 2158 * 2159 * The individual packets are aggregated by copying into an aggregation 2160 * buffer and then downloaded to the card. Previous unsent packets in the 2161 * aggregation buffer are pre-copied first before new packets are added. 2162 * Aggregation is done till there is space left in the aggregation buffer, 2163 * or till new packets are available. 2164 * 2165 * The function will only download the packet to the card when aggregation 2166 * stops, otherwise it will just aggregate the packet in aggregation buffer 2167 * and return. 2168 */ 2169static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter, 2170 u8 *payload, u32 pkt_len, u32 port, 2171 u32 next_pkt_len) 2172{ 2173 struct sdio_mmc_card *card = adapter->card; 2174 int ret = 0; 2175 s32 f_send_aggr_buf = 0; 2176 s32 f_send_cur_buf = 0; 2177 s32 f_precopy_cur_buf = 0; 2178 s32 f_postcopy_cur_buf = 0; 2179 u32 mport; 2180 int index; 2181 2182 if (!card->mpa_tx.enabled || 2183 (card->has_control_mask && (port == CTRL_PORT)) || 2184 (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) { 2185 mwifiex_dbg(adapter, WARN, 2186 "info: %s: tx aggregation disabled\n", 2187 __func__); 2188 2189 f_send_cur_buf = 1; 2190 goto tx_curr_single; 2191 } 2192 2193 if (next_pkt_len) { 2194 /* More pkt in TX queue */ 2195 mwifiex_dbg(adapter, INFO, 2196 "info: %s: more packets in queue.\n", 2197 __func__); 2198 2199 if (MP_TX_AGGR_IN_PROGRESS(card)) { 2200 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) { 2201 f_precopy_cur_buf = 1; 2202 2203 if (!(card->mp_wr_bitmap & 2204 (1 << card->curr_wr_port)) || 2205 !MP_TX_AGGR_BUF_HAS_ROOM( 2206 card, pkt_len + next_pkt_len)) 2207 f_send_aggr_buf = 1; 2208 } else { 2209 /* No room in Aggr buf, send it */ 2210 f_send_aggr_buf = 1; 2211 2212 if (!(card->mp_wr_bitmap & 2213 (1 << card->curr_wr_port))) 2214 f_send_cur_buf = 1; 2215 else 2216 f_postcopy_cur_buf = 1; 2217 } 2218 } else { 2219 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len) && 2220 (card->mp_wr_bitmap & (1 << card->curr_wr_port))) 2221 f_precopy_cur_buf = 1; 2222 else 2223 f_send_cur_buf = 1; 2224 } 2225 } else { 2226 /* Last pkt in TX queue */ 2227 mwifiex_dbg(adapter, INFO, 2228 "info: %s: Last packet in Tx Queue.\n", 2229 __func__); 2230 2231 if (MP_TX_AGGR_IN_PROGRESS(card)) { 2232 /* some packs in Aggr buf already */ 2233 f_send_aggr_buf = 1; 2234 2235 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) 2236 f_precopy_cur_buf = 1; 2237 else 2238 /* No room in Aggr buf, send it */ 2239 f_send_cur_buf = 1; 2240 } else { 2241 f_send_cur_buf = 1; 2242 } 2243 } 2244 2245 if (f_precopy_cur_buf) { 2246 mwifiex_dbg(adapter, DATA, 2247 "data: %s: precopy current buffer\n", 2248 __func__); 2249 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port); 2250 2251 if (MP_TX_AGGR_PKT_LIMIT_REACHED(card) || 2252 mp_tx_aggr_port_limit_reached(card)) 2253 /* No more pkts allowed in Aggr buf, send it */ 2254 f_send_aggr_buf = 1; 2255 } 2256 2257 if (f_send_aggr_buf) { 2258 mwifiex_dbg(adapter, DATA, 2259 "data: %s: send aggr buffer: %d %d\n", 2260 __func__, card->mpa_tx.start_port, 2261 card->mpa_tx.ports); 2262 if (card->supports_sdio_new_mode) { 2263 u32 port_count; 2264 int i; 2265 2266 for (i = 0, port_count = 0; i < card->max_ports; i++) 2267 if (card->mpa_tx.ports & BIT(i)) 2268 port_count++; 2269 2270 /* Writing data from "start_port + 0" to "start_port + 2271 * port_count -1", so decrease the count by 1 2272 */ 2273 port_count--; 2274 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 2275 (port_count << 8)) + card->mpa_tx.start_port; 2276 } else { 2277 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 2278 (card->mpa_tx.ports << 4)) + 2279 card->mpa_tx.start_port; 2280 } 2281 2282 if (card->mpa_tx.pkt_cnt == 1) 2283 mport = adapter->ioport + card->mpa_tx.start_port; 2284 2285 ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf, 2286 card->mpa_tx.buf_len, mport); 2287 2288 /* Save the last multi port tx aggregation info to debug log. */ 2289 index = adapter->dbg.last_sdio_mp_index; 2290 index = (index + 1) % MWIFIEX_DBG_SDIO_MP_NUM; 2291 adapter->dbg.last_sdio_mp_index = index; 2292 adapter->dbg.last_mp_wr_ports[index] = mport; 2293 adapter->dbg.last_mp_wr_bitmap[index] = card->mp_wr_bitmap; 2294 adapter->dbg.last_mp_wr_len[index] = card->mpa_tx.buf_len; 2295 adapter->dbg.last_mp_curr_wr_port[index] = card->curr_wr_port; 2296 2297 MP_TX_AGGR_BUF_RESET(card); 2298 } 2299 2300tx_curr_single: 2301 if (f_send_cur_buf) { 2302 mwifiex_dbg(adapter, DATA, 2303 "data: %s: send current buffer %d\n", 2304 __func__, port); 2305 ret = mwifiex_write_data_to_card(adapter, payload, pkt_len, 2306 adapter->ioport + port); 2307 } 2308 2309 if (f_postcopy_cur_buf) { 2310 mwifiex_dbg(adapter, DATA, 2311 "data: %s: postcopy current buffer\n", 2312 __func__); 2313 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port); 2314 } 2315 2316 return ret; 2317} 2318 2319/* 2320 * This function downloads data from driver to card. 2321 * 2322 * Both commands and data packets are transferred to the card by this 2323 * function. 2324 * 2325 * This function adds the SDIO specific header to the front of the buffer 2326 * before transferring. The header contains the length of the packet and 2327 * the type. The firmware handles the packets based upon this set type. 2328 */ 2329static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter, 2330 u8 type, struct sk_buff *skb, 2331 struct mwifiex_tx_param *tx_param) 2332{ 2333 struct sdio_mmc_card *card = adapter->card; 2334 int ret; 2335 u32 buf_block_len; 2336 u32 blk_size; 2337 u32 port = CTRL_PORT; 2338 u8 *payload = (u8 *)skb->data; 2339 u32 pkt_len = skb->len; 2340 2341 /* Allocate buffer and copy payload */ 2342 blk_size = MWIFIEX_SDIO_BLOCK_SIZE; 2343 buf_block_len = (pkt_len + blk_size - 1) / blk_size; 2344 put_unaligned_le16((u16)pkt_len, payload + 0); 2345 put_unaligned_le16((u32)type, payload + 2); 2346 2347 2348 /* 2349 * This is SDIO specific header 2350 * u16 length, 2351 * u16 type (MWIFIEX_TYPE_DATA = 0, MWIFIEX_TYPE_CMD = 1, 2352 * MWIFIEX_TYPE_EVENT = 3) 2353 */ 2354 if (type == MWIFIEX_TYPE_DATA) { 2355 ret = mwifiex_get_wr_port_data(adapter, &port); 2356 if (ret) { 2357 mwifiex_dbg(adapter, ERROR, 2358 "%s: no wr_port available\n", 2359 __func__); 2360 return ret; 2361 } 2362 } else { 2363 adapter->cmd_sent = true; 2364 /* Type must be MWIFIEX_TYPE_CMD */ 2365 2366 if (pkt_len <= adapter->intf_hdr_len || 2367 pkt_len > MWIFIEX_UPLD_SIZE) 2368 mwifiex_dbg(adapter, ERROR, 2369 "%s: payload=%p, nb=%d\n", 2370 __func__, payload, pkt_len); 2371 2372 if (card->supports_sdio_new_mode) 2373 port = CMD_PORT_SLCT; 2374 } 2375 2376 /* Transfer data to card */ 2377 pkt_len = buf_block_len * blk_size; 2378 2379 if (tx_param) 2380 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len, 2381 port, tx_param->next_pkt_len 2382 ); 2383 else 2384 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len, 2385 port, 0); 2386 2387 if (ret) { 2388 if (type == MWIFIEX_TYPE_CMD) 2389 adapter->cmd_sent = false; 2390 if (type == MWIFIEX_TYPE_DATA) { 2391 adapter->data_sent = false; 2392 /* restore curr_wr_port in error cases */ 2393 card->curr_wr_port = port; 2394 card->mp_wr_bitmap |= (u32)(1 << card->curr_wr_port); 2395 } 2396 } else { 2397 if (type == MWIFIEX_TYPE_DATA) { 2398 if (!(card->mp_wr_bitmap & (1 << card->curr_wr_port))) 2399 adapter->data_sent = true; 2400 else 2401 adapter->data_sent = false; 2402 } 2403 } 2404 2405 return ret; 2406} 2407 2408/* 2409 * This function allocates the MPA Tx and Rx buffers. 2410 */ 2411static int mwifiex_alloc_sdio_mpa_buffers(struct mwifiex_adapter *adapter, 2412 u32 mpa_tx_buf_size, u32 mpa_rx_buf_size) 2413{ 2414 struct sdio_mmc_card *card = adapter->card; 2415 u32 rx_buf_size; 2416 int ret = 0; 2417 2418 card->mpa_tx.buf = kzalloc(mpa_tx_buf_size, GFP_KERNEL); 2419 if (!card->mpa_tx.buf) { 2420 ret = -1; 2421 goto error; 2422 } 2423 2424 card->mpa_tx.buf_size = mpa_tx_buf_size; 2425 2426 rx_buf_size = max_t(u32, mpa_rx_buf_size, 2427 (u32)SDIO_MAX_AGGR_BUF_SIZE); 2428 card->mpa_rx.buf = kzalloc(rx_buf_size, GFP_KERNEL); 2429 if (!card->mpa_rx.buf) { 2430 ret = -1; 2431 goto error; 2432 } 2433 2434 card->mpa_rx.buf_size = rx_buf_size; 2435 2436error: 2437 if (ret) { 2438 kfree(card->mpa_tx.buf); 2439 kfree(card->mpa_rx.buf); 2440 card->mpa_tx.buf_size = 0; 2441 card->mpa_rx.buf_size = 0; 2442 card->mpa_tx.buf = NULL; 2443 card->mpa_rx.buf = NULL; 2444 } 2445 2446 return ret; 2447} 2448 2449/* 2450 * This function unregisters the SDIO device. 2451 * 2452 * The SDIO IRQ is released, the function is disabled and driver 2453 * data is set to null. 2454 */ 2455static void 2456mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 2457{ 2458 struct sdio_mmc_card *card = adapter->card; 2459 2460 if (adapter->card) { 2461 card->adapter = NULL; 2462 sdio_claim_host(card->func); 2463 sdio_disable_func(card->func); 2464 sdio_release_host(card->func); 2465 } 2466} 2467 2468/* 2469 * This function registers the SDIO device. 2470 * 2471 * SDIO IRQ is claimed, block size is set and driver data is initialized. 2472 */ 2473static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 2474{ 2475 int ret; 2476 struct sdio_mmc_card *card = adapter->card; 2477 struct sdio_func *func = card->func; 2478 const char *firmware = card->firmware; 2479 2480 /* save adapter pointer in card */ 2481 card->adapter = adapter; 2482 adapter->tx_buf_size = card->tx_buf_size; 2483 2484 sdio_claim_host(func); 2485 2486 /* Set block size */ 2487 ret = sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE); 2488 sdio_release_host(func); 2489 if (ret) { 2490 mwifiex_dbg(adapter, ERROR, 2491 "cannot set SDIO block size\n"); 2492 return ret; 2493 } 2494 2495 /* Select correct firmware (sdsd or sdiouart) firmware based on the strapping 2496 * option 2497 */ 2498 if (card->firmware_sdiouart) { 2499 u8 val; 2500 2501 mwifiex_read_reg(adapter, card->reg->host_strap_reg, &val); 2502 if ((val & card->reg->host_strap_mask) == card->reg->host_strap_value) 2503 firmware = card->firmware_sdiouart; 2504 } 2505 strcpy(adapter->fw_name, firmware); 2506 2507 if (card->fw_dump_enh) { 2508 adapter->mem_type_mapping_tbl = generic_mem_type_map; 2509 adapter->num_mem_types = 1; 2510 } else { 2511 adapter->mem_type_mapping_tbl = mem_type_mapping_tbl; 2512 adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl); 2513 } 2514 2515 return 0; 2516} 2517 2518/* 2519 * This function initializes the SDIO driver. 2520 * 2521 * The following initializations steps are followed - 2522 * - Read the Host interrupt status register to acknowledge 2523 * the first interrupt got from bootloader 2524 * - Disable host interrupt mask register 2525 * - Get SDIO port 2526 * - Initialize SDIO variables in card 2527 * - Allocate MP registers 2528 * - Allocate MPA Tx and Rx buffers 2529 */ 2530static int mwifiex_init_sdio(struct mwifiex_adapter *adapter) 2531{ 2532 struct sdio_mmc_card *card = adapter->card; 2533 const struct mwifiex_sdio_card_reg *reg = card->reg; 2534 int ret; 2535 u8 sdio_ireg; 2536 2537 sdio_set_drvdata(card->func, card); 2538 2539 /* 2540 * Read the host_int_status_reg for ACK the first interrupt got 2541 * from the bootloader. If we don't do this we get a interrupt 2542 * as soon as we register the irq. 2543 */ 2544 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg); 2545 2546 /* Get SDIO ioport */ 2547 if (mwifiex_init_sdio_ioport(adapter)) 2548 return -EIO; 2549 2550 /* Initialize SDIO variables in card */ 2551 card->mp_rd_bitmap = 0; 2552 card->mp_wr_bitmap = 0; 2553 card->curr_rd_port = reg->start_rd_port; 2554 card->curr_wr_port = reg->start_wr_port; 2555 2556 card->mp_data_port_mask = reg->data_port_mask; 2557 2558 card->mpa_tx.buf_len = 0; 2559 card->mpa_tx.pkt_cnt = 0; 2560 card->mpa_tx.start_port = 0; 2561 2562 card->mpa_tx.enabled = 1; 2563 card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit; 2564 2565 card->mpa_rx.buf_len = 0; 2566 card->mpa_rx.pkt_cnt = 0; 2567 card->mpa_rx.start_port = 0; 2568 2569 card->mpa_rx.enabled = 1; 2570 card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit; 2571 2572 /* Allocate buffers for SDIO MP-A */ 2573 card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL); 2574 if (!card->mp_regs) 2575 return -ENOMEM; 2576 2577 card->mpa_rx.len_arr = kcalloc(card->mp_agg_pkt_limit, 2578 sizeof(*card->mpa_rx.len_arr), 2579 GFP_KERNEL); 2580 if (!card->mpa_rx.len_arr) { 2581 kfree(card->mp_regs); 2582 return -ENOMEM; 2583 } 2584 2585 ret = mwifiex_alloc_sdio_mpa_buffers(adapter, 2586 card->mp_tx_agg_buf_size, 2587 card->mp_rx_agg_buf_size); 2588 2589 /* Allocate 32k MPA Tx/Rx buffers if 64k memory allocation fails */ 2590 if (ret && (card->mp_tx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX || 2591 card->mp_rx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX)) { 2592 /* Disable rx single port aggregation */ 2593 adapter->host_disable_sdio_rx_aggr = true; 2594 2595 ret = mwifiex_alloc_sdio_mpa_buffers 2596 (adapter, MWIFIEX_MP_AGGR_BUF_SIZE_32K, 2597 MWIFIEX_MP_AGGR_BUF_SIZE_32K); 2598 if (ret) { 2599 /* Disable multi port aggregation */ 2600 card->mpa_tx.enabled = 0; 2601 card->mpa_rx.enabled = 0; 2602 } 2603 } 2604 2605 adapter->auto_tdls = card->can_auto_tdls; 2606 adapter->ext_scan = card->can_ext_scan; 2607 return 0; 2608} 2609 2610/* 2611 * This function resets the MPA Tx and Rx buffers. 2612 */ 2613static void mwifiex_cleanup_mpa_buf(struct mwifiex_adapter *adapter) 2614{ 2615 struct sdio_mmc_card *card = adapter->card; 2616 2617 MP_TX_AGGR_BUF_RESET(card); 2618 MP_RX_AGGR_BUF_RESET(card); 2619} 2620 2621/* 2622 * This function cleans up the allocated card buffers. 2623 * 2624 * The following are freed by this function - 2625 * - MP registers 2626 * - MPA Tx buffer 2627 * - MPA Rx buffer 2628 */ 2629static void mwifiex_cleanup_sdio(struct mwifiex_adapter *adapter) 2630{ 2631 struct sdio_mmc_card *card = adapter->card; 2632 2633 cancel_work_sync(&card->work); 2634 2635 kfree(card->mp_regs); 2636 kfree(card->mpa_rx.len_arr); 2637 kfree(card->mpa_tx.buf); 2638 kfree(card->mpa_rx.buf); 2639} 2640 2641/* 2642 * This function updates the MP end port in card. 2643 */ 2644static void 2645mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port) 2646{ 2647 struct sdio_mmc_card *card = adapter->card; 2648 const struct mwifiex_sdio_card_reg *reg = card->reg; 2649 int i; 2650 2651 card->mp_end_port = port; 2652 2653 card->mp_data_port_mask = reg->data_port_mask; 2654 2655 if (reg->start_wr_port) { 2656 for (i = 1; i <= card->max_ports - card->mp_end_port; i++) 2657 card->mp_data_port_mask &= 2658 ~(1 << (card->max_ports - i)); 2659 } 2660 2661 card->curr_wr_port = reg->start_wr_port; 2662 2663 mwifiex_dbg(adapter, CMD, 2664 "cmd: mp_end_port %d, data port mask 0x%x\n", 2665 port, card->mp_data_port_mask); 2666} 2667 2668static void mwifiex_sdio_card_reset_work(struct mwifiex_adapter *adapter) 2669{ 2670 struct sdio_mmc_card *card = adapter->card; 2671 struct sdio_func *func = card->func; 2672 int ret; 2673 2674 /* Prepare the adapter for the reset. */ 2675 mwifiex_shutdown_sw(adapter); 2676 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 2677 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 2678 2679 /* Run a HW reset of the SDIO interface. */ 2680 sdio_claim_host(func); 2681 ret = mmc_hw_reset(func->card); 2682 sdio_release_host(func); 2683 2684 switch (ret) { 2685 case 1: 2686 dev_dbg(&func->dev, "SDIO HW reset asynchronous\n"); 2687 complete_all(adapter->fw_done); 2688 break; 2689 case 0: 2690 ret = mwifiex_reinit_sw(adapter); 2691 if (ret) 2692 dev_err(&func->dev, "reinit failed: %d\n", ret); 2693 break; 2694 default: 2695 dev_err(&func->dev, "SDIO HW reset failed: %d\n", ret); 2696 break; 2697 } 2698} 2699 2700/* This function read/write firmware */ 2701static enum 2702rdwr_status mwifiex_sdio_rdwr_firmware(struct mwifiex_adapter *adapter, 2703 u8 doneflag) 2704{ 2705 struct sdio_mmc_card *card = adapter->card; 2706 int ret, tries; 2707 u8 ctrl_data = 0; 2708 2709 sdio_writeb(card->func, card->reg->fw_dump_host_ready, 2710 card->reg->fw_dump_ctrl, &ret); 2711 if (ret) { 2712 mwifiex_dbg(adapter, ERROR, "SDIO Write ERR\n"); 2713 return RDWR_STATUS_FAILURE; 2714 } 2715 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2716 ctrl_data = sdio_readb(card->func, card->reg->fw_dump_ctrl, 2717 &ret); 2718 if (ret) { 2719 mwifiex_dbg(adapter, ERROR, "SDIO read err\n"); 2720 return RDWR_STATUS_FAILURE; 2721 } 2722 if (ctrl_data == FW_DUMP_DONE) 2723 break; 2724 if (doneflag && ctrl_data == doneflag) 2725 return RDWR_STATUS_DONE; 2726 if (ctrl_data != card->reg->fw_dump_host_ready) { 2727 mwifiex_dbg(adapter, WARN, 2728 "The ctrl reg was changed, re-try again\n"); 2729 sdio_writeb(card->func, card->reg->fw_dump_host_ready, 2730 card->reg->fw_dump_ctrl, &ret); 2731 if (ret) { 2732 mwifiex_dbg(adapter, ERROR, "SDIO write err\n"); 2733 return RDWR_STATUS_FAILURE; 2734 } 2735 } 2736 usleep_range(100, 200); 2737 } 2738 if (ctrl_data == card->reg->fw_dump_host_ready) { 2739 mwifiex_dbg(adapter, ERROR, 2740 "Fail to pull ctrl_data\n"); 2741 return RDWR_STATUS_FAILURE; 2742 } 2743 2744 return RDWR_STATUS_SUCCESS; 2745} 2746 2747/* This function dump firmware memory to file */ 2748static void mwifiex_sdio_fw_dump(struct mwifiex_adapter *adapter) 2749{ 2750 struct sdio_mmc_card *card = adapter->card; 2751 int ret = 0; 2752 unsigned int reg, reg_start, reg_end; 2753 u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0; 2754 enum rdwr_status stat; 2755 u32 memory_size; 2756 2757 if (!card->can_dump_fw) 2758 return; 2759 2760 for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) { 2761 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx]; 2762 2763 if (entry->mem_ptr) { 2764 vfree(entry->mem_ptr); 2765 entry->mem_ptr = NULL; 2766 } 2767 entry->mem_size = 0; 2768 } 2769 2770 mwifiex_pm_wakeup_card(adapter); 2771 sdio_claim_host(card->func); 2772 2773 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2774 2775 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2776 if (stat == RDWR_STATUS_FAILURE) 2777 goto done; 2778 2779 reg = card->reg->fw_dump_start; 2780 /* Read the number of the memories which will dump */ 2781 dump_num = sdio_readb(card->func, reg, &ret); 2782 if (ret) { 2783 mwifiex_dbg(adapter, ERROR, "SDIO read memory length err\n"); 2784 goto done; 2785 } 2786 2787 /* Read the length of every memory which will dump */ 2788 for (idx = 0; idx < dump_num; idx++) { 2789 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx]; 2790 2791 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2792 if (stat == RDWR_STATUS_FAILURE) 2793 goto done; 2794 2795 memory_size = 0; 2796 reg = card->reg->fw_dump_start; 2797 for (i = 0; i < 4; i++) { 2798 read_reg = sdio_readb(card->func, reg, &ret); 2799 if (ret) { 2800 mwifiex_dbg(adapter, ERROR, "SDIO read err\n"); 2801 goto done; 2802 } 2803 memory_size |= (read_reg << i*8); 2804 reg++; 2805 } 2806 2807 if (memory_size == 0) { 2808 mwifiex_dbg(adapter, DUMP, "Firmware dump Finished!\n"); 2809 ret = mwifiex_write_reg(adapter, 2810 card->reg->fw_dump_ctrl, 2811 FW_DUMP_READ_DONE); 2812 if (ret) { 2813 mwifiex_dbg(adapter, ERROR, "SDIO write err\n"); 2814 return; 2815 } 2816 break; 2817 } 2818 2819 mwifiex_dbg(adapter, DUMP, 2820 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2821 entry->mem_ptr = vmalloc(memory_size + 1); 2822 entry->mem_size = memory_size; 2823 if (!entry->mem_ptr) { 2824 mwifiex_dbg(adapter, ERROR, "Vmalloc %s failed\n", 2825 entry->mem_name); 2826 goto done; 2827 } 2828 dbg_ptr = entry->mem_ptr; 2829 end_ptr = dbg_ptr + memory_size; 2830 2831 doneflag = entry->done_flag; 2832 mwifiex_dbg(adapter, DUMP, 2833 "Start %s output, please wait...\n", 2834 entry->mem_name); 2835 2836 do { 2837 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2838 if (stat == RDWR_STATUS_FAILURE) 2839 goto done; 2840 2841 reg_start = card->reg->fw_dump_start; 2842 reg_end = card->reg->fw_dump_end; 2843 for (reg = reg_start; reg <= reg_end; reg++) { 2844 *dbg_ptr = sdio_readb(card->func, reg, &ret); 2845 if (ret) { 2846 mwifiex_dbg(adapter, ERROR, 2847 "SDIO read err\n"); 2848 goto done; 2849 } 2850 if (dbg_ptr < end_ptr) 2851 dbg_ptr++; 2852 else 2853 mwifiex_dbg(adapter, ERROR, 2854 "Allocated buf not enough\n"); 2855 } 2856 2857 if (stat != RDWR_STATUS_DONE) 2858 continue; 2859 2860 mwifiex_dbg(adapter, DUMP, "%s done: size=0x%tx\n", 2861 entry->mem_name, dbg_ptr - entry->mem_ptr); 2862 break; 2863 } while (1); 2864 } 2865 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2866 2867done: 2868 sdio_release_host(card->func); 2869} 2870 2871static void mwifiex_sdio_generic_fw_dump(struct mwifiex_adapter *adapter) 2872{ 2873 struct sdio_mmc_card *card = adapter->card; 2874 struct memory_type_mapping *entry = &generic_mem_type_map[0]; 2875 unsigned int reg, reg_start, reg_end; 2876 u8 start_flag = 0, done_flag = 0; 2877 u8 *dbg_ptr, *end_ptr; 2878 enum rdwr_status stat; 2879 int ret = -1, tries; 2880 2881 if (!card->fw_dump_enh) 2882 return; 2883 2884 if (entry->mem_ptr) { 2885 vfree(entry->mem_ptr); 2886 entry->mem_ptr = NULL; 2887 } 2888 entry->mem_size = 0; 2889 2890 mwifiex_pm_wakeup_card(adapter); 2891 sdio_claim_host(card->func); 2892 2893 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2894 2895 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag); 2896 if (stat == RDWR_STATUS_FAILURE) 2897 goto done; 2898 2899 reg_start = card->reg->fw_dump_start; 2900 reg_end = card->reg->fw_dump_end; 2901 for (reg = reg_start; reg <= reg_end; reg++) { 2902 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2903 start_flag = sdio_readb(card->func, reg, &ret); 2904 if (ret) { 2905 mwifiex_dbg(adapter, ERROR, 2906 "SDIO read err\n"); 2907 goto done; 2908 } 2909 if (start_flag == 0) 2910 break; 2911 if (tries == MAX_POLL_TRIES) { 2912 mwifiex_dbg(adapter, ERROR, 2913 "FW not ready to dump\n"); 2914 ret = -1; 2915 goto done; 2916 } 2917 } 2918 usleep_range(100, 200); 2919 } 2920 2921 entry->mem_ptr = vmalloc(0xf0000 + 1); 2922 if (!entry->mem_ptr) { 2923 ret = -1; 2924 goto done; 2925 } 2926 dbg_ptr = entry->mem_ptr; 2927 entry->mem_size = 0xf0000; 2928 end_ptr = dbg_ptr + entry->mem_size; 2929 2930 done_flag = entry->done_flag; 2931 mwifiex_dbg(adapter, DUMP, 2932 "Start %s output, please wait...\n", entry->mem_name); 2933 2934 while (true) { 2935 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag); 2936 if (stat == RDWR_STATUS_FAILURE) 2937 goto done; 2938 for (reg = reg_start; reg <= reg_end; reg++) { 2939 *dbg_ptr = sdio_readb(card->func, reg, &ret); 2940 if (ret) { 2941 mwifiex_dbg(adapter, ERROR, 2942 "SDIO read err\n"); 2943 goto done; 2944 } 2945 dbg_ptr++; 2946 if (dbg_ptr >= end_ptr) { 2947 u8 *tmp_ptr; 2948 2949 tmp_ptr = vmalloc(entry->mem_size + 0x4000 + 1); 2950 if (!tmp_ptr) 2951 goto done; 2952 2953 memcpy(tmp_ptr, entry->mem_ptr, 2954 entry->mem_size); 2955 vfree(entry->mem_ptr); 2956 entry->mem_ptr = tmp_ptr; 2957 tmp_ptr = NULL; 2958 dbg_ptr = entry->mem_ptr + entry->mem_size; 2959 entry->mem_size += 0x4000; 2960 end_ptr = entry->mem_ptr + entry->mem_size; 2961 } 2962 } 2963 if (stat == RDWR_STATUS_DONE) { 2964 entry->mem_size = dbg_ptr - entry->mem_ptr; 2965 mwifiex_dbg(adapter, DUMP, "dump %s done size=0x%x\n", 2966 entry->mem_name, entry->mem_size); 2967 ret = 0; 2968 break; 2969 } 2970 } 2971 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2972 2973done: 2974 if (ret) { 2975 mwifiex_dbg(adapter, ERROR, "firmware dump failed\n"); 2976 if (entry->mem_ptr) { 2977 vfree(entry->mem_ptr); 2978 entry->mem_ptr = NULL; 2979 } 2980 entry->mem_size = 0; 2981 } 2982 sdio_release_host(card->func); 2983} 2984 2985static void mwifiex_sdio_device_dump_work(struct mwifiex_adapter *adapter) 2986{ 2987 struct sdio_mmc_card *card = adapter->card; 2988 2989 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE); 2990 if (!adapter->devdump_data) { 2991 mwifiex_dbg(adapter, ERROR, 2992 "vzalloc devdump data failure!\n"); 2993 return; 2994 } 2995 2996 mwifiex_drv_info_dump(adapter); 2997 if (card->fw_dump_enh) 2998 mwifiex_sdio_generic_fw_dump(adapter); 2999 else 3000 mwifiex_sdio_fw_dump(adapter); 3001 mwifiex_prepare_fw_dump_info(adapter); 3002 mwifiex_upload_device_dump(adapter); 3003} 3004 3005static void mwifiex_sdio_work(struct work_struct *work) 3006{ 3007 struct sdio_mmc_card *card = 3008 container_of(work, struct sdio_mmc_card, work); 3009 3010 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 3011 &card->work_flags)) 3012 mwifiex_sdio_device_dump_work(card->adapter); 3013 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 3014 &card->work_flags)) 3015 mwifiex_sdio_card_reset_work(card->adapter); 3016} 3017 3018/* This function resets the card */ 3019static void mwifiex_sdio_card_reset(struct mwifiex_adapter *adapter) 3020{ 3021 struct sdio_mmc_card *card = adapter->card; 3022 3023 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 3024 schedule_work(&card->work); 3025} 3026 3027/* This function dumps FW information */ 3028static void mwifiex_sdio_device_dump(struct mwifiex_adapter *adapter) 3029{ 3030 struct sdio_mmc_card *card = adapter->card; 3031 3032 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 3033 &card->work_flags)) 3034 schedule_work(&card->work); 3035} 3036 3037/* Function to dump SDIO function registers and SDIO scratch registers in case 3038 * of FW crash 3039 */ 3040static int 3041mwifiex_sdio_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 3042{ 3043 char *p = drv_buf; 3044 struct sdio_mmc_card *cardp = adapter->card; 3045 int ret = 0; 3046 u8 count, func, data, index = 0, size = 0; 3047 u8 reg, reg_start, reg_end; 3048 char buf[256], *ptr; 3049 3050 if (!p) 3051 return 0; 3052 3053 mwifiex_dbg(adapter, MSG, "SDIO register dump start\n"); 3054 3055 mwifiex_pm_wakeup_card(adapter); 3056 3057 sdio_claim_host(cardp->func); 3058 3059 for (count = 0; count < 5; count++) { 3060 memset(buf, 0, sizeof(buf)); 3061 ptr = buf; 3062 3063 switch (count) { 3064 case 0: 3065 /* Read the registers of SDIO function0 */ 3066 func = count; 3067 reg_start = 0; 3068 reg_end = 9; 3069 break; 3070 case 1: 3071 /* Read the registers of SDIO function1 */ 3072 func = count; 3073 reg_start = cardp->reg->func1_dump_reg_start; 3074 reg_end = cardp->reg->func1_dump_reg_end; 3075 break; 3076 case 2: 3077 index = 0; 3078 func = 1; 3079 reg_start = cardp->reg->func1_spec_reg_table[index++]; 3080 size = cardp->reg->func1_spec_reg_num; 3081 reg_end = cardp->reg->func1_spec_reg_table[size-1]; 3082 break; 3083 default: 3084 /* Read the scratch registers of SDIO function1 */ 3085 if (count == 4) 3086 mdelay(100); 3087 func = 1; 3088 reg_start = cardp->reg->func1_scratch_reg; 3089 reg_end = reg_start + MWIFIEX_SDIO_SCRATCH_SIZE; 3090 } 3091 3092 if (count != 2) 3093 ptr += sprintf(ptr, "SDIO Func%d (%#x-%#x): ", 3094 func, reg_start, reg_end); 3095 else 3096 ptr += sprintf(ptr, "SDIO Func%d: ", func); 3097 3098 for (reg = reg_start; reg <= reg_end;) { 3099 if (func == 0) 3100 data = sdio_f0_readb(cardp->func, reg, &ret); 3101 else 3102 data = sdio_readb(cardp->func, reg, &ret); 3103 3104 if (count == 2) 3105 ptr += sprintf(ptr, "(%#x) ", reg); 3106 if (!ret) { 3107 ptr += sprintf(ptr, "%02x ", data); 3108 } else { 3109 ptr += sprintf(ptr, "ERR"); 3110 break; 3111 } 3112 3113 if (count == 2 && reg < reg_end) 3114 reg = cardp->reg->func1_spec_reg_table[index++]; 3115 else 3116 reg++; 3117 } 3118 3119 mwifiex_dbg(adapter, MSG, "%s\n", buf); 3120 p += sprintf(p, "%s\n", buf); 3121 } 3122 3123 sdio_release_host(cardp->func); 3124 3125 mwifiex_dbg(adapter, MSG, "SDIO register dump end\n"); 3126 3127 return p - drv_buf; 3128} 3129 3130/* sdio device/function initialization, code is extracted 3131 * from init_if handler and register_dev handler. 3132 */ 3133static void mwifiex_sdio_up_dev(struct mwifiex_adapter *adapter) 3134{ 3135 struct sdio_mmc_card *card = adapter->card; 3136 u8 sdio_ireg; 3137 3138 sdio_claim_host(card->func); 3139 sdio_enable_func(card->func); 3140 sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE); 3141 sdio_release_host(card->func); 3142 3143 /* tx_buf_size might be changed to 3584 by firmware during 3144 * data transfer, we will reset to default size. 3145 */ 3146 adapter->tx_buf_size = card->tx_buf_size; 3147 3148 /* Read the host_int_status_reg for ACK the first interrupt got 3149 * from the bootloader. If we don't do this we get a interrupt 3150 * as soon as we register the irq. 3151 */ 3152 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg); 3153 3154 if (mwifiex_init_sdio_ioport(adapter)) 3155 dev_err(&card->func->dev, "error enabling SDIO port\n"); 3156} 3157 3158static struct mwifiex_if_ops sdio_ops = { 3159 .init_if = mwifiex_init_sdio, 3160 .cleanup_if = mwifiex_cleanup_sdio, 3161 .check_fw_status = mwifiex_check_fw_status, 3162 .check_winner_status = mwifiex_check_winner_status, 3163 .prog_fw = mwifiex_prog_fw_w_helper, 3164 .register_dev = mwifiex_register_dev, 3165 .unregister_dev = mwifiex_unregister_dev, 3166 .enable_int = mwifiex_sdio_enable_host_int, 3167 .disable_int = mwifiex_sdio_disable_host_int, 3168 .process_int_status = mwifiex_process_int_status, 3169 .host_to_card = mwifiex_sdio_host_to_card, 3170 .wakeup = mwifiex_pm_wakeup_card, 3171 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3172 3173 /* SDIO specific */ 3174 .update_mp_end_port = mwifiex_update_mp_end_port, 3175 .cleanup_mpa_buf = mwifiex_cleanup_mpa_buf, 3176 .cmdrsp_complete = mwifiex_sdio_cmdrsp_complete, 3177 .event_complete = mwifiex_sdio_event_complete, 3178 .dnld_fw = mwifiex_sdio_dnld_fw, 3179 .card_reset = mwifiex_sdio_card_reset, 3180 .reg_dump = mwifiex_sdio_reg_dump, 3181 .device_dump = mwifiex_sdio_device_dump, 3182 .deaggr_pkt = mwifiex_deaggr_sdio_pkt, 3183 .up_dev = mwifiex_sdio_up_dev, 3184}; 3185 3186module_driver(mwifiex_sdio, sdio_register_driver, sdio_unregister_driver); 3187 3188MODULE_AUTHOR("Marvell International Ltd."); 3189MODULE_DESCRIPTION("Marvell WiFi-Ex SDIO Driver version " SDIO_VERSION); 3190MODULE_VERSION(SDIO_VERSION); 3191MODULE_LICENSE("GPL v2"); 3192MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME); 3193MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME); 3194MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME); 3195MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME); 3196MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME); 3197MODULE_FIRMWARE(SD8977_DEFAULT_FW_NAME); 3198MODULE_FIRMWARE(SD8978_SDIOUART_FW_NAME); 3199MODULE_FIRMWARE(SD8987_DEFAULT_FW_NAME); 3200MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME); 3201MODULE_FIRMWARE(SD8997_SDIOUART_FW_NAME); 3202