1311893Sasomers/* SPDX-License-Identifier: GPL-2.0-or-later */ 2311893Sasomers/* 3311893Sasomers * PS3 Platfom gelic network driver. 4311893Sasomers * 5311893Sasomers * Copyright (C) 2007 Sony Computer Entertainment Inc. 6311893Sasomers * Copyright 2006, 2007 Sony Corporation. 7311893Sasomers * 8311893Sasomers * This file is based on: spider_net.h 9311893Sasomers * 10311893Sasomers * (C) Copyright IBM Corp. 2005 11311893Sasomers * 12311893Sasomers * Authors : Utz Bacher <utz.bacher@de.ibm.com> 13311893Sasomers * Jens Osterkamp <Jens.Osterkamp@de.ibm.com> 14311893Sasomers */ 15311893Sasomers#ifndef _GELIC_NET_H 16311893Sasomers#define _GELIC_NET_H 17311893Sasomers 18311893Sasomers/* descriptors */ 19323300Sngie#define GELIC_NET_RX_DESCRIPTORS 128 /* num of descriptors */ 20323300Sngie#define GELIC_NET_TX_DESCRIPTORS 128 /* num of descriptors */ 21311893Sasomers 22311893Sasomers#define GELIC_NET_MAX_FRAME 2312 23311893Sasomers#define GELIC_NET_MAX_MTU 2294 24311893Sasomers#define GELIC_NET_MIN_MTU 64 25313753Sasomers#define GELIC_NET_RXBUF_ALIGN 128 26313753Sasomers#define GELIC_CARD_RX_CSUM_DEFAULT 1 /* hw chksum */ 27313753Sasomers#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ 28313753Sasomers#define GELIC_NET_BROADCAST_ADDR 0xffffffffffffL 29311893Sasomers 30311893Sasomers#define GELIC_NET_MC_COUNT_MAX 32 /* multicast address list */ 31311893Sasomers 32311893Sasomers/* virtual interrupt status register bits */ 33311893Sasomers /* INT1 */ 34313753Sasomers#define GELIC_CARD_TX_RAM_FULL_ERR 0x0000000000000001L 35311893Sasomers#define GELIC_CARD_RX_RAM_FULL_ERR 0x0000000000000002L 36313753Sasomers#define GELIC_CARD_TX_SHORT_FRAME_ERR 0x0000000000000004L 37311893Sasomers#define GELIC_CARD_TX_INVALID_DESCR_ERR 0x0000000000000008L 38313753Sasomers#define GELIC_CARD_RX_FIFO_FULL_ERR 0x0000000000002000L 39313753Sasomers#define GELIC_CARD_RX_DESCR_CHAIN_END 0x0000000000004000L 40313753Sasomers#define GELIC_CARD_RX_INVALID_DESCR_ERR 0x0000000000008000L 41313753Sasomers#define GELIC_CARD_TX_RESPONCE_ERR 0x0000000000010000L 42313753Sasomers#define GELIC_CARD_RX_RESPONCE_ERR 0x0000000000100000L 43311893Sasomers#define GELIC_CARD_TX_PROTECTION_ERR 0x0000000000400000L 44311893Sasomers#define GELIC_CARD_RX_PROTECTION_ERR 0x0000000004000000L 45311893Sasomers#define GELIC_CARD_TX_TCP_UDP_CHECKSUM_ERR 0x0000000008000000L 46311893Sasomers#define GELIC_CARD_PORT_STATUS_CHANGED 0x0000000020000000L 47311893Sasomers#define GELIC_CARD_WLAN_EVENT_RECEIVED 0x0000000040000000L 48311893Sasomers#define GELIC_CARD_WLAN_COMMAND_COMPLETED 0x0000000080000000L 49311893Sasomers /* INT 0 */ 50311893Sasomers#define GELIC_CARD_TX_FLAGGED_DESCR 0x0004000000000000L 51311893Sasomers#define GELIC_CARD_RX_FLAGGED_DESCR 0x0040000000000000L 52311893Sasomers#define GELIC_CARD_TX_TRANSFER_END 0x0080000000000000L 53311893Sasomers#define GELIC_CARD_TX_DESCR_CHAIN_END 0x0100000000000000L 54311893Sasomers#define GELIC_CARD_NUMBER_OF_RX_FRAME 0x1000000000000000L 55311893Sasomers#define GELIC_CARD_ONE_TIME_COUNT_TIMER 0x4000000000000000L 56311893Sasomers#define GELIC_CARD_FREE_RUN_COUNT_TIMER 0x8000000000000000L 57311893Sasomers 58311893Sasomers/* initial interrupt mask */ 59311893Sasomers#define GELIC_CARD_TXINT GELIC_CARD_TX_DESCR_CHAIN_END 60311893Sasomers 61311893Sasomers#define GELIC_CARD_RXINT (GELIC_CARD_RX_DESCR_CHAIN_END | \ 62323300Sngie GELIC_CARD_NUMBER_OF_RX_FRAME) 63323300Sngie 64311893Sasomers /* RX descriptor data_status bits */ 65311893Sasomersenum gelic_descr_rx_status { 66311893Sasomers GELIC_DESCR_RXDMADU = 0x80000000, /* destination MAC addr unknown */ 67311893Sasomers GELIC_DESCR_RXLSTFBF = 0x40000000, /* last frame buffer */ 68311893Sasomers GELIC_DESCR_RXIPCHK = 0x20000000, /* IP checksum performed */ 69311893Sasomers GELIC_DESCR_RXTCPCHK = 0x10000000, /* TCP/UDP checksup performed */ 70311893Sasomers GELIC_DESCR_RXWTPKT = 0x00C00000, /* 71311893Sasomers * wakeup trigger packet 72313753Sasomers * 01: Magic Packet (TM) 73311893Sasomers * 10: ARP packet 74313753Sasomers * 11: Multicast MAC addr 75313753Sasomers */ 76313753Sasomers GELIC_DESCR_RXVLNPKT = 0x00200000, /* VLAN packet */ 77313753Sasomers /* bit 20..16 reserved */ 78313753Sasomers GELIC_DESCR_RXRRECNUM = 0x0000ff00, /* reception receipt number */ 79311893Sasomers /* bit 7..0 reserved */ 80311893Sasomers}; 81311893Sasomers 82311893Sasomers#define GELIC_DESCR_DATA_STATUS_CHK_MASK \ 83311893Sasomers (GELIC_DESCR_RXIPCHK | GELIC_DESCR_RXTCPCHK) 84311893Sasomers 85311893Sasomers /* TX descriptor data_status bits */ 86311893Sasomersenum gelic_descr_tx_status { 87311893Sasomers GELIC_DESCR_TX_TAIL = 0x00000001, /* gelic treated this 88311893Sasomers * descriptor was end of 89311893Sasomers * a tx frame 90311893Sasomers */ 91311893Sasomers}; 92311893Sasomers 93311893Sasomers/* RX descriptor data error bits */ 94311893Sasomersenum gelic_descr_rx_error { 95311893Sasomers /* bit 31 reserved */ 96311893Sasomers GELIC_DESCR_RXALNERR = 0x40000000, /* alignement error 10/100M */ 97311893Sasomers GELIC_DESCR_RXOVERERR = 0x20000000, /* oversize error */ 98323300Sngie GELIC_DESCR_RXRNTERR = 0x10000000, /* Runt error */ 99323300Sngie GELIC_DESCR_RXIPCHKERR = 0x08000000, /* IP checksum error */ 100311893Sasomers GELIC_DESCR_RXTCPCHKERR = 0x04000000, /* TCP/UDP checksum error */ 101311893Sasomers GELIC_DESCR_RXDRPPKT = 0x00100000, /* drop packet */ 102311893Sasomers GELIC_DESCR_RXIPFMTERR = 0x00080000, /* IP packet format error */ 103311893Sasomers /* bit 18 reserved */ 104313753Sasomers GELIC_DESCR_RXDATAERR = 0x00020000, /* IP packet format error */ 105313753Sasomers GELIC_DESCR_RXCALERR = 0x00010000, /* cariier extension length 106313753Sasomers * error */ 107313753Sasomers GELIC_DESCR_RXCREXERR = 0x00008000, /* carrier extension error */ 108311893Sasomers GELIC_DESCR_RXMLTCST = 0x00004000, /* multicast address frame */ 109311893Sasomers /* bit 13..0 reserved */ 110311893Sasomers}; 111313753Sasomers#define GELIC_DESCR_DATA_ERROR_CHK_MASK \ 112311893Sasomers (GELIC_DESCR_RXIPCHKERR | GELIC_DESCR_RXTCPCHKERR) 113313753Sasomers 114313753Sasomers/* DMA command and status (RX and TX)*/ 115313753Sasomersenum gelic_descr_dma_status { 116313753Sasomers GELIC_DESCR_DMA_COMPLETE = 0x00000000, /* used in tx */ 117313753Sasomers GELIC_DESCR_DMA_BUFFER_FULL = 0x00000000, /* used in rx */ 118311893Sasomers GELIC_DESCR_DMA_RESPONSE_ERROR = 0x10000000, /* used in rx, tx */ 119311893Sasomers GELIC_DESCR_DMA_PROTECTION_ERROR = 0x20000000, /* used in rx, tx */ 120311893Sasomers GELIC_DESCR_DMA_FRAME_END = 0x40000000, /* used in rx */ 121311893Sasomers GELIC_DESCR_DMA_FORCE_END = 0x50000000, /* used in rx, tx */ 122311893Sasomers GELIC_DESCR_DMA_CARDOWNED = 0xa0000000, /* used in rx, tx */ 123311893Sasomers GELIC_DESCR_DMA_NOT_IN_USE = 0xb0000000, /* any other value */ 124311893Sasomers}; 125311893Sasomers 126311893Sasomers#define GELIC_DESCR_DMA_STAT_MASK (0xf0000000) 127311893Sasomers 128311893Sasomers/* tx descriptor command and status */ 129311893Sasomersenum gelic_descr_tx_dma_status { 130311893Sasomers /* [19] */ 131311893Sasomers GELIC_DESCR_TX_DMA_IKE = 0x00080000, /* IPSEC off */ 132311893Sasomers /* [18] */ 133311893Sasomers GELIC_DESCR_TX_DMA_FRAME_TAIL = 0x00040000, /* last descriptor of 134311893Sasomers * the packet 135311893Sasomers */ 136311893Sasomers /* [17..16] */ 137311893Sasomers GELIC_DESCR_TX_DMA_TCP_CHKSUM = 0x00020000, /* TCP packet */ 138311893Sasomers GELIC_DESCR_TX_DMA_UDP_CHKSUM = 0x00030000, /* UDP packet */ 139311893Sasomers GELIC_DESCR_TX_DMA_NO_CHKSUM = 0x00000000, /* no checksum */ 140311893Sasomers 141311893Sasomers /* [1] */ 142311893Sasomers GELIC_DESCR_TX_DMA_CHAIN_END = 0x00000002, /* DMA terminated 143311893Sasomers * due to chain end 144311893Sasomers */ 145311893Sasomers}; 146311893Sasomers 147311893Sasomers#define GELIC_DESCR_DMA_CMD_NO_CHKSUM \ 148311893Sasomers (GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \ 149311893Sasomers GELIC_DESCR_TX_DMA_NO_CHKSUM) 150311893Sasomers 151311893Sasomers#define GELIC_DESCR_DMA_CMD_TCP_CHKSUM \ 152311893Sasomers (GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \ 153311893Sasomers GELIC_DESCR_TX_DMA_TCP_CHKSUM) 154311893Sasomers 155311893Sasomers#define GELIC_DESCR_DMA_CMD_UDP_CHKSUM \ 156311893Sasomers (GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \ 157311893Sasomers GELIC_DESCR_TX_DMA_UDP_CHKSUM) 158311893Sasomers 159311893Sasomersenum gelic_descr_rx_dma_status { 160311893Sasomers /* [ 1 ] */ 161311893Sasomers GELIC_DESCR_RX_DMA_CHAIN_END = 0x00000002, /* DMA terminated 162311893Sasomers * due to chain end 163311893Sasomers */ 164311893Sasomers}; 165311893Sasomers 166311893Sasomers/* for lv1_net_control */ 167311893Sasomersenum gelic_lv1_net_control_code { 168311893Sasomers GELIC_LV1_GET_MAC_ADDRESS = 1, 169311893Sasomers GELIC_LV1_GET_ETH_PORT_STATUS = 2, 170311893Sasomers GELIC_LV1_SET_NEGOTIATION_MODE = 3, 171311893Sasomers GELIC_LV1_GET_VLAN_ID = 4, 172311893Sasomers GELIC_LV1_SET_WOL = 5, 173311893Sasomers GELIC_LV1_GET_CHANNEL = 6, 174311893Sasomers GELIC_LV1_POST_WLAN_CMD = 9, 175311893Sasomers GELIC_LV1_GET_WLAN_CMD_RESULT = 10, 176311893Sasomers GELIC_LV1_GET_WLAN_EVENT = 11, 177311893Sasomers}; 178311893Sasomers 179311893Sasomers/* for GELIC_LV1_SET_WOL */ 180311893Sasomersenum gelic_lv1_wol_command { 181311893Sasomers GELIC_LV1_WOL_MAGIC_PACKET = 1, 182311893Sasomers GELIC_LV1_WOL_ADD_MATCH_ADDR = 6, 183311893Sasomers GELIC_LV1_WOL_DELETE_MATCH_ADDR = 7, 184311893Sasomers}; 185311893Sasomers 186311893Sasomers/* for GELIC_LV1_WOL_MAGIC_PACKET */ 187311893Sasomersenum gelic_lv1_wol_mp_arg { 188311893Sasomers GELIC_LV1_WOL_MP_DISABLE = 0, 189311893Sasomers GELIC_LV1_WOL_MP_ENABLE = 1, 190311893Sasomers}; 191311893Sasomers 192311893Sasomers/* for GELIC_LV1_WOL_{ADD,DELETE}_MATCH_ADDR */ 193311893Sasomersenum gelic_lv1_wol_match_arg { 194311893Sasomers GELIC_LV1_WOL_MATCH_INDIVIDUAL = 0, 195311893Sasomers GELIC_LV1_WOL_MATCH_ALL = 1, 196311893Sasomers}; 197361128Sasomers 198361128Sasomers/* status returened from GET_ETH_PORT_STATUS */ 199361128Sasomersenum gelic_lv1_ether_port_status { 200361128Sasomers GELIC_LV1_ETHER_LINK_UP = 0x0000000000000001L, 201361128Sasomers GELIC_LV1_ETHER_FULL_DUPLEX = 0x0000000000000002L, 202311893Sasomers GELIC_LV1_ETHER_AUTO_NEG = 0x0000000000000004L, 203311893Sasomers 204311893Sasomers GELIC_LV1_ETHER_SPEED_10 = 0x0000000000000010L, 205311893Sasomers GELIC_LV1_ETHER_SPEED_100 = 0x0000000000000020L, 206311893Sasomers GELIC_LV1_ETHER_SPEED_1000 = 0x0000000000000040L, 207313753Sasomers GELIC_LV1_ETHER_SPEED_MASK = 0x0000000000000070L, 208323300Sngie}; 209323300Sngie 210323300Sngieenum gelic_lv1_vlan_index { 211323300Sngie /* for outgoing packets */ 212323300Sngie GELIC_LV1_VLAN_TX_ETHERNET_0 = 0x0000000000000002L, 213323300Sngie GELIC_LV1_VLAN_TX_WIRELESS = 0x0000000000000003L, 214323300Sngie 215323300Sngie /* for incoming packets */ 216323300Sngie GELIC_LV1_VLAN_RX_ETHERNET_0 = 0x0000000000000012L, 217323300Sngie GELIC_LV1_VLAN_RX_WIRELESS = 0x0000000000000013L, 218323300Sngie}; 219323300Sngie 220313753Sasomersenum gelic_lv1_phy { 221313753Sasomers GELIC_LV1_PHY_ETHERNET_0 = 0x0000000000000002L, 222313753Sasomers}; 223313753Sasomers 224313753Sasomersenum gelic_port_type { 225313753Sasomers GELIC_PORT_ETHERNET_0 = 0, 226313753Sasomers GELIC_PORT_WIRELESS = 1, 227313753Sasomers GELIC_PORT_MAX 228313753Sasomers}; 229313753Sasomers 230/* As defined by the gelic hardware device. */ 231struct gelic_hw_regs { 232 struct { 233 __be32 dev_addr; 234 __be32 size; 235 } __packed payload; 236 __be32 next_descr_addr; 237 __be32 dmac_cmd_status; 238 __be32 result_size; 239 __be32 valid_size; /* all zeroes for tx */ 240 __be32 data_status; 241 __be32 data_error; /* all zeroes for tx */ 242} __packed; 243 244struct gelic_chain_link { 245 dma_addr_t cpu_addr; 246 unsigned int size; 247}; 248 249struct gelic_descr { 250 struct gelic_hw_regs hw_regs; 251 struct gelic_chain_link link; 252 struct sk_buff *skb; 253 struct gelic_descr *next; 254 struct gelic_descr *prev; 255} __attribute__((aligned(32))); 256 257struct gelic_descr_chain { 258 /* we walk from tail to head */ 259 struct gelic_descr *head; 260 struct gelic_descr *tail; 261}; 262 263struct gelic_vlan_id { 264 u16 tx; 265 u16 rx; 266}; 267 268struct gelic_card { 269 struct napi_struct napi; 270 struct net_device *netdev[GELIC_PORT_MAX]; 271 /* 272 * hypervisor requires irq_status should be 273 * 8 bytes aligned, but u64 member is 274 * always disposed in that manner 275 */ 276 u64 irq_status; 277 u64 irq_mask; 278 279 struct ps3_system_bus_device *dev; 280 struct gelic_vlan_id vlan[GELIC_PORT_MAX]; 281 int vlan_required; 282 283 struct gelic_descr_chain tx_chain; 284 struct gelic_descr_chain rx_chain; 285 /* 286 * tx_lock guards tx descriptor list and 287 * tx_dma_progress. 288 */ 289 spinlock_t tx_lock; 290 int tx_dma_progress; 291 292 struct work_struct tx_timeout_task; 293 atomic_t tx_timeout_task_counter; 294 wait_queue_head_t waitq; 295 296 /* only first user should up the card */ 297 struct mutex updown_lock; 298 atomic_t users; 299 300 u64 ether_port_status; 301 int link_mode; 302 303 /* original address returned by kzalloc */ 304 void *unalign; 305 306 /* 307 * each netdevice has copy of irq 308 */ 309 unsigned int irq; 310 struct gelic_descr *tx_top, *rx_top; 311 struct gelic_descr descr[]; /* must be the last */ 312}; 313 314struct gelic_port { 315 struct gelic_card *card; 316 struct net_device *netdev; 317 enum gelic_port_type type; 318 long priv[]; /* long for alignment */ 319}; 320 321static inline struct gelic_card *port_to_card(struct gelic_port *p) 322{ 323 return p->card; 324} 325static inline struct net_device *port_to_netdev(struct gelic_port *p) 326{ 327 return p->netdev; 328} 329static inline struct gelic_card *netdev_card(struct net_device *d) 330{ 331 return ((struct gelic_port *)netdev_priv(d))->card; 332} 333static inline struct gelic_port *netdev_port(struct net_device *d) 334{ 335 return (struct gelic_port *)netdev_priv(d); 336} 337static inline struct device *ctodev(struct gelic_card *card) 338{ 339 return &card->dev->core; 340} 341static inline u64 bus_id(struct gelic_card *card) 342{ 343 return card->dev->bus_id; 344} 345static inline u64 dev_id(struct gelic_card *card) 346{ 347 return card->dev->dev_id; 348} 349 350static inline void *port_priv(struct gelic_port *port) 351{ 352 return port->priv; 353} 354 355int gelic_card_set_irq_mask(struct gelic_card *card, u64 mask); 356/* shared netdev ops */ 357void gelic_card_up(struct gelic_card *card); 358void gelic_card_down(struct gelic_card *card); 359int gelic_net_open(struct net_device *netdev); 360int gelic_net_stop(struct net_device *netdev); 361netdev_tx_t gelic_net_xmit(struct sk_buff *skb, struct net_device *netdev); 362void gelic_net_set_multi(struct net_device *netdev); 363void gelic_net_tx_timeout(struct net_device *netdev, unsigned int txqueue); 364int gelic_net_setup_netdev(struct net_device *netdev, struct gelic_card *card); 365 366/* shared ethtool ops */ 367void gelic_net_get_drvinfo(struct net_device *netdev, 368 struct ethtool_drvinfo *info); 369void gelic_net_poll_controller(struct net_device *netdev); 370 371#endif /* _GELIC_NET_H */ 372