1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 *  PS3 Platfom gelic network driver.
4 *
5 * Copyright (C) 2007 Sony Computer Entertainment Inc.
6 * Copyright 2006, 2007 Sony Corporation.
7 *
8 * This file is based on: spider_net.h
9 *
10 * (C) Copyright IBM Corp. 2005
11 *
12 * Authors : Utz Bacher <utz.bacher@de.ibm.com>
13 *           Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
14 */
15#ifndef _GELIC_NET_H
16#define _GELIC_NET_H
17
18/* descriptors */
19#define GELIC_NET_RX_DESCRIPTORS        128 /* num of descriptors */
20#define GELIC_NET_TX_DESCRIPTORS        128 /* num of descriptors */
21
22#define GELIC_NET_MAX_FRAME             2312
23#define GELIC_NET_MAX_MTU               2294
24#define GELIC_NET_MIN_MTU               64
25#define GELIC_NET_RXBUF_ALIGN           128
26#define GELIC_CARD_RX_CSUM_DEFAULT      1 /* hw chksum */
27#define GELIC_NET_WATCHDOG_TIMEOUT      5*HZ
28#define GELIC_NET_BROADCAST_ADDR        0xffffffffffffL
29
30#define GELIC_NET_MC_COUNT_MAX          32 /* multicast address list */
31
32/* virtual interrupt status register bits */
33	/* INT1 */
34#define GELIC_CARD_TX_RAM_FULL_ERR           0x0000000000000001L
35#define GELIC_CARD_RX_RAM_FULL_ERR           0x0000000000000002L
36#define GELIC_CARD_TX_SHORT_FRAME_ERR        0x0000000000000004L
37#define GELIC_CARD_TX_INVALID_DESCR_ERR      0x0000000000000008L
38#define GELIC_CARD_RX_FIFO_FULL_ERR          0x0000000000002000L
39#define GELIC_CARD_RX_DESCR_CHAIN_END        0x0000000000004000L
40#define GELIC_CARD_RX_INVALID_DESCR_ERR      0x0000000000008000L
41#define GELIC_CARD_TX_RESPONCE_ERR           0x0000000000010000L
42#define GELIC_CARD_RX_RESPONCE_ERR           0x0000000000100000L
43#define GELIC_CARD_TX_PROTECTION_ERR         0x0000000000400000L
44#define GELIC_CARD_RX_PROTECTION_ERR         0x0000000004000000L
45#define GELIC_CARD_TX_TCP_UDP_CHECKSUM_ERR   0x0000000008000000L
46#define GELIC_CARD_PORT_STATUS_CHANGED       0x0000000020000000L
47#define GELIC_CARD_WLAN_EVENT_RECEIVED       0x0000000040000000L
48#define GELIC_CARD_WLAN_COMMAND_COMPLETED    0x0000000080000000L
49	/* INT 0 */
50#define GELIC_CARD_TX_FLAGGED_DESCR          0x0004000000000000L
51#define GELIC_CARD_RX_FLAGGED_DESCR          0x0040000000000000L
52#define GELIC_CARD_TX_TRANSFER_END           0x0080000000000000L
53#define GELIC_CARD_TX_DESCR_CHAIN_END        0x0100000000000000L
54#define GELIC_CARD_NUMBER_OF_RX_FRAME        0x1000000000000000L
55#define GELIC_CARD_ONE_TIME_COUNT_TIMER      0x4000000000000000L
56#define GELIC_CARD_FREE_RUN_COUNT_TIMER      0x8000000000000000L
57
58/* initial interrupt mask */
59#define GELIC_CARD_TXINT	GELIC_CARD_TX_DESCR_CHAIN_END
60
61#define GELIC_CARD_RXINT	(GELIC_CARD_RX_DESCR_CHAIN_END | \
62				 GELIC_CARD_NUMBER_OF_RX_FRAME)
63
64 /* RX descriptor data_status bits */
65enum gelic_descr_rx_status {
66	GELIC_DESCR_RXDMADU	= 0x80000000, /* destination MAC addr unknown */
67	GELIC_DESCR_RXLSTFBF	= 0x40000000, /* last frame buffer            */
68	GELIC_DESCR_RXIPCHK	= 0x20000000, /* IP checksum performed        */
69	GELIC_DESCR_RXTCPCHK	= 0x10000000, /* TCP/UDP checksup performed   */
70	GELIC_DESCR_RXWTPKT	= 0x00C00000, /*
71					       * wakeup trigger packet
72					       * 01: Magic Packet (TM)
73					       * 10: ARP packet
74					       * 11: Multicast MAC addr
75					       */
76	GELIC_DESCR_RXVLNPKT	= 0x00200000, /* VLAN packet */
77	/* bit 20..16 reserved */
78	GELIC_DESCR_RXRRECNUM	= 0x0000ff00, /* reception receipt number */
79	/* bit 7..0 reserved */
80};
81
82#define GELIC_DESCR_DATA_STATUS_CHK_MASK	\
83	(GELIC_DESCR_RXIPCHK | GELIC_DESCR_RXTCPCHK)
84
85 /* TX descriptor data_status bits */
86enum gelic_descr_tx_status {
87	GELIC_DESCR_TX_TAIL	= 0x00000001, /* gelic treated this
88					       * descriptor was end of
89					       * a tx frame
90					       */
91};
92
93/* RX descriptor data error bits */
94enum gelic_descr_rx_error {
95	/* bit 31 reserved */
96	GELIC_DESCR_RXALNERR	= 0x40000000, /* alignement error 10/100M */
97	GELIC_DESCR_RXOVERERR	= 0x20000000, /* oversize error */
98	GELIC_DESCR_RXRNTERR	= 0x10000000, /* Runt error */
99	GELIC_DESCR_RXIPCHKERR	= 0x08000000, /* IP checksum  error */
100	GELIC_DESCR_RXTCPCHKERR	= 0x04000000, /* TCP/UDP checksum  error */
101	GELIC_DESCR_RXDRPPKT	= 0x00100000, /* drop packet */
102	GELIC_DESCR_RXIPFMTERR	= 0x00080000, /* IP packet format error */
103	/* bit 18 reserved */
104	GELIC_DESCR_RXDATAERR	= 0x00020000, /* IP packet format error */
105	GELIC_DESCR_RXCALERR	= 0x00010000, /* cariier extension length
106					      * error */
107	GELIC_DESCR_RXCREXERR	= 0x00008000, /* carrier extension error */
108	GELIC_DESCR_RXMLTCST	= 0x00004000, /* multicast address frame */
109	/* bit 13..0 reserved */
110};
111#define GELIC_DESCR_DATA_ERROR_CHK_MASK		\
112	(GELIC_DESCR_RXIPCHKERR | GELIC_DESCR_RXTCPCHKERR)
113
114/* DMA command and status (RX and TX)*/
115enum gelic_descr_dma_status {
116	GELIC_DESCR_DMA_COMPLETE            = 0x00000000, /* used in tx */
117	GELIC_DESCR_DMA_BUFFER_FULL         = 0x00000000, /* used in rx */
118	GELIC_DESCR_DMA_RESPONSE_ERROR      = 0x10000000, /* used in rx, tx */
119	GELIC_DESCR_DMA_PROTECTION_ERROR    = 0x20000000, /* used in rx, tx */
120	GELIC_DESCR_DMA_FRAME_END           = 0x40000000, /* used in rx */
121	GELIC_DESCR_DMA_FORCE_END           = 0x50000000, /* used in rx, tx */
122	GELIC_DESCR_DMA_CARDOWNED           = 0xa0000000, /* used in rx, tx */
123	GELIC_DESCR_DMA_NOT_IN_USE          = 0xb0000000, /* any other value */
124};
125
126#define GELIC_DESCR_DMA_STAT_MASK	(0xf0000000)
127
128/* tx descriptor command and status */
129enum gelic_descr_tx_dma_status {
130	/* [19] */
131	GELIC_DESCR_TX_DMA_IKE		= 0x00080000, /* IPSEC off */
132	/* [18] */
133	GELIC_DESCR_TX_DMA_FRAME_TAIL	= 0x00040000, /* last descriptor of
134						       * the packet
135						       */
136	/* [17..16] */
137	GELIC_DESCR_TX_DMA_TCP_CHKSUM	= 0x00020000, /* TCP packet */
138	GELIC_DESCR_TX_DMA_UDP_CHKSUM	= 0x00030000, /* UDP packet */
139	GELIC_DESCR_TX_DMA_NO_CHKSUM	= 0x00000000, /* no checksum */
140
141	/* [1] */
142	GELIC_DESCR_TX_DMA_CHAIN_END	= 0x00000002, /* DMA terminated
143						       * due to chain end
144						       */
145};
146
147#define GELIC_DESCR_DMA_CMD_NO_CHKSUM	\
148	(GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \
149	GELIC_DESCR_TX_DMA_NO_CHKSUM)
150
151#define GELIC_DESCR_DMA_CMD_TCP_CHKSUM	\
152	(GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \
153	GELIC_DESCR_TX_DMA_TCP_CHKSUM)
154
155#define GELIC_DESCR_DMA_CMD_UDP_CHKSUM	\
156	(GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \
157	GELIC_DESCR_TX_DMA_UDP_CHKSUM)
158
159enum gelic_descr_rx_dma_status {
160	/* [ 1 ] */
161	GELIC_DESCR_RX_DMA_CHAIN_END	= 0x00000002, /* DMA terminated
162						       * due to chain end
163						       */
164};
165
166/* for lv1_net_control */
167enum gelic_lv1_net_control_code {
168	GELIC_LV1_GET_MAC_ADDRESS	= 1,
169	GELIC_LV1_GET_ETH_PORT_STATUS	= 2,
170	GELIC_LV1_SET_NEGOTIATION_MODE	= 3,
171	GELIC_LV1_GET_VLAN_ID		= 4,
172	GELIC_LV1_SET_WOL		= 5,
173	GELIC_LV1_GET_CHANNEL           = 6,
174	GELIC_LV1_POST_WLAN_CMD		= 9,
175	GELIC_LV1_GET_WLAN_CMD_RESULT	= 10,
176	GELIC_LV1_GET_WLAN_EVENT	= 11,
177};
178
179/* for GELIC_LV1_SET_WOL */
180enum gelic_lv1_wol_command {
181	GELIC_LV1_WOL_MAGIC_PACKET	= 1,
182	GELIC_LV1_WOL_ADD_MATCH_ADDR	= 6,
183	GELIC_LV1_WOL_DELETE_MATCH_ADDR	= 7,
184};
185
186/* for GELIC_LV1_WOL_MAGIC_PACKET */
187enum gelic_lv1_wol_mp_arg {
188	GELIC_LV1_WOL_MP_DISABLE	= 0,
189	GELIC_LV1_WOL_MP_ENABLE		= 1,
190};
191
192/* for GELIC_LV1_WOL_{ADD,DELETE}_MATCH_ADDR */
193enum gelic_lv1_wol_match_arg {
194	GELIC_LV1_WOL_MATCH_INDIVIDUAL	= 0,
195	GELIC_LV1_WOL_MATCH_ALL		= 1,
196};
197
198/* status returened from GET_ETH_PORT_STATUS */
199enum gelic_lv1_ether_port_status {
200	GELIC_LV1_ETHER_LINK_UP		= 0x0000000000000001L,
201	GELIC_LV1_ETHER_FULL_DUPLEX	= 0x0000000000000002L,
202	GELIC_LV1_ETHER_AUTO_NEG	= 0x0000000000000004L,
203
204	GELIC_LV1_ETHER_SPEED_10	= 0x0000000000000010L,
205	GELIC_LV1_ETHER_SPEED_100	= 0x0000000000000020L,
206	GELIC_LV1_ETHER_SPEED_1000	= 0x0000000000000040L,
207	GELIC_LV1_ETHER_SPEED_MASK	= 0x0000000000000070L,
208};
209
210enum gelic_lv1_vlan_index {
211	/* for outgoing packets */
212	GELIC_LV1_VLAN_TX_ETHERNET_0	= 0x0000000000000002L,
213	GELIC_LV1_VLAN_TX_WIRELESS	= 0x0000000000000003L,
214
215	/* for incoming packets */
216	GELIC_LV1_VLAN_RX_ETHERNET_0	= 0x0000000000000012L,
217	GELIC_LV1_VLAN_RX_WIRELESS	= 0x0000000000000013L,
218};
219
220enum gelic_lv1_phy {
221	GELIC_LV1_PHY_ETHERNET_0	= 0x0000000000000002L,
222};
223
224enum gelic_port_type {
225	GELIC_PORT_ETHERNET_0	= 0,
226	GELIC_PORT_WIRELESS	= 1,
227	GELIC_PORT_MAX
228};
229
230/* As defined by the gelic hardware device. */
231struct gelic_hw_regs {
232	struct  {
233		__be32 dev_addr;
234		__be32 size;
235	} __packed payload;
236	__be32 next_descr_addr;
237	__be32 dmac_cmd_status;
238	__be32 result_size;
239	__be32 valid_size;	/* all zeroes for tx */
240	__be32 data_status;
241	__be32 data_error;	/* all zeroes for tx */
242} __packed;
243
244struct gelic_chain_link {
245	dma_addr_t cpu_addr;
246	unsigned int size;
247};
248
249struct gelic_descr {
250	struct gelic_hw_regs hw_regs;
251	struct gelic_chain_link link;
252	struct sk_buff *skb;
253	struct gelic_descr *next;
254	struct gelic_descr *prev;
255} __attribute__((aligned(32)));
256
257struct gelic_descr_chain {
258	/* we walk from tail to head */
259	struct gelic_descr *head;
260	struct gelic_descr *tail;
261};
262
263struct gelic_vlan_id {
264	u16 tx;
265	u16 rx;
266};
267
268struct gelic_card {
269	struct napi_struct napi;
270	struct net_device *netdev[GELIC_PORT_MAX];
271	/*
272	 * hypervisor requires irq_status should be
273	 * 8 bytes aligned, but u64 member is
274	 * always disposed in that manner
275	 */
276	u64 irq_status;
277	u64 irq_mask;
278
279	struct ps3_system_bus_device *dev;
280	struct gelic_vlan_id vlan[GELIC_PORT_MAX];
281	int vlan_required;
282
283	struct gelic_descr_chain tx_chain;
284	struct gelic_descr_chain rx_chain;
285	/*
286	 * tx_lock guards tx descriptor list and
287	 * tx_dma_progress.
288	 */
289	spinlock_t tx_lock;
290	int tx_dma_progress;
291
292	struct work_struct tx_timeout_task;
293	atomic_t tx_timeout_task_counter;
294	wait_queue_head_t waitq;
295
296	/* only first user should up the card */
297	struct mutex updown_lock;
298	atomic_t users;
299
300	u64 ether_port_status;
301	int link_mode;
302
303	/* original address returned by kzalloc */
304	void *unalign;
305
306	/*
307	 * each netdevice has copy of irq
308	 */
309	unsigned int irq;
310	struct gelic_descr *tx_top, *rx_top;
311	struct gelic_descr descr[]; /* must be the last */
312};
313
314struct gelic_port {
315	struct gelic_card *card;
316	struct net_device *netdev;
317	enum gelic_port_type type;
318	long priv[]; /* long for alignment */
319};
320
321static inline struct gelic_card *port_to_card(struct gelic_port *p)
322{
323	return p->card;
324}
325static inline struct net_device *port_to_netdev(struct gelic_port *p)
326{
327	return p->netdev;
328}
329static inline struct gelic_card *netdev_card(struct net_device *d)
330{
331	return ((struct gelic_port *)netdev_priv(d))->card;
332}
333static inline struct gelic_port *netdev_port(struct net_device *d)
334{
335	return (struct gelic_port *)netdev_priv(d);
336}
337static inline struct device *ctodev(struct gelic_card *card)
338{
339	return &card->dev->core;
340}
341static inline u64 bus_id(struct gelic_card *card)
342{
343	return card->dev->bus_id;
344}
345static inline u64 dev_id(struct gelic_card *card)
346{
347	return card->dev->dev_id;
348}
349
350static inline void *port_priv(struct gelic_port *port)
351{
352	return port->priv;
353}
354
355int gelic_card_set_irq_mask(struct gelic_card *card, u64 mask);
356/* shared netdev ops */
357void gelic_card_up(struct gelic_card *card);
358void gelic_card_down(struct gelic_card *card);
359int gelic_net_open(struct net_device *netdev);
360int gelic_net_stop(struct net_device *netdev);
361netdev_tx_t gelic_net_xmit(struct sk_buff *skb, struct net_device *netdev);
362void gelic_net_set_multi(struct net_device *netdev);
363void gelic_net_tx_timeout(struct net_device *netdev, unsigned int txqueue);
364int gelic_net_setup_netdev(struct net_device *netdev, struct gelic_card *card);
365
366/* shared ethtool ops */
367void gelic_net_get_drvinfo(struct net_device *netdev,
368			   struct ethtool_drvinfo *info);
369void gelic_net_poll_controller(struct net_device *netdev);
370
371#endif /* _GELIC_NET_H */
372