1/* SPDX-License-Identifier: BSD-3-Clause */
2/* Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries.
3 * Microchip VCAP API
4 */
5
6/* This file is autogenerated by cml-utils 2023-03-13 10:16:42 +0100.
7 * Commit ID: 259f0efd6d6d91bfbf62858de153cc757b6bffa3 (dirty)
8 */
9
10#ifndef __VCAP_AG_API__
11#define __VCAP_AG_API__
12
13enum vcap_type {
14	VCAP_TYPE_ES0,
15	VCAP_TYPE_ES2,
16	VCAP_TYPE_IS0,
17	VCAP_TYPE_IS1,
18	VCAP_TYPE_IS2,
19	VCAP_TYPE_MAX
20};
21
22/* Keyfieldset names with origin information */
23enum vcap_keyfield_set {
24	VCAP_KFS_NO_VALUE,          /* initial value */
25	VCAP_KFS_5TUPLE_IP4,        /* lan966x is1 X2 */
26	VCAP_KFS_5TUPLE_IP6,        /* lan966x is1 X4 */
27	VCAP_KFS_7TUPLE,            /* lan966x is1 X4 */
28	VCAP_KFS_ARP,               /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
29	VCAP_KFS_DBL_VID,           /* lan966x is1 X1 */
30	VCAP_KFS_DMAC_VID,          /* lan966x is1 X1 */
31	VCAP_KFS_ETAG,              /* sparx5 is0 X2 */
32	VCAP_KFS_IP4_OTHER,         /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
33	VCAP_KFS_IP4_TCP_UDP,       /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
34	VCAP_KFS_IP4_VID,           /* sparx5 es2 X3 */
35	VCAP_KFS_IP6_OTHER,         /* lan966x is2 X4 */
36	VCAP_KFS_IP6_STD,           /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
37	VCAP_KFS_IP6_TCP_UDP,       /* lan966x is2 X4 */
38	VCAP_KFS_IP6_VID,           /* sparx5 es2 X6 */
39	VCAP_KFS_IP_7TUPLE,         /* sparx5 is2 X12, sparx5 es2 X12 */
40	VCAP_KFS_ISDX,              /* sparx5 es0 X1 */
41	VCAP_KFS_LL_FULL,           /* sparx5 is0 X6 */
42	VCAP_KFS_MAC_ETYPE,         /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
43	VCAP_KFS_MAC_LLC,           /* lan966x is2 X2 */
44	VCAP_KFS_MAC_SNAP,          /* lan966x is2 X2 */
45	VCAP_KFS_NORMAL,            /* lan966x is1 X2 */
46	VCAP_KFS_NORMAL_5TUPLE_IP4,  /* sparx5 is0 X6 */
47	VCAP_KFS_NORMAL_7TUPLE,     /* sparx5 is0 X12 */
48	VCAP_KFS_NORMAL_IP6,        /* lan966x is1 X4 */
49	VCAP_KFS_OAM,               /* lan966x is2 X2 */
50	VCAP_KFS_PURE_5TUPLE_IP4,   /* sparx5 is0 X3 */
51	VCAP_KFS_RT,                /* lan966x is1 X1 */
52	VCAP_KFS_SMAC_SIP4,         /* lan966x is2 X1 */
53	VCAP_KFS_SMAC_SIP6,         /* lan966x is2 X2 */
54	VCAP_KFS_VID,               /* lan966x es0 X1 */
55};
56
57/* List of keyfields with description
58 *
59 * Keys ending in _IS are booleans derived from frame data
60 * Keys ending in _CLS are classified frame data
61 *
62 * VCAP_KF_8021BR_ECID_BASE: W12, sparx5: is0
63 *   Used by 802.1BR Bridge Port Extension in an E-Tag
64 * VCAP_KF_8021BR_ECID_EXT: W8, sparx5: is0
65 *   Used by 802.1BR Bridge Port Extension in an E-Tag
66 * VCAP_KF_8021BR_E_TAGGED: W1, sparx5: is0
67 *   Set for frames containing an E-TAG (802.1BR Ethertype 893f)
68 * VCAP_KF_8021BR_GRP: W2, sparx5: is0
69 *   E-Tag group bits in 802.1BR Bridge Port Extension
70 * VCAP_KF_8021BR_IGR_ECID_BASE: W12, sparx5: is0
71 *   Used by 802.1BR Bridge Port Extension in an E-Tag
72 * VCAP_KF_8021BR_IGR_ECID_EXT: W8, sparx5: is0
73 *   Used by 802.1BR Bridge Port Extension in an E-Tag
74 * VCAP_KF_8021CB_R_TAGGED_IS: W1, lan966x: is1
75 *   Set if frame contains an RTAG: IEEE 802.1CB (FRER Redundancy tag, Ethertype
76 *   0xf1c1)
77 * VCAP_KF_8021Q_DEI0: W1, sparx5: is0, lan966x: is1
78 *   First DEI in multiple vlan tags (outer tag or default port tag)
79 * VCAP_KF_8021Q_DEI1: W1, sparx5: is0, lan966x: is1
80 *   Second DEI in multiple vlan tags (inner tag)
81 * VCAP_KF_8021Q_DEI2: W1, sparx5: is0
82 *   Third DEI in multiple vlan tags (not always available)
83 * VCAP_KF_8021Q_DEI_CLS: W1, sparx5: is2/es2, lan966x: is2/es0
84 *   Classified DEI
85 * VCAP_KF_8021Q_PCP0: W3, sparx5: is0, lan966x: is1
86 *   First PCP in multiple vlan tags (outer tag or default port tag)
87 * VCAP_KF_8021Q_PCP1: W3, sparx5: is0, lan966x: is1
88 *   Second PCP in multiple vlan tags (inner tag)
89 * VCAP_KF_8021Q_PCP2: W3, sparx5: is0
90 *   Third PCP in multiple vlan tags (not always available)
91 * VCAP_KF_8021Q_PCP_CLS: W3, sparx5: is2/es2, lan966x: is2/es0
92 *   Classified PCP
93 * VCAP_KF_8021Q_TPID: W3, sparx5: es0
94 *   TPID for outer tag: 0: Customer TPID 1: Service TPID (88A8 or programmable)
95 * VCAP_KF_8021Q_TPID0: sparx5 is0 W3, lan966x is1 W1
96 *   First TPIC in multiple vlan tags (outer tag or default port tag)
97 * VCAP_KF_8021Q_TPID1: sparx5 is0 W3, lan966x is1 W1
98 *   Second TPID in multiple vlan tags (inner tag)
99 * VCAP_KF_8021Q_TPID2: W3, sparx5: is0
100 *   Third TPID in multiple vlan tags (not always available)
101 * VCAP_KF_8021Q_VID0: W12, sparx5: is0, lan966x: is1
102 *   First VID in multiple vlan tags (outer tag or default port tag)
103 * VCAP_KF_8021Q_VID1: W12, sparx5: is0, lan966x: is1
104 *   Second VID in multiple vlan tags (inner tag)
105 * VCAP_KF_8021Q_VID2: W12, sparx5: is0
106 *   Third VID in multiple vlan tags (not always available)
107 * VCAP_KF_8021Q_VID_CLS: sparx5 is2 W13, sparx5 es0 W13, sparx5 es2 W13,
108 *   lan966x is2 W12, lan966x es0 W12
109 *   Classified VID
110 * VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS: W1, lan966x: is1
111 *   Set if frame has two or more Q-tags. Independent of port VLAN awareness
112 * VCAP_KF_8021Q_VLAN_TAGGED_IS: W1, sparx5: is2/es2, lan966x: is1/is2
113 *   Sparx5: Set if frame was received with a VLAN tag, LAN966x: Set if frame has
114 *   one or more Q-tags. Independent of port VLAN awareness
115 * VCAP_KF_8021Q_VLAN_TAGS: W3, sparx5: is0
116 *   Number of VLAN tags in frame: 0: Untagged, 1: Single tagged, 3: Double
117 *   tagged, 7: Triple tagged
118 * VCAP_KF_ACL_GRP_ID: W8, sparx5: es2
119 *   Used in interface map table
120 * VCAP_KF_ARP_ADDR_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2
121 *   Set if hardware address is Ethernet
122 * VCAP_KF_ARP_LEN_OK_IS: W1, sparx5: is2/es2, lan966x: is2
123 *   Set if hardware address length = 6 (Ethernet) and IP address length = 4 (IP).
124 * VCAP_KF_ARP_OPCODE: W2, sparx5: is2/es2, lan966x: is2
125 *   ARP opcode
126 * VCAP_KF_ARP_OPCODE_UNKNOWN_IS: W1, sparx5: is2/es2, lan966x: is2
127 *   Set if not one of the codes defined in VCAP_KF_ARP_OPCODE
128 * VCAP_KF_ARP_PROTO_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2
129 *   Set if protocol address space is 0x0800
130 * VCAP_KF_ARP_SENDER_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2
131 *   Sender Hardware Address = SMAC (ARP)
132 * VCAP_KF_ARP_TGT_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2
133 *   Target Hardware Address = SMAC (RARP)
134 * VCAP_KF_COSID_CLS: W3, sparx5: es0/es2
135 *   Class of service
136 * VCAP_KF_ES0_ISDX_KEY_ENA: W1, sparx5: es2
137 *   The value taken from the IFH .FWD.ES0_ISDX_KEY_ENA
138 * VCAP_KF_ETYPE: W16, sparx5: is0/is2/es2, lan966x: is1/is2
139 *   Ethernet type
140 * VCAP_KF_ETYPE_LEN_IS: W1, sparx5: is0/is2/es2, lan966x: is1
141 *   Set if frame has EtherType >= 0x600
142 * VCAP_KF_HOST_MATCH: W1, lan966x: is2
143 *   The action from the SMAC_SIP4 or SMAC_SIP6 lookups. Used for IP source
144 *   guarding.
145 * VCAP_KF_IF_EGR_PORT_MASK: W32, sparx5: es2
146 *   Egress port mask, one bit per port
147 * VCAP_KF_IF_EGR_PORT_MASK_RNG: W3, sparx5: es2
148 *   Select which 32 port group is available in IF_EGR_PORT (or virtual ports or
149 *   CPU queue)
150 * VCAP_KF_IF_EGR_PORT_NO: sparx5 es0 W7, lan966x es0 W4
151 *   Egress port number
152 * VCAP_KF_IF_IGR_PORT: sparx5 is0 W7, sparx5 es2 W9, lan966x is1 W3, lan966x
153 *   is2 W4, lan966x es0 W4
154 *   Sparx5: Logical ingress port number retrieved from
155 *   ANA_CL::PORT_ID_CFG.LPORT_NUM or ERLEG, LAN966x: ingress port nunmber
156 * VCAP_KF_IF_IGR_PORT_MASK: sparx5 is0 W65, sparx5 is2 W32, sparx5 is2 W65,
157 *   lan966x is1 W9, lan966x is2 W9
158 *   Ingress port mask, one bit per port/erleg
159 * VCAP_KF_IF_IGR_PORT_MASK_L3: W1, sparx5: is2
160 *   If set, IF_IGR_PORT_MASK, IF_IGR_PORT_MASK_RNG, and IF_IGR_PORT_MASK_SEL are
161 *   used to specify L3 interfaces
162 * VCAP_KF_IF_IGR_PORT_MASK_RNG: W4, sparx5: is2
163 *   Range selector for IF_IGR_PORT_MASK.  Specifies which group of 32 ports are
164 *   available in IF_IGR_PORT_MASK
165 * VCAP_KF_IF_IGR_PORT_MASK_SEL: W2, sparx5: is0/is2
166 *   Mode selector for IF_IGR_PORT_MASK, applicable when IF_IGR_PORT_MASK_L3 == 0.
167 *   Mapping: 0: DEFAULT 1: LOOPBACK 2: MASQUERADE 3: CPU_VD
168 * VCAP_KF_IF_IGR_PORT_SEL: W1, sparx5: es2
169 *   Selector for IF_IGR_PORT: physical port number or ERLEG
170 * VCAP_KF_IP4_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
171 *   Set if frame has EtherType = 0x800 and IP version = 4
172 * VCAP_KF_IP_MC_IS: W1, sparx5: is0, lan966x: is1
173 *   Set if frame is IPv4 frame and frame's destination MAC address is an IPv4
174 *   multicast address (0x01005E0 /25). Set if frame is IPv6 frame and frame's
175 *   destination MAC address is an IPv6 multicast address (0x3333/16).
176 * VCAP_KF_IP_PAYLOAD_5TUPLE: W32, sparx5: is0, lan966x: is1
177 *   Payload bytes after IP header
178 * VCAP_KF_IP_PAYLOAD_S1_IP6: W112, lan966x: is1
179 *   Payload after IPv6 header
180 * VCAP_KF_IP_SNAP_IS: W1, sparx5: is0, lan966x: is1
181 *   Set if frame is IPv4, IPv6, or SNAP frame
182 * VCAP_KF_ISDX_CLS: sparx5 is2 W12, sparx5 es0 W12, sparx5 es2 W12, lan966x es0
183 *   W8
184 *   Classified ISDX
185 * VCAP_KF_ISDX_GT0_IS: W1, sparx5: is2/es0/es2, lan966x: is2/es0
186 *   Set if classified ISDX > 0
187 * VCAP_KF_L2_BC_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2/es0
188 *   Set if frame's destination MAC address is the broadcast address
189 *   (FF-FF-FF-FF-FF-FF).
190 * VCAP_KF_L2_DMAC: W48, sparx5: is0/is2/es2, lan966x: is1/is2
191 *   Destination MAC address
192 * VCAP_KF_L2_FRM_TYPE: W4, lan966x: is2
193 *   Frame subtype for specific EtherTypes (MRP, DLR)
194 * VCAP_KF_L2_FWD_IS: W1, sparx5: is2
195 *   Set if the frame is allowed to be forwarded to front ports
196 * VCAP_KF_L2_LLC: W40, lan966x: is2
197 *   LLC header and data after up to two VLAN tags and the type/length field
198 * VCAP_KF_L2_MAC: W48, lan966x: is1
199 *   MAC address (FIRST=1: SMAC, FIRST=0: DMAC)
200 * VCAP_KF_L2_MC_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2/es0
201 *   Set if frame's destination MAC address is a multicast address (bit 40 = 1).
202 * VCAP_KF_L2_PAYLOAD0: W16, lan966x: is2
203 *   Payload bytes 0-1 after the frame's EtherType
204 * VCAP_KF_L2_PAYLOAD1: W8, lan966x: is2
205 *   Payload byte 4 after the frame's EtherType. This is specifically for PTP
206 *   frames.
207 * VCAP_KF_L2_PAYLOAD2: W3, lan966x: is2
208 *   Bits 7, 2, and 1 from payload byte 6 after the frame's EtherType. This is
209 *   specifically for PTP frames.
210 * VCAP_KF_L2_PAYLOAD_ETYPE: W64, sparx5: is2/es2
211 *   Byte 0-7 of L2 payload after Type/Len field and overloading for OAM
212 * VCAP_KF_L2_SMAC: W48, sparx5: is0/is2/es2, lan966x: is1/is2
213 *   Source MAC address
214 * VCAP_KF_L2_SNAP: W40, lan966x: is2
215 *   SNAP header after LLC header (AA-AA-03)
216 * VCAP_KF_L3_DIP_EQ_SIP_IS: W1, sparx5: is2/es2, lan966x: is2
217 *   Set if Src IP matches Dst IP address
218 * VCAP_KF_L3_DPL_CLS: W1, sparx5: es0/es2, lan966x: es0
219 *   The frames drop precedence level
220 * VCAP_KF_L3_DSCP: W6, sparx5: is0, lan966x: is1
221 *   Frame's DSCP value
222 * VCAP_KF_L3_DST_IS: W1, sparx5: is2
223 *   Set if lookup is done for egress router leg
224 * VCAP_KF_L3_FRAGMENT: W1, lan966x: is1/is2
225 *   Set if IPv4 frame is fragmented
226 * VCAP_KF_L3_FRAGMENT_TYPE: W2, sparx5: is0/is2/es2
227 *   L3 Fragmentation type (none, initial, suspicious, valid follow up)
228 * VCAP_KF_L3_FRAG_INVLD_L4_LEN: W1, sparx5: is0/is2
229 *   Set if frame's L4 length is less than ANA_CL:COMMON:CLM_FRAGMENT_CFG.L4_MIN_L
230 *   EN
231 * VCAP_KF_L3_FRAG_OFS_GT0: W1, lan966x: is1/is2
232 *   Set if IPv4 frame is fragmented and it is not the first fragment
233 * VCAP_KF_L3_IP4_DIP: W32, sparx5: is0/is2/es2, lan966x: is1/is2
234 *   Destination IPv4 Address
235 * VCAP_KF_L3_IP4_SIP: W32, sparx5: is0/is2/es2, lan966x: is1/is2
236 *   Source IPv4 Address
237 * VCAP_KF_L3_IP6_DIP: sparx5 is0 W128, sparx5 is2 W128, sparx5 es2 W128,
238 *   lan966x is1 W64, lan966x is1 W128, lan966x is2 W128
239 *   Sparx5: Full IPv6 DIP, LAN966x: Either Full IPv6 DIP or a subset depending on
240 *   frame type
241 * VCAP_KF_L3_IP6_DIP_MSB: W16, lan966x: is1
242 *   MS 16bits of IPv6 DIP
243 * VCAP_KF_L3_IP6_SIP: sparx5 is0 W128, sparx5 is2 W128, sparx5 es2 W128,
244 *   lan966x is1 W128, lan966x is1 W64, lan966x is2 W128
245 *   Sparx5: Full IPv6 SIP, LAN966x: Either Full IPv6 SIP or a subset depending on
246 *   frame type
247 * VCAP_KF_L3_IP6_SIP_MSB: W16, lan966x: is1
248 *   MS 16bits of IPv6 DIP
249 * VCAP_KF_L3_IP_PROTO: W8, sparx5: is0/is2/es2, lan966x: is1/is2
250 *   IPv4 frames: IP protocol. IPv6 frames: Next header, same as for IPV4
251 * VCAP_KF_L3_OPTIONS_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
252 *   Set if IPv4 frame contains options (IP len > 5)
253 * VCAP_KF_L3_PAYLOAD: sparx5 is2 W96, sparx5 is2 W40, sparx5 es2 W96, sparx5
254 *   es2 W40, lan966x is2 W56
255 *   Sparx5: Payload bytes after IP header. IPv4: IPv4 options are not parsed so
256 *   payload is always taken 20 bytes after the start of the IPv4 header, LAN966x:
257 *   Bytes 0-6 after IP header
258 * VCAP_KF_L3_RT_IS: W1, sparx5: is2/es2
259 *   Set if frame has hit a router leg
260 * VCAP_KF_L3_TOS: W8, sparx5: is2/es2, lan966x: is2
261 *   Sparx5: Frame's IPv4/IPv6 DSCP and ECN fields, LAN966x: IP TOS field
262 * VCAP_KF_L3_TTL_GT0: W1, sparx5: is2/es2, lan966x: is2
263 *   Set if IPv4 TTL / IPv6 hop limit is greater than 0
264 * VCAP_KF_L4_1588_DOM: W8, lan966x: is2
265 *   PTP over UDP: domainNumber
266 * VCAP_KF_L4_1588_VER: W4, lan966x: is2
267 *   PTP over UDP: version
268 * VCAP_KF_L4_ACK: W1, sparx5: is2/es2, lan966x: is2
269 *   Sparx5 and LAN966x: TCP flag ACK, LAN966x only: PTP over UDP: flagField bit 2
270 *   (unicastFlag)
271 * VCAP_KF_L4_DPORT: W16, sparx5: is2/es2, lan966x: is2
272 *   Sparx5: TCP/UDP destination port. Overloading for IP_7TUPLE: Non-TCP/UDP IP
273 *   frames: L4_DPORT = L3_IP_PROTO, LAN966x: TCP/UDP destination port
274 * VCAP_KF_L4_FIN: W1, sparx5: is2/es2, lan966x: is2
275 *   TCP flag FIN, LAN966x: TCP flag FIN, and for PTP over UDP: messageType bit 1
276 * VCAP_KF_L4_PAYLOAD: W64, sparx5: is2/es2
277 *   Payload bytes after TCP/UDP header Overloading for IP_7TUPLE: Non TCP/UDP
278 *   frames: Payload bytes 0-7 after IP header. IPv4 options are not parsed so
279 *   payload is always taken 20 bytes after the start of the IPv4 header for non
280 *   TCP/UDP IPv4 frames
281 * VCAP_KF_L4_PSH: W1, sparx5: is2/es2, lan966x: is2
282 *   Sparx5: TCP flag PSH, LAN966x: TCP: TCP flag PSH. PTP over UDP: flagField bit
283 *   1 (twoStepFlag)
284 * VCAP_KF_L4_RNG: sparx5 is0 W8, sparx5 is2 W16, sparx5 es2 W16, lan966x is1
285 *   W8, lan966x is2 W8
286 *   Range checker bitmask (one for each range checker). Input into range checkers
287 *   is taken from classified results (VID, DSCP) and frame (SPORT, DPORT, ETYPE,
288 *   outer VID, inner VID)
289 * VCAP_KF_L4_RST: W1, sparx5: is2/es2, lan966x: is2
290 *   Sparx5: TCP flag RST , LAN966x: TCP: TCP flag RST. PTP over UDP: messageType
291 *   bit 3
292 * VCAP_KF_L4_SEQUENCE_EQ0_IS: W1, sparx5: is2/es2, lan966x: is2
293 *   Set if TCP sequence number is 0, LAN966x: Overlayed with PTP over UDP:
294 *   messageType bit 0
295 * VCAP_KF_L4_SPORT: W16, sparx5: is0/is2/es2, lan966x: is1/is2
296 *   TCP/UDP source port
297 * VCAP_KF_L4_SPORT_EQ_DPORT_IS: W1, sparx5: is2/es2, lan966x: is2
298 *   Set if UDP or TCP source port equals UDP or TCP destination port
299 * VCAP_KF_L4_SYN: W1, sparx5: is2/es2, lan966x: is2
300 *   Sparx5: TCP flag SYN, LAN966x: TCP: TCP flag SYN. PTP over UDP: messageType
301 *   bit 2
302 * VCAP_KF_L4_URG: W1, sparx5: is2/es2, lan966x: is2
303 *   Sparx5: TCP flag URG, LAN966x: TCP: TCP flag URG. PTP over UDP: flagField bit
304 *   7 (reserved)
305 * VCAP_KF_LOOKUP_FIRST_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
306 *   Selects between entries relevant for first and second lookup. Set for first
307 *   lookup, cleared for second lookup.
308 * VCAP_KF_LOOKUP_GEN_IDX: W12, sparx5: is0
309 *   Generic index - for chaining CLM instances
310 * VCAP_KF_LOOKUP_GEN_IDX_SEL: W2, sparx5: is0
311 *   Select the mode of the Generic Index
312 * VCAP_KF_LOOKUP_INDEX: W2, lan966x: is1
313 *   0: First lookup, 1: Second lookup, 2: Third lookup, Similar to VCAP_KF_FIRST
314 *   but with extra info
315 * VCAP_KF_LOOKUP_PAG: W8, sparx5: is2, lan966x: is2
316 *   Classified Policy Association Group: chains rules from IS1/CLM to IS2
317 * VCAP_KF_MIRROR_PROBE: W2, sparx5: es2
318 *   Identifies frame copies generated as a result of mirroring
319 * VCAP_KF_OAM_CCM_CNTS_EQ0: W1, sparx5: is2/es2, lan966x: is2
320 *   Dual-ended loss measurement counters in CCM frames are all zero
321 * VCAP_KF_OAM_DETECTED: W1, lan966x: is2
322 *   This is missing in the datasheet, but present in the OAM keyset in XML
323 * VCAP_KF_OAM_FLAGS: W8, lan966x: is2
324 *   Frame's OAM flags
325 * VCAP_KF_OAM_MEL_FLAGS: W7, lan966x: is2
326 *   Encoding of MD level/MEG level (MEL)
327 * VCAP_KF_OAM_MEPID: W16, lan966x: is2
328 *   CCM frame's OAM MEP ID
329 * VCAP_KF_OAM_OPCODE: W8, lan966x: is2
330 *   Frame's OAM opcode
331 * VCAP_KF_OAM_VER: W5, lan966x: is2
332 *   Frame's OAM version
333 * VCAP_KF_OAM_Y1731_IS: W1, sparx5: is2/es2, lan966x: is2
334 *   Set if frame's EtherType = 0x8902
335 * VCAP_KF_PDU_TYPE: W4, lan966x: es0
336 *   PDU type value (none, OAM CCM, MRP, DLR, RTE, IPv4, IPv6, OAM non-CCM)
337 * VCAP_KF_PROT_ACTIVE: W1, sparx5: es0/es2
338 *   Protection is active
339 * VCAP_KF_RTP_ID: W10, lan966x: es0
340 *   Classified RTP_ID
341 * VCAP_KF_RT_FRMID: W32, lan966x: is1
342 *   Profinet or OPC-UA FrameId
343 * VCAP_KF_RT_TYPE: W2, lan966x: is1
344 *   Encoding of frame's EtherType: 0: Other, 1: Profinet, 2: OPC-UA, 3: Custom
345 *   (ANA::RT_CUSTOM)
346 * VCAP_KF_RT_VLAN_IDX: W3, lan966x: is1
347 *   Real-time VLAN index from ANA::RT_VLAN_PCP
348 * VCAP_KF_TCP_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
349 *   Set if frame is IPv4 TCP frame (IP protocol = 6) or IPv6 TCP frames (Next
350 *   header = 6)
351 * VCAP_KF_TCP_UDP_IS: W1, sparx5: is0/is2/es2, lan966x: is1
352 *   Set if frame is IPv4/IPv6 TCP or UDP frame (IP protocol/next header equals 6
353 *   or 17)
354 * VCAP_KF_TYPE: sparx5 is0 W2, sparx5 is0 W1, sparx5 is2 W4, sparx5 is2 W2,
355 *   sparx5 es0 W1, sparx5 es2 W3, lan966x is1 W1, lan966x is1 W2, lan966x is2 W4,
356 *   lan966x is2 W2
357 *   Keyset type id - set by the API
358 */
359
360/* Keyfield names */
361enum vcap_key_field {
362	VCAP_KF_NO_VALUE,  /* initial value */
363	VCAP_KF_8021BR_ECID_BASE,
364	VCAP_KF_8021BR_ECID_EXT,
365	VCAP_KF_8021BR_E_TAGGED,
366	VCAP_KF_8021BR_GRP,
367	VCAP_KF_8021BR_IGR_ECID_BASE,
368	VCAP_KF_8021BR_IGR_ECID_EXT,
369	VCAP_KF_8021CB_R_TAGGED_IS,
370	VCAP_KF_8021Q_DEI0,
371	VCAP_KF_8021Q_DEI1,
372	VCAP_KF_8021Q_DEI2,
373	VCAP_KF_8021Q_DEI_CLS,
374	VCAP_KF_8021Q_PCP0,
375	VCAP_KF_8021Q_PCP1,
376	VCAP_KF_8021Q_PCP2,
377	VCAP_KF_8021Q_PCP_CLS,
378	VCAP_KF_8021Q_TPID,
379	VCAP_KF_8021Q_TPID0,
380	VCAP_KF_8021Q_TPID1,
381	VCAP_KF_8021Q_TPID2,
382	VCAP_KF_8021Q_VID0,
383	VCAP_KF_8021Q_VID1,
384	VCAP_KF_8021Q_VID2,
385	VCAP_KF_8021Q_VID_CLS,
386	VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS,
387	VCAP_KF_8021Q_VLAN_TAGGED_IS,
388	VCAP_KF_8021Q_VLAN_TAGS,
389	VCAP_KF_ACL_GRP_ID,
390	VCAP_KF_ARP_ADDR_SPACE_OK_IS,
391	VCAP_KF_ARP_LEN_OK_IS,
392	VCAP_KF_ARP_OPCODE,
393	VCAP_KF_ARP_OPCODE_UNKNOWN_IS,
394	VCAP_KF_ARP_PROTO_SPACE_OK_IS,
395	VCAP_KF_ARP_SENDER_MATCH_IS,
396	VCAP_KF_ARP_TGT_MATCH_IS,
397	VCAP_KF_COSID_CLS,
398	VCAP_KF_ES0_ISDX_KEY_ENA,
399	VCAP_KF_ETYPE,
400	VCAP_KF_ETYPE_LEN_IS,
401	VCAP_KF_HOST_MATCH,
402	VCAP_KF_IF_EGR_PORT_MASK,
403	VCAP_KF_IF_EGR_PORT_MASK_RNG,
404	VCAP_KF_IF_EGR_PORT_NO,
405	VCAP_KF_IF_IGR_PORT,
406	VCAP_KF_IF_IGR_PORT_MASK,
407	VCAP_KF_IF_IGR_PORT_MASK_L3,
408	VCAP_KF_IF_IGR_PORT_MASK_RNG,
409	VCAP_KF_IF_IGR_PORT_MASK_SEL,
410	VCAP_KF_IF_IGR_PORT_SEL,
411	VCAP_KF_IP4_IS,
412	VCAP_KF_IP_MC_IS,
413	VCAP_KF_IP_PAYLOAD_5TUPLE,
414	VCAP_KF_IP_PAYLOAD_S1_IP6,
415	VCAP_KF_IP_SNAP_IS,
416	VCAP_KF_ISDX_CLS,
417	VCAP_KF_ISDX_GT0_IS,
418	VCAP_KF_L2_BC_IS,
419	VCAP_KF_L2_DMAC,
420	VCAP_KF_L2_FRM_TYPE,
421	VCAP_KF_L2_FWD_IS,
422	VCAP_KF_L2_LLC,
423	VCAP_KF_L2_MAC,
424	VCAP_KF_L2_MC_IS,
425	VCAP_KF_L2_PAYLOAD0,
426	VCAP_KF_L2_PAYLOAD1,
427	VCAP_KF_L2_PAYLOAD2,
428	VCAP_KF_L2_PAYLOAD_ETYPE,
429	VCAP_KF_L2_SMAC,
430	VCAP_KF_L2_SNAP,
431	VCAP_KF_L3_DIP_EQ_SIP_IS,
432	VCAP_KF_L3_DPL_CLS,
433	VCAP_KF_L3_DSCP,
434	VCAP_KF_L3_DST_IS,
435	VCAP_KF_L3_FRAGMENT,
436	VCAP_KF_L3_FRAGMENT_TYPE,
437	VCAP_KF_L3_FRAG_INVLD_L4_LEN,
438	VCAP_KF_L3_FRAG_OFS_GT0,
439	VCAP_KF_L3_IP4_DIP,
440	VCAP_KF_L3_IP4_SIP,
441	VCAP_KF_L3_IP6_DIP,
442	VCAP_KF_L3_IP6_DIP_MSB,
443	VCAP_KF_L3_IP6_SIP,
444	VCAP_KF_L3_IP6_SIP_MSB,
445	VCAP_KF_L3_IP_PROTO,
446	VCAP_KF_L3_OPTIONS_IS,
447	VCAP_KF_L3_PAYLOAD,
448	VCAP_KF_L3_RT_IS,
449	VCAP_KF_L3_TOS,
450	VCAP_KF_L3_TTL_GT0,
451	VCAP_KF_L4_1588_DOM,
452	VCAP_KF_L4_1588_VER,
453	VCAP_KF_L4_ACK,
454	VCAP_KF_L4_DPORT,
455	VCAP_KF_L4_FIN,
456	VCAP_KF_L4_PAYLOAD,
457	VCAP_KF_L4_PSH,
458	VCAP_KF_L4_RNG,
459	VCAP_KF_L4_RST,
460	VCAP_KF_L4_SEQUENCE_EQ0_IS,
461	VCAP_KF_L4_SPORT,
462	VCAP_KF_L4_SPORT_EQ_DPORT_IS,
463	VCAP_KF_L4_SYN,
464	VCAP_KF_L4_URG,
465	VCAP_KF_LOOKUP_FIRST_IS,
466	VCAP_KF_LOOKUP_GEN_IDX,
467	VCAP_KF_LOOKUP_GEN_IDX_SEL,
468	VCAP_KF_LOOKUP_INDEX,
469	VCAP_KF_LOOKUP_PAG,
470	VCAP_KF_MIRROR_PROBE,
471	VCAP_KF_OAM_CCM_CNTS_EQ0,
472	VCAP_KF_OAM_DETECTED,
473	VCAP_KF_OAM_FLAGS,
474	VCAP_KF_OAM_MEL_FLAGS,
475	VCAP_KF_OAM_MEPID,
476	VCAP_KF_OAM_OPCODE,
477	VCAP_KF_OAM_VER,
478	VCAP_KF_OAM_Y1731_IS,
479	VCAP_KF_PDU_TYPE,
480	VCAP_KF_PROT_ACTIVE,
481	VCAP_KF_RTP_ID,
482	VCAP_KF_RT_FRMID,
483	VCAP_KF_RT_TYPE,
484	VCAP_KF_RT_VLAN_IDX,
485	VCAP_KF_TCP_IS,
486	VCAP_KF_TCP_UDP_IS,
487	VCAP_KF_TYPE,
488};
489
490/* Actionset names with origin information */
491enum vcap_actionfield_set {
492	VCAP_AFS_NO_VALUE,          /* initial value */
493	VCAP_AFS_BASE_TYPE,         /* sparx5 is2 X3, sparx5 es2 X3, lan966x is2 X2 */
494	VCAP_AFS_CLASSIFICATION,    /* sparx5 is0 X2 */
495	VCAP_AFS_CLASS_REDUCED,     /* sparx5 is0 X1 */
496	VCAP_AFS_ES0,               /* sparx5 es0 X1 */
497	VCAP_AFS_FULL,              /* sparx5 is0 X3 */
498	VCAP_AFS_S1,                /* lan966x is1 X1 */
499	VCAP_AFS_SMAC_SIP,          /* lan966x is2 X1 */
500	VCAP_AFS_VID,               /* lan966x es0 X1 */
501};
502
503/* List of actionfields with description
504 *
505 * VCAP_AF_ACL_ID: W6, lan966x: is2
506 *   Logical ID for the entry. This ID is extracted together with the frame in the
507 *   CPU extraction header. Only applicable to actions with CPU_COPY_ENA or
508 *   HIT_ME_ONCE set.
509 * VCAP_AF_CLS_VID_SEL: W3, sparx5: is0
510 *   Controls the classified VID: 0: VID_NONE: No action. 1: VID_ADD: New VID =
511 *   old VID + VID_VAL. 2: VID_REPLACE: New VID = VID_VAL. 3: VID_FIRST_TAG: New
512 *   VID = VID from frame's first tag (outer tag) if available, otherwise VID_VAL.
513 *   4: VID_SECOND_TAG: New VID = VID from frame's second tag (middle tag) if
514 *   available, otherwise VID_VAL. 5: VID_THIRD_TAG: New VID = VID from frame's
515 *   third tag (inner tag) if available, otherwise VID_VAL.
516 * VCAP_AF_CNT_ID: sparx5 is2 W12, sparx5 es2 W11
517 *   Counter ID, used per lookup to index the 4K frame counters (ANA_ACL:CNT_TBL).
518 *   Multiple VCAP IS2 entries can use the same counter.
519 * VCAP_AF_COPY_PORT_NUM: W7, sparx5: es2
520 *   QSYS port number when FWD_MODE is redirect or copy
521 * VCAP_AF_COPY_QUEUE_NUM: W16, sparx5: es2
522 *   QSYS queue number when FWD_MODE is redirect or copy
523 * VCAP_AF_CPU_COPY_ENA: W1, sparx5: is2/es2, lan966x: is2
524 *   Setting this bit to 1 causes all frames that hit this action to be copied to
525 *   the CPU extraction queue specified in CPU_QUEUE_NUM.
526 * VCAP_AF_CPU_QU: W3, sparx5: es0
527 *   CPU extraction queue. Used when FWD_SEL >0 and PIPELINE_ACT = XTR.
528 * VCAP_AF_CPU_QUEUE_NUM: W3, sparx5: is2/es2, lan966x: is2
529 *   CPU queue number. Used when CPU_COPY_ENA is set.
530 * VCAP_AF_CUSTOM_ACE_TYPE_ENA: W4, lan966x: is1
531 *   Enables use of custom keys in IS2. Bits 3:2 control second lookup in IS2
532 *   while bits 1:0 control first lookup. Encoding per lookup: 0: Disabled.  1:
533 *   Extract 40 bytes after position corresponding to the location of the IPv4
534 *   header and use as key.  2: Extract 40 bytes after SMAC and use as key
535 * VCAP_AF_DEI_A_VAL: W1, sparx5: es0, lan966x: es0
536 *   DEI used in ES0 tag A. See TAG_A_DEI_SEL.
537 * VCAP_AF_DEI_B_VAL: W1, sparx5: es0, lan966x: es0
538 *   DEI used in ES0 tag B. See TAG_B_DEI_SEL.
539 * VCAP_AF_DEI_C_VAL: W1, sparx5: es0
540 *   DEI used in ES0 tag C. See TAG_C_DEI_SEL.
541 * VCAP_AF_DEI_ENA: W1, sparx5: is0, lan966x: is1
542 *   If set, use DEI_VAL as classified DEI value. Otherwise, DEI from basic
543 *   classification is used
544 * VCAP_AF_DEI_VAL: W1, sparx5: is0, lan966x: is1
545 *   See DEI_ENA
546 * VCAP_AF_DLR_SEL: W2, lan966x: is1
547 *   0: No changes to port-based selection in ANA:PORT:OAM_CFG.DLR_ENA.  1: Enable
548 *   DLR frame processing 2: Disable DLR processing
549 * VCAP_AF_DP_ENA: W1, sparx5: is0, lan966x: is1
550 *   If set, use DP_VAL as classified drop precedence level. Otherwise, drop
551 *   precedence level from basic classification is used.
552 * VCAP_AF_DP_VAL: sparx5 is0 W2, lan966x is1 W1
553 *   See DP_ENA.
554 * VCAP_AF_DSCP_ENA: W1, sparx5: is0, lan966x: is1
555 *   If set, use DSCP_VAL as classified DSCP value. Otherwise, DSCP value from
556 *   basic classification is used.
557 * VCAP_AF_DSCP_SEL: W3, sparx5: es0
558 *   Selects source for DSCP. 0: Controlled by port configuration and IFH. 1:
559 *   Classified DSCP via IFH. 2: DSCP_VAL. 3: Reserved. 4: Mapped using mapping
560 *   table 0, otherwise use DSCP_VAL. 5: Mapped using mapping table 1, otherwise
561 *   use mapping table 0. 6: Mapped using mapping table 2, otherwise use DSCP_VAL.
562 *   7: Mapped using mapping table 3, otherwise use mapping table 2
563 * VCAP_AF_DSCP_VAL: W6, sparx5: is0/es0, lan966x: is1
564 *   See DSCP_ENA.
565 * VCAP_AF_ES2_REW_CMD: W3, sparx5: es2
566 *   Command forwarded to REW: 0: No action. 1: SWAP MAC addresses. 2: Do L2CP
567 *   DMAC translation when entering or leaving a tunnel.
568 * VCAP_AF_ESDX: sparx5 es0 W13, lan966x es0 W8
569 *   Egress counter index. Used to index egress counter set as defined in
570 *   REW::STAT_CFG.
571 * VCAP_AF_FWD_KILL_ENA: W1, lan966x: is2
572 *   Setting this bit to 1 denies forwarding of the frame forwarding to any front
573 *   port. The frame can still be copied to the CPU by other actions.
574 * VCAP_AF_FWD_MODE: W2, sparx5: es2
575 *   Forward selector: 0: Forward. 1: Discard. 2: Redirect. 3: Copy.
576 * VCAP_AF_FWD_SEL: W2, sparx5: es0
577 *   ES0 Forward selector. 0: No action. 1: Copy to loopback interface. 2:
578 *   Redirect to loopback interface. 3: Discard
579 * VCAP_AF_HIT_ME_ONCE: W1, sparx5: is2/es2, lan966x: is2
580 *   Setting this bit to 1 causes the first frame that hits this action where the
581 *   HIT_CNT counter is zero to be copied to the CPU extraction queue specified in
582 *   CPU_QUEUE_NUM. The HIT_CNT counter is then incremented and any frames that
583 *   hit this action later are not copied to the CPU. To re-enable the HIT_ME_ONCE
584 *   functionality, the HIT_CNT counter must be cleared.
585 * VCAP_AF_HOST_MATCH: W1, lan966x: is2
586 *   Used for IP source guarding. If set, it signals that the host is a valid (for
587 *   instance a valid combination of source MAC address and source IP address).
588 *   HOST_MATCH is input to the IS2 keys.
589 * VCAP_AF_IGNORE_PIPELINE_CTRL: W1, sparx5: is2/es2
590 *   Ignore ingress pipeline control. This enforces the use of the VCAP IS2 action
591 *   even when the pipeline control has terminated the frame before VCAP IS2.
592 * VCAP_AF_INTR_ENA: W1, sparx5: is2/es2
593 *   If set, an interrupt is triggered when this rule is hit
594 * VCAP_AF_ISDX_ADD_REPLACE_SEL: W1, sparx5: is0
595 *   Controls the classified ISDX. 0: New ISDX = old ISDX + ISDX_VAL. 1: New ISDX
596 *   = ISDX_VAL.
597 * VCAP_AF_ISDX_ADD_VAL: W8, lan966x: is1
598 *   If ISDX_REPLACE_ENA is set, ISDX_ADD_VAL is used directly as the new ISDX.
599 *   Encoding: ISDX_REPLACE_ENA=0, ISDX_ADD_VAL=0: Disabled ISDX_EPLACE_ENA=0,
600 *   ISDX_ADD_VAL>0: Add value to classified ISDX. ISDX_REPLACE_ENA=1: Replace
601 *   with ISDX_ADD_VAL value.
602 * VCAP_AF_ISDX_ENA: W1, lan966x: is2
603 *   Setting this bit to 1 causes the classified ISDX to be set to the value of
604 *   POLICE_IDX[8:0].
605 * VCAP_AF_ISDX_REPLACE_ENA: W1, lan966x: is1
606 *   If set, classified ISDX is set to ISDX_ADD_VAL.
607 * VCAP_AF_ISDX_VAL: W12, sparx5: is0
608 *   See isdx_add_replace_sel
609 * VCAP_AF_LOOP_ENA: W1, sparx5: es0
610 *   0: Forward based on PIPELINE_PT and FWD_SEL
611 * VCAP_AF_LRN_DIS: W1, sparx5: is2, lan966x: is2
612 *   Setting this bit to 1 disables learning of frames hitting this action.
613 * VCAP_AF_MAP_IDX: W9, sparx5: is0
614 *   Index for QoS mapping table lookup
615 * VCAP_AF_MAP_KEY: W3, sparx5: is0
616 *   Key type for QoS mapping table lookup. 0: DEI0, PCP0 (outer tag). 1: DEI1,
617 *   PCP1 (middle tag). 2: DEI2, PCP2 (inner tag). 3: MPLS TC. 4: PCP0 (outer
618 *   tag). 5: E-DEI, E-PCP (E-TAG). 6: DSCP if available, otherwise none. 7: DSCP
619 *   if available, otherwise DEI0, PCP0 (outer tag) if available using MAP_IDX+8,
620 *   otherwise none
621 * VCAP_AF_MAP_LOOKUP_SEL: W2, sparx5: is0
622 *   Selects which of the two QoS Mapping Table lookups that MAP_KEY and MAP_IDX
623 *   are applied to. 0: No changes to the QoS Mapping Table lookup. 1: Update key
624 *   type and index for QoS Mapping Table lookup #0. 2: Update key type and index
625 *   for QoS Mapping Table lookup #1. 3: Reserved.
626 * VCAP_AF_MASK_MODE: sparx5 is0 W3, sparx5 is2 W3, lan966x is2 W2
627 *   Controls the PORT_MASK use. Sparx5: 0: OR_DSTMASK, 1: AND_VLANMASK, 2:
628 *   REPLACE_PGID, 3: REPLACE_ALL, 4: REDIR_PGID, 5: OR_PGID_MASK, 6: VSTAX, 7:
629 *   Not applicable. LAN966X: 0: No action, 1: Permit/deny (AND), 2: Policy
630 *   forwarding (DMAC lookup), 3: Redirect. The CPU port is untouched by
631 *   MASK_MODE.
632 * VCAP_AF_MATCH_ID: W16, sparx5: is2
633 *   Logical ID for the entry. The MATCH_ID is extracted together with the frame
634 *   if the frame is forwarded to the CPU (CPU_COPY_ENA). The result is placed in
635 *   IFH.CL_RSLT.
636 * VCAP_AF_MATCH_ID_MASK: W16, sparx5: is2
637 *   Mask used by MATCH_ID.
638 * VCAP_AF_MIRROR_ENA: W1, lan966x: is2
639 *   Setting this bit to 1 causes frames to be mirrored to the mirror target port
640 *   (ANA::MIRRPORPORTS).
641 * VCAP_AF_MIRROR_PROBE: W2, sparx5: is2
642 *   Mirroring performed according to configuration of a mirror probe. 0: No
643 *   mirroring. 1: Mirror probe 0. 2: Mirror probe 1. 3: Mirror probe 2
644 * VCAP_AF_MIRROR_PROBE_ID: W2, sparx5: es2
645 *   Signals a mirror probe to be placed in the IFH. Only possible when FWD_MODE
646 *   is copy. 0: No mirroring. 1-3: Use mirror probe 0-2.
647 * VCAP_AF_MRP_SEL: W2, lan966x: is1
648 *   0: No changes to port-based selection in ANA:PORT:OAM_CFG.MRP_ENA.  1: Enable
649 *   MRP frame processing 2: Disable MRP processing
650 * VCAP_AF_NXT_IDX: W12, sparx5: is0
651 *   Index used as part of key (field G_IDX) in the next lookup.
652 * VCAP_AF_NXT_IDX_CTRL: W3, sparx5: is0
653 *   Controls the generation of the G_IDX used in the VCAP CLM next lookup
654 * VCAP_AF_OAM_SEL: W3, lan966x: is1
655 *   0: No changes to port-based selection in ANA:PORT:OAM_CFG.OAM_CFG 1: Enable
656 *   OAM frame processing for untagged frames 2: Enable OAM frame processing for
657 *   single frames 3: Enable OAM frame processing for double frames 4: Disable OAM
658 *   frame processing
659 * VCAP_AF_PAG_OVERRIDE_MASK: W8, sparx5: is0, lan966x: is1
660 *   Bits set in this mask will override PAG_VAL from port profile. New PAG = (PAG
661 *   (input) AND ~PAG_OVERRIDE_MASK) OR (PAG_VAL AND PAG_OVERRIDE_MASK)
662 * VCAP_AF_PAG_VAL: W8, sparx5: is0, lan966x: is1
663 *   See PAG_OVERRIDE_MASK.
664 * VCAP_AF_PCP_A_VAL: W3, sparx5: es0, lan966x: es0
665 *   PCP used in ES0 tag A. See TAG_A_PCP_SEL.
666 * VCAP_AF_PCP_B_VAL: W3, sparx5: es0, lan966x: es0
667 *   PCP used in ES0 tag B. See TAG_B_PCP_SEL.
668 * VCAP_AF_PCP_C_VAL: W3, sparx5: es0
669 *   PCP used in ES0 tag C. See TAG_C_PCP_SEL.
670 * VCAP_AF_PCP_ENA: W1, sparx5: is0, lan966x: is1
671 *   If set, use PCP_VAL as classified PCP value. Otherwise, PCP from basic
672 *   classification is used.
673 * VCAP_AF_PCP_VAL: W3, sparx5: is0, lan966x: is1
674 *   See PCP_ENA.
675 * VCAP_AF_PIPELINE_ACT: W1, sparx5: es0
676 *   Pipeline action when FWD_SEL > 0. 0: XTR. CPU_QU selects CPU extraction queue
677 *   1: LBK_ASM.
678 * VCAP_AF_PIPELINE_FORCE_ENA: W1, sparx5: is2
679 *   If set, use PIPELINE_PT unconditionally and set PIPELINE_ACT = NONE if
680 *   PIPELINE_PT == NONE. Overrules previous settings of pipeline point.
681 * VCAP_AF_PIPELINE_PT: sparx5 is2 W5, sparx5 es0 W2
682 *   Pipeline point used if PIPELINE_FORCE_ENA is set
683 * VCAP_AF_POLICE_ENA: W1, sparx5: is2/es2, lan966x: is1/is2
684 *   If set, POLICE_IDX is used to lookup ANA::POL.
685 * VCAP_AF_POLICE_IDX: sparx5 is2 W6, sparx5 es2 W6, lan966x is1 W9, lan966x is2
686 *   W9
687 *   Policer index.
688 * VCAP_AF_POLICE_REMARK: W1, sparx5: es2
689 *   If set, frames exceeding policer rates are marked as yellow but not
690 *   discarded.
691 * VCAP_AF_POLICE_VCAP_ONLY: W1, lan966x: is2
692 *   Disable policing from QoS, and port policers. Only the VCAP policer selected
693 *   by POLICE_IDX is active. Only applies to the second lookup.
694 * VCAP_AF_POP_VAL: W2, sparx5: es0
695 *   Controls popping of Q-tags. The final number of Q-tags popped is calculated
696 *   as shown in section 4.28.7.2 VLAN Pop Decision.
697 * VCAP_AF_PORT_MASK: sparx5 is0 W65, sparx5 is2 W68, lan966x is2 W8
698 *   Port mask applied to the forwarding decision based on MASK_MODE.
699 * VCAP_AF_PUSH_CUSTOMER_TAG: W2, sparx5: es0
700 *   Selects tag C mode: 0: Do not push tag C. 1: Push tag C if
701 *   IFH.VSTAX.TAG.WAS_TAGGED = 1. 2: Push tag C if IFH.VSTAX.TAG.WAS_TAGGED = 0.
702 *   3: Push tag C if UNTAG_VID_ENA = 0 or (C-TAG.VID ! = VID_C_VAL).
703 * VCAP_AF_PUSH_INNER_TAG: W1, sparx5: es0, lan966x: es0
704 *   Controls inner tagging. 0: Do not push ES0 tag B as inner tag. 1: Push ES0
705 *   tag B as inner tag.
706 * VCAP_AF_PUSH_OUTER_TAG: W2, sparx5: es0, lan966x: es0
707 *   Controls outer tagging. 0: No ES0 tag A: Port tag is allowed if enabled on
708 *   port. 1: ES0 tag A: Push ES0 tag A. No port tag. 2: Force port tag: Always
709 *   push port tag. No ES0 tag A. 3: Force untag: Never push port tag or ES0 tag
710 *   A.
711 * VCAP_AF_QOS_ENA: W1, sparx5: is0, lan966x: is1
712 *   If set, use QOS_VAL as classified QoS class. Otherwise, QoS class from basic
713 *   classification is used.
714 * VCAP_AF_QOS_VAL: W3, sparx5: is0, lan966x: is1
715 *   See QOS_ENA.
716 * VCAP_AF_REW_OP: W16, lan966x: is2
717 *   Rewriter operation command.
718 * VCAP_AF_RT_DIS: W1, sparx5: is2
719 *   If set, routing is disallowed. Only applies when IS_INNER_ACL is 0. See also
720 *   IGR_ACL_ENA, EGR_ACL_ENA, and RLEG_STAT_IDX.
721 * VCAP_AF_SFID_ENA: W1, lan966x: is1
722 *   If set, SFID_VAL is used to lookup ANA::SFID.
723 * VCAP_AF_SFID_VAL: W8, lan966x: is1
724 *   Stream filter identifier.
725 * VCAP_AF_SGID_ENA: W1, lan966x: is1
726 *   If set, SGID_VAL is used to lookup ANA::SGID.
727 * VCAP_AF_SGID_VAL: W8, lan966x: is1
728 *   Stream gate identifier.
729 * VCAP_AF_SWAP_MACS_ENA: W1, sparx5: es0
730 *   This setting is only active when FWD_SEL = 1 or FWD_SEL = 2 and PIPELINE_ACT
731 *   = LBK_ASM. 0: No action. 1: Swap MACs and clear bit 40 in new SMAC.
732 * VCAP_AF_TAG_A_DEI_SEL: sparx5 es0 W3, lan966x es0 W2
733 *   Selects PCP for ES0 tag A. 0: Classified DEI. 1: DEI_A_VAL. 2: DP and QoS
734 *   mapped to PCP (per port table). 3: DP.
735 * VCAP_AF_TAG_A_PCP_SEL: sparx5 es0 W3, lan966x es0 W2
736 *   Selects PCP for ES0 tag A. 0: Classified PCP. 1: PCP_A_VAL. 2: DP and QoS
737 *   mapped to PCP (per port table). 3: QoS class.
738 * VCAP_AF_TAG_A_TPID_SEL: sparx5 es0 W3, lan966x es0 W2
739 *   Selects TPID for ES0 tag A: 0: 0x8100. 1: 0x88A8. 2: Custom
740 *   (REW:PORT:PORT_VLAN_CFG.PORT_TPID). 3: If IFH.TAG_TYPE = 0 then 0x8100 else
741 *   custom.
742 * VCAP_AF_TAG_A_VID_SEL: sparx5 es0 W2, lan966x es0 W1
743 *   Selects VID for ES0 tag A. 0: Classified VID + VID_A_VAL. 1: VID_A_VAL.
744 * VCAP_AF_TAG_B_DEI_SEL: sparx5 es0 W3, lan966x es0 W2
745 *   Selects PCP for ES0 tag B. 0: Classified DEI. 1: DEI_B_VAL. 2: DP and QoS
746 *   mapped to PCP (per port table). 3: DP.
747 * VCAP_AF_TAG_B_PCP_SEL: sparx5 es0 W3, lan966x es0 W2
748 *   Selects PCP for ES0 tag B. 0: Classified PCP. 1: PCP_B_VAL. 2: DP and QoS
749 *   mapped to PCP (per port table). 3: QoS class.
750 * VCAP_AF_TAG_B_TPID_SEL: sparx5 es0 W3, lan966x es0 W2
751 *   Selects TPID for ES0 tag B. 0: 0x8100. 1: 0x88A8. 2: Custom
752 *   (REW:PORT:PORT_VLAN_CFG.PORT_TPID). 3: If IFH.TAG_TYPE = 0 then 0x8100 else
753 *   custom.
754 * VCAP_AF_TAG_B_VID_SEL: sparx5 es0 W2, lan966x es0 W1
755 *   Selects VID for ES0 tag B. 0: Classified VID + VID_B_VAL. 1: VID_B_VAL.
756 * VCAP_AF_TAG_C_DEI_SEL: W3, sparx5: es0
757 *   Selects DEI source for ES0 tag C. 0: Classified DEI. 1: DEI_C_VAL. 2:
758 *   REW::DP_MAP.DP [IFH.VSTAX.QOS.DP]. 3: DEI of popped VLAN tag if available
759 *   (IFH.VSTAX.TAG.WAS_TAGGED = 1 and tot_pop_cnt>0) else DEI_C_VAL. 4: Mapped
760 *   using mapping table 0, otherwise use DEI_C_VAL. 5: Mapped using mapping table
761 *   1, otherwise use mapping table 0. 6: Mapped using mapping table 2, otherwise
762 *   use DEI_C_VAL. 7: Mapped using mapping table 3, otherwise use mapping table
763 *   2.
764 * VCAP_AF_TAG_C_PCP_SEL: W3, sparx5: es0
765 *   Selects PCP source for ES0 tag C. 0: Classified PCP. 1: PCP_C_VAL. 2:
766 *   Reserved. 3: PCP of popped VLAN tag if available (IFH.VSTAX.TAG.WAS_TAGGED=1
767 *   and tot_pop_cnt>0) else PCP_C_VAL. 4: Mapped using mapping table 0, otherwise
768 *   use PCP_C_VAL. 5: Mapped using mapping table 1, otherwise use mapping table
769 *   0. 6: Mapped using mapping table 2, otherwise use PCP_C_VAL. 7: Mapped using
770 *   mapping table 3, otherwise use mapping table 2.
771 * VCAP_AF_TAG_C_TPID_SEL: W3, sparx5: es0
772 *   Selects TPID for ES0 tag C. 0: 0x8100. 1: 0x88A8. 2: Custom 1. 3: Custom 2.
773 *   4: Custom 3. 5: See TAG_A_TPID_SEL.
774 * VCAP_AF_TAG_C_VID_SEL: W2, sparx5: es0
775 *   Selects VID for ES0 tag C. The resulting VID is termed C-TAG.VID. 0:
776 *   Classified VID. 1: VID_C_VAL. 2: IFH.ENCAP.GVID. 3: Reserved.
777 * VCAP_AF_TYPE: W1, sparx5: is0, lan966x: is1
778 *   Actionset type id - Set by the API
779 * VCAP_AF_UNTAG_VID_ENA: W1, sparx5: es0
780 *   Controls insertion of tag C. Untag or insert mode can be selected. See
781 *   PUSH_CUSTOMER_TAG.
782 * VCAP_AF_VID_A_VAL: W12, sparx5: es0, lan966x: es0
783 *   VID used in ES0 tag A. See TAG_A_VID_SEL.
784 * VCAP_AF_VID_B_VAL: W12, sparx5: es0, lan966x: es0
785 *   VID used in ES0 tag B. See TAG_B_VID_SEL.
786 * VCAP_AF_VID_C_VAL: W12, sparx5: es0
787 *   VID used in ES0 tag C. See TAG_C_VID_SEL.
788 * VCAP_AF_VID_REPLACE_ENA: W1, lan966x: is1
789 *   Controls the classified VID: VID_REPLACE_ENA=0: Add VID_ADD_VAL to basic
790 *   classified VID and use result as new classified VID. VID_REPLACE_ENA = 1:
791 *   Replace basic classified VID with VID_VAL value and use as new classified
792 *   VID.
793 * VCAP_AF_VID_VAL: sparx5 is0 W13, lan966x is1 W12
794 *   New VID Value
795 * VCAP_AF_VLAN_POP_CNT: W2, lan966x: is1
796 *   See VLAN_POP_CNT_ENA
797 * VCAP_AF_VLAN_POP_CNT_ENA: W1, lan966x: is1
798 *   If set, use VLAN_POP_CNT as the number of VLAN tags to pop from the incoming
799 *   frame. This number is used by the Rewriter. Otherwise, VLAN_POP_CNT from
800 *   ANA:PORT:VLAN_CFG.VLAN_POP_CNT is used
801 */
802
803/* Actionfield names */
804enum vcap_action_field {
805	VCAP_AF_NO_VALUE,  /* initial value */
806	VCAP_AF_ACL_ID,
807	VCAP_AF_CLS_VID_SEL,
808	VCAP_AF_CNT_ID,
809	VCAP_AF_COPY_PORT_NUM,
810	VCAP_AF_COPY_QUEUE_NUM,
811	VCAP_AF_CPU_COPY_ENA,
812	VCAP_AF_CPU_QU,
813	VCAP_AF_CPU_QUEUE_NUM,
814	VCAP_AF_CUSTOM_ACE_TYPE_ENA,
815	VCAP_AF_DEI_A_VAL,
816	VCAP_AF_DEI_B_VAL,
817	VCAP_AF_DEI_C_VAL,
818	VCAP_AF_DEI_ENA,
819	VCAP_AF_DEI_VAL,
820	VCAP_AF_DLR_SEL,
821	VCAP_AF_DP_ENA,
822	VCAP_AF_DP_VAL,
823	VCAP_AF_DSCP_ENA,
824	VCAP_AF_DSCP_SEL,
825	VCAP_AF_DSCP_VAL,
826	VCAP_AF_ES2_REW_CMD,
827	VCAP_AF_ESDX,
828	VCAP_AF_FWD_KILL_ENA,
829	VCAP_AF_FWD_MODE,
830	VCAP_AF_FWD_SEL,
831	VCAP_AF_HIT_ME_ONCE,
832	VCAP_AF_HOST_MATCH,
833	VCAP_AF_IGNORE_PIPELINE_CTRL,
834	VCAP_AF_INTR_ENA,
835	VCAP_AF_ISDX_ADD_REPLACE_SEL,
836	VCAP_AF_ISDX_ADD_VAL,
837	VCAP_AF_ISDX_ENA,
838	VCAP_AF_ISDX_REPLACE_ENA,
839	VCAP_AF_ISDX_VAL,
840	VCAP_AF_LOOP_ENA,
841	VCAP_AF_LRN_DIS,
842	VCAP_AF_MAP_IDX,
843	VCAP_AF_MAP_KEY,
844	VCAP_AF_MAP_LOOKUP_SEL,
845	VCAP_AF_MASK_MODE,
846	VCAP_AF_MATCH_ID,
847	VCAP_AF_MATCH_ID_MASK,
848	VCAP_AF_MIRROR_ENA,
849	VCAP_AF_MIRROR_PROBE,
850	VCAP_AF_MIRROR_PROBE_ID,
851	VCAP_AF_MRP_SEL,
852	VCAP_AF_NXT_IDX,
853	VCAP_AF_NXT_IDX_CTRL,
854	VCAP_AF_OAM_SEL,
855	VCAP_AF_PAG_OVERRIDE_MASK,
856	VCAP_AF_PAG_VAL,
857	VCAP_AF_PCP_A_VAL,
858	VCAP_AF_PCP_B_VAL,
859	VCAP_AF_PCP_C_VAL,
860	VCAP_AF_PCP_ENA,
861	VCAP_AF_PCP_VAL,
862	VCAP_AF_PIPELINE_ACT,
863	VCAP_AF_PIPELINE_FORCE_ENA,
864	VCAP_AF_PIPELINE_PT,
865	VCAP_AF_POLICE_ENA,
866	VCAP_AF_POLICE_IDX,
867	VCAP_AF_POLICE_REMARK,
868	VCAP_AF_POLICE_VCAP_ONLY,
869	VCAP_AF_POP_VAL,
870	VCAP_AF_PORT_MASK,
871	VCAP_AF_PUSH_CUSTOMER_TAG,
872	VCAP_AF_PUSH_INNER_TAG,
873	VCAP_AF_PUSH_OUTER_TAG,
874	VCAP_AF_QOS_ENA,
875	VCAP_AF_QOS_VAL,
876	VCAP_AF_REW_OP,
877	VCAP_AF_RT_DIS,
878	VCAP_AF_SFID_ENA,
879	VCAP_AF_SFID_VAL,
880	VCAP_AF_SGID_ENA,
881	VCAP_AF_SGID_VAL,
882	VCAP_AF_SWAP_MACS_ENA,
883	VCAP_AF_TAG_A_DEI_SEL,
884	VCAP_AF_TAG_A_PCP_SEL,
885	VCAP_AF_TAG_A_TPID_SEL,
886	VCAP_AF_TAG_A_VID_SEL,
887	VCAP_AF_TAG_B_DEI_SEL,
888	VCAP_AF_TAG_B_PCP_SEL,
889	VCAP_AF_TAG_B_TPID_SEL,
890	VCAP_AF_TAG_B_VID_SEL,
891	VCAP_AF_TAG_C_DEI_SEL,
892	VCAP_AF_TAG_C_PCP_SEL,
893	VCAP_AF_TAG_C_TPID_SEL,
894	VCAP_AF_TAG_C_VID_SEL,
895	VCAP_AF_TYPE,
896	VCAP_AF_UNTAG_VID_ENA,
897	VCAP_AF_VID_A_VAL,
898	VCAP_AF_VID_B_VAL,
899	VCAP_AF_VID_C_VAL,
900	VCAP_AF_VID_REPLACE_ENA,
901	VCAP_AF_VID_VAL,
902	VCAP_AF_VLAN_POP_CNT,
903	VCAP_AF_VLAN_POP_CNT_ENA,
904};
905
906#endif /* __VCAP_AG_API__ */
907