1/*
2 * Copyright (c) 2018, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#ifndef __MLX5E_EN_PORT_H
34#define __MLX5E_EN_PORT_H
35
36#include <linux/mlx5/driver.h>
37#include "en.h"
38
39void mlx5_port_query_eth_autoneg(struct mlx5_core_dev *dev, u8 *an_status,
40				 u8 *an_disable_cap, u8 *an_disable_admin);
41int mlx5_port_set_eth_ptys(struct mlx5_core_dev *dev, bool an_disable,
42			   u32 proto_admin, bool ext);
43int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
44int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out);
45int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in);
46int mlx5e_port_query_sbpr(struct mlx5_core_dev *mdev, u32 desc, u8 dir,
47			  u8 pool_idx, void *out, int size_out);
48int mlx5e_port_set_sbpr(struct mlx5_core_dev *mdev, u32 desc, u8 dir,
49			u8 pool_idx, u32 infi_size, u32 size);
50int mlx5e_port_set_sbcm(struct mlx5_core_dev *mdev, u32 desc, u8 pg_buff_idx,
51			u8 dir, u8 infi_size, u32 max_buff, u8 pool_idx);
52int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer);
53int mlx5e_port_set_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer);
54
55bool mlx5e_fec_in_caps(struct mlx5_core_dev *dev, int fec_policy);
56int mlx5e_get_fec_mode(struct mlx5_core_dev *dev, u32 *fec_mode_active,
57		       u16 *fec_configured_mode);
58int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u16 fec_policy);
59
60enum {
61	MLX5E_FEC_NOFEC,
62	MLX5E_FEC_FIRECODE,
63	MLX5E_FEC_RS_528_514,
64	MLX5E_FEC_RS_544_514 = 7,
65	MLX5E_FEC_LLRS_272_257_1 = 9,
66};
67
68#endif
69