1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Applied Micro X-Gene SoC Ethernet v2 Driver
4 *
5 * Copyright (c) 2017, Applied Micro Circuits Corporation
6 * Author(s): Iyappan Subramanian <isubramanian@apm.com>
7 *	      Keyur Chudgar <kchudgar@apm.com>
8 */
9
10#include "main.h"
11
12void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val)
13{
14	void __iomem *addr = pdata->resources.base_addr + offset;
15
16	iowrite32(val, addr);
17}
18
19u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset)
20{
21	void __iomem *addr = pdata->resources.base_addr + offset;
22
23	return ioread32(addr);
24}
25
26int xge_port_reset(struct net_device *ndev)
27{
28	struct xge_pdata *pdata = netdev_priv(ndev);
29	struct device *dev = &pdata->pdev->dev;
30	u32 data, wait = 10;
31
32	xge_wr_csr(pdata, ENET_CLKEN, 0x3);
33	xge_wr_csr(pdata, ENET_SRST, 0xf);
34	xge_wr_csr(pdata, ENET_SRST, 0);
35	xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 1);
36	xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 0);
37
38	do {
39		usleep_range(100, 110);
40		data = xge_rd_csr(pdata, BLOCK_MEM_RDY);
41	} while (data != MEM_RDY && wait--);
42
43	if (data != MEM_RDY) {
44		dev_err(dev, "ECC init failed: %x\n", data);
45		return -ETIMEDOUT;
46	}
47
48	xge_wr_csr(pdata, ENET_SHIM, DEVM_ARAUX_COH | DEVM_AWAUX_COH);
49
50	return 0;
51}
52
53static void xge_traffic_resume(struct net_device *ndev)
54{
55	struct xge_pdata *pdata = netdev_priv(ndev);
56
57	xge_wr_csr(pdata, CFG_FORCE_LINK_STATUS_EN, 1);
58	xge_wr_csr(pdata, FORCE_LINK_STATUS, 1);
59
60	xge_wr_csr(pdata, CFG_LINK_AGGR_RESUME, 1);
61	xge_wr_csr(pdata, RX_DV_GATE_REG, 1);
62}
63
64void xge_port_init(struct net_device *ndev)
65{
66	struct xge_pdata *pdata = netdev_priv(ndev);
67
68	pdata->phy_speed = SPEED_1000;
69	xge_mac_init(pdata);
70	xge_traffic_resume(ndev);
71}
72