1/* 2 * AMD 10Gb Ethernet driver 3 * 4 * This file is available to you under your choice of the following two 5 * licenses: 6 * 7 * License 1: GPLv2 8 * 9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc. 10 * 11 * This file is free software; you may copy, redistribute and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see <http://www.gnu.org/licenses/>. 23 * 24 * This file incorporates work covered by the following copyright and 25 * permission notice: 26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 28 * Inc. unless otherwise expressly agreed to in writing between Synopsys 29 * and you. 30 * 31 * The Software IS NOT an item of Licensed Software or Licensed Product 32 * under any End User Software License Agreement or Agreement for Licensed 33 * Product with Synopsys or any supplement thereto. Permission is hereby 34 * granted, free of charge, to any person obtaining a copy of this software 35 * annotated with this license and the Software, to deal in the Software 36 * without restriction, including without limitation the rights to use, 37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 38 * of the Software, and to permit persons to whom the Software is furnished 39 * to do so, subject to the following conditions: 40 * 41 * The above copyright notice and this permission notice shall be included 42 * in all copies or substantial portions of the Software. 43 * 44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 54 * THE POSSIBILITY OF SUCH DAMAGE. 55 * 56 * 57 * License 2: Modified BSD 58 * 59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions are met: 64 * * Redistributions of source code must retain the above copyright 65 * notice, this list of conditions and the following disclaimer. 66 * * Redistributions in binary form must reproduce the above copyright 67 * notice, this list of conditions and the following disclaimer in the 68 * documentation and/or other materials provided with the distribution. 69 * * Neither the name of Advanced Micro Devices, Inc. nor the 70 * names of its contributors may be used to endorse or promote products 71 * derived from this software without specific prior written permission. 72 * 73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY 77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 83 * 84 * This file incorporates work covered by the following copyright and 85 * permission notice: 86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 88 * Inc. unless otherwise expressly agreed to in writing between Synopsys 89 * and you. 90 * 91 * The Software IS NOT an item of Licensed Software or Licensed Product 92 * under any End User Software License Agreement or Agreement for Licensed 93 * Product with Synopsys or any supplement thereto. Permission is hereby 94 * granted, free of charge, to any person obtaining a copy of this software 95 * annotated with this license and the Software, to deal in the Software 96 * without restriction, including without limitation the rights to use, 97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 98 * of the Software, and to permit persons to whom the Software is furnished 99 * to do so, subject to the following conditions: 100 * 101 * The above copyright notice and this permission notice shall be included 102 * in all copies or substantial portions of the Software. 103 * 104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 114 * THE POSSIBILITY OF SUCH DAMAGE. 115 */ 116 117#include <linux/module.h> 118#include <linux/device.h> 119#include <linux/spinlock.h> 120#include <linux/netdevice.h> 121#include <linux/etherdevice.h> 122#include <linux/io.h> 123#include <linux/notifier.h> 124 125#include "xgbe.h" 126#include "xgbe-common.h" 127 128MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>"); 129MODULE_LICENSE("Dual BSD/GPL"); 130MODULE_DESCRIPTION(XGBE_DRV_DESC); 131 132static int debug = -1; 133module_param(debug, int, 0644); 134MODULE_PARM_DESC(debug, " Network interface message level setting"); 135 136static const u32 default_msg_level = (NETIF_MSG_LINK | NETIF_MSG_IFDOWN | 137 NETIF_MSG_IFUP); 138 139static void xgbe_default_config(struct xgbe_prv_data *pdata) 140{ 141 DBGPR("-->xgbe_default_config\n"); 142 143 pdata->blen = DMA_SBMR_BLEN_64; 144 pdata->pbl = DMA_PBL_128; 145 pdata->aal = 1; 146 pdata->rd_osr_limit = 8; 147 pdata->wr_osr_limit = 8; 148 pdata->tx_sf_mode = MTL_TSF_ENABLE; 149 pdata->tx_threshold = MTL_TX_THRESHOLD_64; 150 pdata->tx_osp_mode = DMA_OSP_ENABLE; 151 pdata->rx_sf_mode = MTL_RSF_DISABLE; 152 pdata->rx_threshold = MTL_RX_THRESHOLD_64; 153 pdata->pause_autoneg = 1; 154 pdata->tx_pause = 1; 155 pdata->rx_pause = 1; 156 pdata->phy_speed = SPEED_UNKNOWN; 157 pdata->power_down = 0; 158 159 DBGPR("<--xgbe_default_config\n"); 160} 161 162static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata) 163{ 164 xgbe_init_function_ptrs_dev(&pdata->hw_if); 165 xgbe_init_function_ptrs_phy(&pdata->phy_if); 166 xgbe_init_function_ptrs_i2c(&pdata->i2c_if); 167 xgbe_init_function_ptrs_desc(&pdata->desc_if); 168 169 pdata->vdata->init_function_ptrs_phy_impl(&pdata->phy_if); 170} 171 172struct xgbe_prv_data *xgbe_alloc_pdata(struct device *dev) 173{ 174 struct xgbe_prv_data *pdata; 175 struct net_device *netdev; 176 177 netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data), 178 XGBE_MAX_DMA_CHANNELS); 179 if (!netdev) { 180 dev_err(dev, "alloc_etherdev_mq failed\n"); 181 return ERR_PTR(-ENOMEM); 182 } 183 SET_NETDEV_DEV(netdev, dev); 184 pdata = netdev_priv(netdev); 185 pdata->netdev = netdev; 186 pdata->dev = dev; 187 188 spin_lock_init(&pdata->lock); 189 spin_lock_init(&pdata->xpcs_lock); 190 mutex_init(&pdata->rss_mutex); 191 spin_lock_init(&pdata->tstamp_lock); 192 mutex_init(&pdata->i2c_mutex); 193 init_completion(&pdata->i2c_complete); 194 init_completion(&pdata->mdio_complete); 195 196 pdata->msg_enable = netif_msg_init(debug, default_msg_level); 197 198 set_bit(XGBE_DOWN, &pdata->dev_state); 199 set_bit(XGBE_STOPPED, &pdata->dev_state); 200 201 return pdata; 202} 203 204void xgbe_free_pdata(struct xgbe_prv_data *pdata) 205{ 206 struct net_device *netdev = pdata->netdev; 207 208 free_netdev(netdev); 209} 210 211void xgbe_set_counts(struct xgbe_prv_data *pdata) 212{ 213 /* Set all the function pointers */ 214 xgbe_init_all_fptrs(pdata); 215 216 /* Populate the hardware features */ 217 xgbe_get_all_hw_features(pdata); 218 219 /* Set default max values if not provided */ 220 if (!pdata->tx_max_channel_count) 221 pdata->tx_max_channel_count = pdata->hw_feat.tx_ch_cnt; 222 if (!pdata->rx_max_channel_count) 223 pdata->rx_max_channel_count = pdata->hw_feat.rx_ch_cnt; 224 225 if (!pdata->tx_max_q_count) 226 pdata->tx_max_q_count = pdata->hw_feat.tx_q_cnt; 227 if (!pdata->rx_max_q_count) 228 pdata->rx_max_q_count = pdata->hw_feat.rx_q_cnt; 229 230 /* Calculate the number of Tx and Rx rings to be created 231 * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set 232 * the number of Tx queues to the number of Tx channels 233 * enabled 234 * -Rx (DMA) Channels do not map 1-to-1 so use the actual 235 * number of Rx queues or maximum allowed 236 */ 237 pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(), 238 pdata->hw_feat.tx_ch_cnt); 239 pdata->tx_ring_count = min_t(unsigned int, pdata->tx_ring_count, 240 pdata->tx_max_channel_count); 241 pdata->tx_ring_count = min_t(unsigned int, pdata->tx_ring_count, 242 pdata->tx_max_q_count); 243 244 pdata->tx_q_count = pdata->tx_ring_count; 245 246 pdata->rx_ring_count = min_t(unsigned int, num_online_cpus(), 247 pdata->hw_feat.rx_ch_cnt); 248 pdata->rx_ring_count = min_t(unsigned int, pdata->rx_ring_count, 249 pdata->rx_max_channel_count); 250 251 pdata->rx_q_count = min_t(unsigned int, pdata->hw_feat.rx_q_cnt, 252 pdata->rx_max_q_count); 253 254 if (netif_msg_probe(pdata)) { 255 dev_dbg(pdata->dev, "TX/RX DMA channel count = %u/%u\n", 256 pdata->tx_ring_count, pdata->rx_ring_count); 257 dev_dbg(pdata->dev, "TX/RX hardware queue count = %u/%u\n", 258 pdata->tx_q_count, pdata->rx_q_count); 259 } 260} 261 262int xgbe_config_netdev(struct xgbe_prv_data *pdata) 263{ 264 struct net_device *netdev = pdata->netdev; 265 struct device *dev = pdata->dev; 266 int ret; 267 268 netdev->irq = pdata->dev_irq; 269 netdev->base_addr = (unsigned long)pdata->xgmac_regs; 270 eth_hw_addr_set(netdev, pdata->mac_addr); 271 272 /* Initialize ECC timestamps */ 273 pdata->tx_sec_period = jiffies; 274 pdata->tx_ded_period = jiffies; 275 pdata->rx_sec_period = jiffies; 276 pdata->rx_ded_period = jiffies; 277 pdata->desc_sec_period = jiffies; 278 pdata->desc_ded_period = jiffies; 279 280 /* Issue software reset to device */ 281 ret = pdata->hw_if.exit(pdata); 282 if (ret) { 283 dev_err(dev, "software reset failed\n"); 284 return ret; 285 } 286 287 /* Set default configuration data */ 288 xgbe_default_config(pdata); 289 290 /* Set the DMA mask */ 291 ret = dma_set_mask_and_coherent(dev, 292 DMA_BIT_MASK(pdata->hw_feat.dma_width)); 293 if (ret) { 294 dev_err(dev, "dma_set_mask_and_coherent failed\n"); 295 return ret; 296 } 297 298 /* Set default max values if not provided */ 299 if (!pdata->tx_max_fifo_size) 300 pdata->tx_max_fifo_size = pdata->hw_feat.tx_fifo_size; 301 if (!pdata->rx_max_fifo_size) 302 pdata->rx_max_fifo_size = pdata->hw_feat.rx_fifo_size; 303 304 /* Set and validate the number of descriptors for a ring */ 305 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT); 306 pdata->tx_desc_count = XGBE_TX_DESC_CNT; 307 308 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT); 309 pdata->rx_desc_count = XGBE_RX_DESC_CNT; 310 311 /* Adjust the number of queues based on interrupts assigned */ 312 if (pdata->channel_irq_count) { 313 pdata->tx_ring_count = min_t(unsigned int, pdata->tx_ring_count, 314 pdata->channel_irq_count); 315 pdata->rx_ring_count = min_t(unsigned int, pdata->rx_ring_count, 316 pdata->channel_irq_count); 317 318 if (netif_msg_probe(pdata)) 319 dev_dbg(pdata->dev, 320 "adjusted TX/RX DMA channel count = %u/%u\n", 321 pdata->tx_ring_count, pdata->rx_ring_count); 322 } 323 324 /* Initialize RSS hash key */ 325 netdev_rss_key_fill(pdata->rss_key, sizeof(pdata->rss_key)); 326 327 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1); 328 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1); 329 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1); 330 331 /* Call MDIO/PHY initialization routine */ 332 pdata->debugfs_an_cdr_workaround = pdata->vdata->an_cdr_workaround; 333 ret = pdata->phy_if.phy_init(pdata); 334 if (ret) 335 return ret; 336 337 /* Set device operations */ 338 netdev->netdev_ops = xgbe_get_netdev_ops(); 339 netdev->ethtool_ops = xgbe_get_ethtool_ops(); 340#ifdef CONFIG_AMD_XGBE_DCB 341 netdev->dcbnl_ops = xgbe_get_dcbnl_ops(); 342#endif 343 344 /* Set device features */ 345 netdev->hw_features = NETIF_F_SG | 346 NETIF_F_IP_CSUM | 347 NETIF_F_IPV6_CSUM | 348 NETIF_F_RXCSUM | 349 NETIF_F_TSO | 350 NETIF_F_TSO6 | 351 NETIF_F_GRO | 352 NETIF_F_HW_VLAN_CTAG_RX | 353 NETIF_F_HW_VLAN_CTAG_TX | 354 NETIF_F_HW_VLAN_CTAG_FILTER; 355 356 if (pdata->hw_feat.rss) 357 netdev->hw_features |= NETIF_F_RXHASH; 358 359 if (pdata->hw_feat.vxn) { 360 netdev->hw_enc_features = NETIF_F_SG | 361 NETIF_F_IP_CSUM | 362 NETIF_F_IPV6_CSUM | 363 NETIF_F_RXCSUM | 364 NETIF_F_TSO | 365 NETIF_F_TSO6 | 366 NETIF_F_GRO | 367 NETIF_F_GSO_UDP_TUNNEL | 368 NETIF_F_GSO_UDP_TUNNEL_CSUM; 369 370 netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | 371 NETIF_F_GSO_UDP_TUNNEL_CSUM; 372 373 netdev->udp_tunnel_nic_info = xgbe_get_udp_tunnel_info(); 374 } 375 376 netdev->vlan_features |= NETIF_F_SG | 377 NETIF_F_IP_CSUM | 378 NETIF_F_IPV6_CSUM | 379 NETIF_F_TSO | 380 NETIF_F_TSO6; 381 382 netdev->features |= netdev->hw_features; 383 pdata->netdev_features = netdev->features; 384 385 netdev->priv_flags |= IFF_UNICAST_FLT; 386 netdev->min_mtu = 0; 387 netdev->max_mtu = XGMAC_JUMBO_PACKET_MTU; 388 389 /* Use default watchdog timeout */ 390 netdev->watchdog_timeo = 0; 391 392 xgbe_init_rx_coalesce(pdata); 393 xgbe_init_tx_coalesce(pdata); 394 395 netif_carrier_off(netdev); 396 ret = register_netdev(netdev); 397 if (ret) { 398 dev_err(dev, "net device registration failed\n"); 399 return ret; 400 } 401 402 if (IS_REACHABLE(CONFIG_PTP_1588_CLOCK)) 403 xgbe_ptp_register(pdata); 404 405 xgbe_debugfs_init(pdata); 406 407 netif_dbg(pdata, drv, pdata->netdev, "%u Tx software queues\n", 408 pdata->tx_ring_count); 409 netif_dbg(pdata, drv, pdata->netdev, "%u Rx software queues\n", 410 pdata->rx_ring_count); 411 412 return 0; 413} 414 415void xgbe_deconfig_netdev(struct xgbe_prv_data *pdata) 416{ 417 struct net_device *netdev = pdata->netdev; 418 419 xgbe_debugfs_exit(pdata); 420 421 if (IS_REACHABLE(CONFIG_PTP_1588_CLOCK)) 422 xgbe_ptp_unregister(pdata); 423 424 unregister_netdev(netdev); 425 426 pdata->phy_if.phy_exit(pdata); 427} 428 429static int xgbe_netdev_event(struct notifier_block *nb, unsigned long event, 430 void *data) 431{ 432 struct net_device *netdev = netdev_notifier_info_to_dev(data); 433 struct xgbe_prv_data *pdata = netdev_priv(netdev); 434 435 if (netdev->netdev_ops != xgbe_get_netdev_ops()) 436 goto out; 437 438 switch (event) { 439 case NETDEV_CHANGENAME: 440 xgbe_debugfs_rename(pdata); 441 break; 442 443 default: 444 break; 445 } 446 447out: 448 return NOTIFY_DONE; 449} 450 451static struct notifier_block xgbe_netdev_notifier = { 452 .notifier_call = xgbe_netdev_event, 453}; 454 455static int __init xgbe_mod_init(void) 456{ 457 int ret; 458 459 ret = register_netdevice_notifier(&xgbe_netdev_notifier); 460 if (ret) 461 return ret; 462 463 ret = xgbe_platform_init(); 464 if (ret) 465 goto err_platform_init; 466 467 ret = xgbe_pci_init(); 468 if (ret) 469 goto err_pci_init; 470 471 return 0; 472 473err_pci_init: 474 xgbe_platform_exit(); 475err_platform_init: 476 unregister_netdevice_notifier(&xgbe_netdev_notifier); 477 return ret; 478} 479 480static void __exit xgbe_mod_exit(void) 481{ 482 xgbe_pci_exit(); 483 484 xgbe_platform_exit(); 485 486 unregister_netdevice_notifier(&xgbe_netdev_notifier); 487} 488 489module_init(xgbe_mod_init); 490module_exit(xgbe_mod_exit); 491