1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * wm8350-regmap.c  --  Wolfson Microelectronics WM8350 register map
4 *
5 * This file splits out the tables describing the defaults and access
6 * status of the WM8350 registers since they are rather large.
7 *
8 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
9 */
10
11#include <linux/mfd/wm8350/core.h>
12
13/*
14 * Access masks.
15 */
16
17static const struct wm8350_reg_access {
18	u16 readable;		/* Mask of readable bits */
19	u16 writable;		/* Mask of writable bits */
20	u16 vol;		/* Mask of volatile bits */
21} wm8350_reg_io_map[] = {
22	/*  read    write volatile */
23	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R0   - Reset/ID */
24	{ 0x7CFF, 0x0C00, 0x0000 }, /* R1   - ID */
25	{ 0x007F, 0x0000, 0x0000 }, /* R2   - ROM Mask ID */
26	{ 0xBE3B, 0xBE3B, 0x8000 }, /* R3   - System Control 1 */
27	{ 0xFEF7, 0xFEF7, 0xF800 }, /* R4   - System Control 2 */
28	{ 0x80FF, 0x80FF, 0x8000 }, /* R5   - System Hibernate */
29	{ 0xFB0E, 0xFB0E, 0x0000 }, /* R6   - Interface Control */
30	{ 0x0000, 0x0000, 0x0000 }, /* R7 */
31	{ 0xE537, 0xE537, 0xFFFF }, /* R8   - Power mgmt (1) */
32	{ 0x0FF3, 0x0FF3, 0xFFFF }, /* R9   - Power mgmt (2) */
33	{ 0x008F, 0x008F, 0xFFFF }, /* R10  - Power mgmt (3) */
34	{ 0x6D3C, 0x6D3C, 0xFFFF }, /* R11  - Power mgmt (4) */
35	{ 0x1F8F, 0x1F8F, 0xFFFF }, /* R12  - Power mgmt (5) */
36	{ 0x8F3F, 0x8F3F, 0xFFFF }, /* R13  - Power mgmt (6) */
37	{ 0x0003, 0x0003, 0xFFFF }, /* R14  - Power mgmt (7) */
38	{ 0x0000, 0x0000, 0x0000 }, /* R15 */
39	{ 0x7F7F, 0x7F7F, 0xFFFF }, /* R16  - RTC Seconds/Minutes */
40	{ 0x073F, 0x073F, 0xFFFF }, /* R17  - RTC Hours/Day */
41	{ 0x1F3F, 0x1F3F, 0xFFFF }, /* R18  - RTC Date/Month */
42	{ 0x3FFF, 0x00FF, 0xFFFF }, /* R19  - RTC Year */
43	{ 0x7F7F, 0x7F7F, 0x0000 }, /* R20  - Alarm Seconds/Minutes */
44	{ 0x0F3F, 0x0F3F, 0x0000 }, /* R21  - Alarm Hours/Day */
45	{ 0x1F3F, 0x1F3F, 0x0000 }, /* R22  - Alarm Date/Month */
46	{ 0xEF7F, 0xEA7F, 0xFFFF }, /* R23  - RTC Time Control */
47	{ 0x3BFF, 0x0000, 0xFFFF }, /* R24  - System Interrupts */
48	{ 0xFEE7, 0x0000, 0xFFFF }, /* R25  - Interrupt Status 1 */
49	{ 0x35FF, 0x0000, 0xFFFF }, /* R26  - Interrupt Status 2 */
50	{ 0x0F3F, 0x0000, 0xFFFF }, /* R27  - Power Up Interrupt Status */
51	{ 0x0F3F, 0x0000, 0xFFFF }, /* R28  - Under Voltage Interrupt status */
52	{ 0x8000, 0x0000, 0xFFFF }, /* R29  - Over Current Interrupt status */
53	{ 0x1FFF, 0x0000, 0xFFFF }, /* R30  - GPIO Interrupt Status */
54	{ 0xEF7F, 0x0000, 0xFFFF }, /* R31  - Comparator Interrupt Status */
55	{ 0x3FFF, 0x3FFF, 0x0000 }, /* R32  - System Interrupts Mask */
56	{ 0xFEE7, 0xFEE7, 0x0000 }, /* R33  - Interrupt Status 1 Mask */
57	{ 0xF5FF, 0xF5FF, 0x0000 }, /* R34  - Interrupt Status 2 Mask */
58	{ 0x0F3F, 0x0F3F, 0x0000 }, /* R35  - Power Up Interrupt Status Mask */
59	{ 0x0F3F, 0x0F3F, 0x0000 }, /* R36  - Under Voltage Int status Mask */
60	{ 0x8000, 0x8000, 0x0000 }, /* R37  - Over Current Int status Mask */
61	{ 0x1FFF, 0x1FFF, 0x0000 }, /* R38  - GPIO Interrupt Status Mask */
62	{ 0xEF7F, 0xEF7F, 0x0000 }, /* R39  - Comparator IntStatus Mask */
63	{ 0xC9F7, 0xC9F7, 0xFFFF }, /* R40  - Clock Control 1 */
64	{ 0x8001, 0x8001, 0x0000 }, /* R41  - Clock Control 2 */
65	{ 0xFFF7, 0xFFF7, 0xFFFF }, /* R42  - FLL Control 1 */
66	{ 0xFBFF, 0xFBFF, 0x0000 }, /* R43  - FLL Control 2 */
67	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R44  - FLL Control 3 */
68	{ 0x0033, 0x0033, 0x0000 }, /* R45  - FLL Control 4 */
69	{ 0x0000, 0x0000, 0x0000 }, /* R46 */
70	{ 0x0000, 0x0000, 0x0000 }, /* R47 */
71	{ 0x3033, 0x3033, 0x0000 }, /* R48  - DAC Control */
72	{ 0x0000, 0x0000, 0x0000 }, /* R49 */
73	{ 0x81FF, 0x81FF, 0xFFFF }, /* R50  - DAC Digital Volume L */
74	{ 0x81FF, 0x81FF, 0xFFFF }, /* R51  - DAC Digital Volume R */
75	{ 0x0000, 0x0000, 0x0000 }, /* R52 */
76	{ 0x0FFF, 0x0FFF, 0xFFFF }, /* R53  - DAC LR Rate */
77	{ 0x0017, 0x0017, 0x0000 }, /* R54  - DAC Clock Control */
78	{ 0x0000, 0x0000, 0x0000 }, /* R55 */
79	{ 0x0000, 0x0000, 0x0000 }, /* R56 */
80	{ 0x0000, 0x0000, 0x0000 }, /* R57 */
81	{ 0x4000, 0x4000, 0x0000 }, /* R58  - DAC Mute */
82	{ 0x7000, 0x7000, 0x0000 }, /* R59  - DAC Mute Volume */
83	{ 0x3C00, 0x3C00, 0x0000 }, /* R60  - DAC Side */
84	{ 0x0000, 0x0000, 0x0000 }, /* R61 */
85	{ 0x0000, 0x0000, 0x0000 }, /* R62 */
86	{ 0x0000, 0x0000, 0x0000 }, /* R63 */
87	{ 0x8303, 0x8303, 0xFFFF }, /* R64  - ADC Control */
88	{ 0x0000, 0x0000, 0x0000 }, /* R65 */
89	{ 0x81FF, 0x81FF, 0xFFFF }, /* R66  - ADC Digital Volume L */
90	{ 0x81FF, 0x81FF, 0xFFFF }, /* R67  - ADC Digital Volume R */
91	{ 0x0FFF, 0x0FFF, 0x0000 }, /* R68  - ADC Divider */
92	{ 0x0000, 0x0000, 0x0000 }, /* R69 */
93	{ 0x0FFF, 0x0FFF, 0xFFFF }, /* R70  - ADC LR Rate */
94	{ 0x0000, 0x0000, 0x0000 }, /* R71 */
95	{ 0x0707, 0x0707, 0xFFFF }, /* R72  - Input Control */
96	{ 0xC0C0, 0xC0C0, 0xFFFF }, /* R73  - IN3 Input Control */
97	{ 0xC09F, 0xC09F, 0xFFFF }, /* R74  - Mic Bias Control */
98	{ 0x0000, 0x0000, 0x0000 }, /* R75 */
99	{ 0x0F15, 0x0F15, 0xFFFF }, /* R76  - Output Control */
100	{ 0xC000, 0xC000, 0xFFFF }, /* R77  - Jack Detect */
101	{ 0x03FF, 0x03FF, 0x0000 }, /* R78  - Anti Pop Control */
102	{ 0x0000, 0x0000, 0x0000 }, /* R79 */
103	{ 0xE1FC, 0xE1FC, 0x8000 }, /* R80  - Left Input Volume */
104	{ 0xE1FC, 0xE1FC, 0x8000 }, /* R81  - Right Input Volume */
105	{ 0x0000, 0x0000, 0x0000 }, /* R82 */
106	{ 0x0000, 0x0000, 0x0000 }, /* R83 */
107	{ 0x0000, 0x0000, 0x0000 }, /* R84 */
108	{ 0x0000, 0x0000, 0x0000 }, /* R85 */
109	{ 0x0000, 0x0000, 0x0000 }, /* R86 */
110	{ 0x0000, 0x0000, 0x0000 }, /* R87 */
111	{ 0x9807, 0x9807, 0xFFFF }, /* R88  - Left Mixer Control */
112	{ 0x980B, 0x980B, 0xFFFF }, /* R89  - Right Mixer Control */
113	{ 0x0000, 0x0000, 0x0000 }, /* R90 */
114	{ 0x0000, 0x0000, 0x0000 }, /* R91 */
115	{ 0x8909, 0x8909, 0xFFFF }, /* R92  - OUT3 Mixer Control */
116	{ 0x9E07, 0x9E07, 0xFFFF }, /* R93  - OUT4 Mixer Control */
117	{ 0x0000, 0x0000, 0x0000 }, /* R94 */
118	{ 0x0000, 0x0000, 0x0000 }, /* R95 */
119	{ 0x0EEE, 0x0EEE, 0x0000 }, /* R96  - Output Left Mixer Volume */
120	{ 0xE0EE, 0xE0EE, 0x0000 }, /* R97  - Output Right Mixer Volume */
121	{ 0x0E0F, 0x0E0F, 0x0000 }, /* R98  - Input Mixer Volume L */
122	{ 0xE0E1, 0xE0E1, 0x0000 }, /* R99  - Input Mixer Volume R */
123	{ 0x800E, 0x800E, 0x0000 }, /* R100 - Input Mixer Volume */
124	{ 0x0000, 0x0000, 0x0000 }, /* R101 */
125	{ 0x0000, 0x0000, 0x0000 }, /* R102 */
126	{ 0x0000, 0x0000, 0x0000 }, /* R103 */
127	{ 0xE1FC, 0xE1FC, 0xFFFF }, /* R104 - LOUT1 Volume */
128	{ 0xE1FC, 0xE1FC, 0xFFFF }, /* R105 - ROUT1 Volume */
129	{ 0xE1FC, 0xE1FC, 0xFFFF }, /* R106 - LOUT2 Volume */
130	{ 0xE7FC, 0xE7FC, 0xFFFF }, /* R107 - ROUT2 Volume */
131	{ 0x0000, 0x0000, 0x0000 }, /* R108 */
132	{ 0x0000, 0x0000, 0x0000 }, /* R109 */
133	{ 0x0000, 0x0000, 0x0000 }, /* R110 */
134	{ 0x80E0, 0x80E0, 0xFFFF }, /* R111 - BEEP Volume */
135	{ 0xBF00, 0xBF00, 0x0000 }, /* R112 - AI Formating */
136	{ 0x00F1, 0x00F1, 0x0000 }, /* R113 - ADC DAC COMP */
137	{ 0x00F8, 0x00F8, 0x0000 }, /* R114 - AI ADC Control */
138	{ 0x40FB, 0x40FB, 0x0000 }, /* R115 - AI DAC Control */
139	{ 0x7C30, 0x7C30, 0x0000 }, /* R116 - AIF Test */
140	{ 0x0000, 0x0000, 0x0000 }, /* R117 */
141	{ 0x0000, 0x0000, 0x0000 }, /* R118 */
142	{ 0x0000, 0x0000, 0x0000 }, /* R119 */
143	{ 0x0000, 0x0000, 0x0000 }, /* R120 */
144	{ 0x0000, 0x0000, 0x0000 }, /* R121 */
145	{ 0x0000, 0x0000, 0x0000 }, /* R122 */
146	{ 0x0000, 0x0000, 0x0000 }, /* R123 */
147	{ 0x0000, 0x0000, 0x0000 }, /* R124 */
148	{ 0x0000, 0x0000, 0x0000 }, /* R125 */
149	{ 0x0000, 0x0000, 0x0000 }, /* R126 */
150	{ 0x0000, 0x0000, 0x0000 }, /* R127 */
151	{ 0x1FFF, 0x1FFF, 0x0000 }, /* R128 - GPIO Debounce */
152	{ 0x1FFF, 0x1FFF, 0x0000 }, /* R129 - GPIO Pin pull up Control */
153	{ 0x1FFF, 0x1FFF, 0x0000 }, /* R130 - GPIO Pull down Control */
154	{ 0x1FFF, 0x1FFF, 0x0000 }, /* R131 - GPIO Interrupt Mode */
155	{ 0x0000, 0x0000, 0x0000 }, /* R132 */
156	{ 0x00C0, 0x00C0, 0x0000 }, /* R133 - GPIO Control */
157	{ 0x1FFF, 0x1FFF, 0x0000 }, /* R134 - GPIO Configuration (i/o) */
158	{ 0x1FFF, 0x1FFF, 0x0000 }, /* R135 - GPIO Pin Polarity / Type */
159	{ 0x0000, 0x0000, 0x0000 }, /* R136 */
160	{ 0x0000, 0x0000, 0x0000 }, /* R137 */
161	{ 0x0000, 0x0000, 0x0000 }, /* R138 */
162	{ 0x0000, 0x0000, 0x0000 }, /* R139 */
163	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R140 - GPIO Function Select 1 */
164	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R141 - GPIO Function Select 2 */
165	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R142 - GPIO Function Select 3 */
166	{ 0x000F, 0x000F, 0x0000 }, /* R143 - GPIO Function Select 4 */
167	{ 0xF0FF, 0xF0FF, 0xA000 }, /* R144 - Digitiser Control (1) */
168	{ 0x3707, 0x3707, 0x0000 }, /* R145 - Digitiser Control (2) */
169	{ 0x0000, 0x0000, 0x0000 }, /* R146 */
170	{ 0x0000, 0x0000, 0x0000 }, /* R147 */
171	{ 0x0000, 0x0000, 0x0000 }, /* R148 */
172	{ 0x0000, 0x0000, 0x0000 }, /* R149 */
173	{ 0x0000, 0x0000, 0x0000 }, /* R150 */
174	{ 0x0000, 0x0000, 0x0000 }, /* R151 */
175	{ 0x7FFF, 0x7000, 0xFFFF }, /* R152 - AUX1 Readback */
176	{ 0x7FFF, 0x7000, 0xFFFF }, /* R153 - AUX2 Readback */
177	{ 0x7FFF, 0x7000, 0xFFFF }, /* R154 - AUX3 Readback */
178	{ 0x7FFF, 0x7000, 0xFFFF }, /* R155 - AUX4 Readback */
179	{ 0x0FFF, 0x0000, 0xFFFF }, /* R156 - USB Voltage Readback */
180	{ 0x0FFF, 0x0000, 0xFFFF }, /* R157 - LINE Voltage Readback */
181	{ 0x0FFF, 0x0000, 0xFFFF }, /* R158 - BATT Voltage Readback */
182	{ 0x0FFF, 0x0000, 0xFFFF }, /* R159 - Chip Temp Readback */
183	{ 0x0000, 0x0000, 0x0000 }, /* R160 */
184	{ 0x0000, 0x0000, 0x0000 }, /* R161 */
185	{ 0x0000, 0x0000, 0x0000 }, /* R162 */
186	{ 0x000F, 0x000F, 0x0000 }, /* R163 - Generic Comparator Control */
187	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R164 - Generic comparator 1 */
188	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R165 - Generic comparator 2 */
189	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R166 - Generic comparator 3 */
190	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R167 - Generic comparator 4 */
191	{ 0xBFFF, 0xBFFF, 0x8000 }, /* R168 - Battery Charger Control 1 */
192	{ 0xFFFF, 0x4FFF, 0xB000 }, /* R169 - Battery Charger Control 2 */
193	{ 0x007F, 0x007F, 0x0000 }, /* R170 - Battery Charger Control 3 */
194	{ 0x0000, 0x0000, 0x0000 }, /* R171 */
195	{ 0x903F, 0x903F, 0xFFFF }, /* R172 - Current Sink Driver A */
196	{ 0xE333, 0xE333, 0xFFFF }, /* R173 - CSA Flash control */
197	{ 0x903F, 0x903F, 0xFFFF }, /* R174 - Current Sink Driver B */
198	{ 0xE333, 0xE333, 0xFFFF }, /* R175 - CSB Flash control */
199	{ 0x8F3F, 0x8F3F, 0xFFFF }, /* R176 - DCDC/LDO requested */
200	{ 0x332D, 0x332D, 0x0000 }, /* R177 - DCDC Active options */
201	{ 0x002D, 0x002D, 0x0000 }, /* R178 - DCDC Sleep options */
202	{ 0x5177, 0x5177, 0x8000 }, /* R179 - Power-check comparator */
203	{ 0x047F, 0x047F, 0x0000 }, /* R180 - DCDC1 Control */
204	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R181 - DCDC1 Timeouts */
205	{ 0x737F, 0x737F, 0x0000 }, /* R182 - DCDC1 Low Power */
206	{ 0x535B, 0x535B, 0x0000 }, /* R183 - DCDC2 Control */
207	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R184 - DCDC2 Timeouts */
208	{ 0x0000, 0x0000, 0x0000 }, /* R185 */
209	{ 0x047F, 0x047F, 0x0000 }, /* R186 - DCDC3 Control */
210	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R187 - DCDC3 Timeouts */
211	{ 0x737F, 0x737F, 0x0000 }, /* R188 - DCDC3 Low Power */
212	{ 0x047F, 0x047F, 0x0000 }, /* R189 - DCDC4 Control */
213	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R190 - DCDC4 Timeouts */
214	{ 0x737F, 0x737F, 0x0000 }, /* R191 - DCDC4 Low Power */
215	{ 0x535B, 0x535B, 0x0000 }, /* R192 - DCDC5 Control */
216	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R193 - DCDC5 Timeouts */
217	{ 0x0000, 0x0000, 0x0000 }, /* R194 */
218	{ 0x047F, 0x047F, 0x0000 }, /* R195 - DCDC6 Control */
219	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R196 - DCDC6 Timeouts */
220	{ 0x737F, 0x737F, 0x0000 }, /* R197 - DCDC6 Low Power */
221	{ 0x0000, 0x0000, 0x0000 }, /* R198 */
222	{ 0xFFD3, 0xFFD3, 0x0000 }, /* R199 - Limit Switch Control */
223	{ 0x441F, 0x441F, 0x0000 }, /* R200 - LDO1 Control */
224	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R201 - LDO1 Timeouts */
225	{ 0x331F, 0x331F, 0x0000 }, /* R202 - LDO1 Low Power */
226	{ 0x441F, 0x441F, 0x0000 }, /* R203 - LDO2 Control */
227	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R204 - LDO2 Timeouts */
228	{ 0x331F, 0x331F, 0x0000 }, /* R205 - LDO2 Low Power */
229	{ 0x441F, 0x441F, 0x0000 }, /* R206 - LDO3 Control */
230	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R207 - LDO3 Timeouts */
231	{ 0x331F, 0x331F, 0x0000 }, /* R208 - LDO3 Low Power */
232	{ 0x441F, 0x441F, 0x0000 }, /* R209 - LDO4 Control */
233	{ 0xFFC0, 0xFFC0, 0x0000 }, /* R210 - LDO4 Timeouts */
234	{ 0x331F, 0x331F, 0x0000 }, /* R211 - LDO4 Low Power */
235	{ 0x0000, 0x0000, 0x0000 }, /* R212 */
236	{ 0x0000, 0x0000, 0x0000 }, /* R213 */
237	{ 0x0000, 0x0000, 0x0000 }, /* R214 */
238	{ 0x8F3F, 0x8F3F, 0x0000 }, /* R215 - VCC_FAULT Masks */
239	{ 0xFF3F, 0xE03F, 0x0000 }, /* R216 - Main Bandgap Control */
240	{ 0xEF2F, 0xE02F, 0x0000 }, /* R217 - OSC Control */
241	{ 0xF3FF, 0xB3FF, 0xc000 }, /* R218 - RTC Tick Control */
242	{ 0xFFFF, 0xFFFF, 0x0000 }, /* R219 - Security */
243	{ 0x09FF, 0x01FF, 0x0000 }, /* R220 - RAM BIST 1 */
244	{ 0x0000, 0x0000, 0x0000 }, /* R221 */
245	{ 0xFFFF, 0xFFFF, 0xFFFF }, /* R222 */
246	{ 0xFFFF, 0xFFFF, 0xFFFF }, /* R223 */
247	{ 0x0000, 0x0000, 0x0000 }, /* R224 */
248	{ 0x8F3F, 0x0000, 0xFFFF }, /* R225 - DCDC/LDO status */
249	{ 0x0000, 0x0000, 0xFFFF }, /* R226 - Charger status */
250	{ 0x34FE, 0x0000, 0xFFFF }, /* R227 */
251	{ 0x0000, 0x0000, 0x0000 }, /* R228 */
252	{ 0x0000, 0x0000, 0x0000 }, /* R229 */
253	{ 0xFFFF, 0x1FFF, 0xFFFF }, /* R230 - GPIO Pin Status */
254	{ 0xFFFF, 0x1FFF, 0xFFFF }, /* R231 */
255	{ 0xFFFF, 0x1FFF, 0xFFFF }, /* R232 */
256	{ 0xFFFF, 0x1FFF, 0xFFFF }, /* R233 */
257	{ 0x0000, 0x0000, 0x0000 }, /* R234 */
258	{ 0x0000, 0x0000, 0x0000 }, /* R235 */
259	{ 0x0000, 0x0000, 0x0000 }, /* R236 */
260	{ 0x0000, 0x0000, 0x0000 }, /* R237 */
261	{ 0x0000, 0x0000, 0x0000 }, /* R238 */
262	{ 0x0000, 0x0000, 0x0000 }, /* R239 */
263	{ 0x0000, 0x0000, 0x0000 }, /* R240 */
264	{ 0x0000, 0x0000, 0x0000 }, /* R241 */
265	{ 0x0000, 0x0000, 0x0000 }, /* R242 */
266	{ 0x0000, 0x0000, 0x0000 }, /* R243 */
267	{ 0x0000, 0x0000, 0x0000 }, /* R244 */
268	{ 0x0000, 0x0000, 0x0000 }, /* R245 */
269	{ 0x0000, 0x0000, 0x0000 }, /* R246 */
270	{ 0x0000, 0x0000, 0x0000 }, /* R247 */
271	{ 0xFFFF, 0x0010, 0xFFFF }, /* R248 */
272	{ 0x0000, 0x0000, 0x0000 }, /* R249 */
273	{ 0xFFFF, 0x0010, 0xFFFF }, /* R250 */
274	{ 0xFFFF, 0x0010, 0xFFFF }, /* R251 */
275	{ 0x0000, 0x0000, 0x0000 }, /* R252 */
276	{ 0xFFFF, 0x0010, 0xFFFF }, /* R253 */
277	{ 0x0000, 0x0000, 0x0000 }, /* R254 */
278	{ 0x0000, 0x0000, 0x0000 }, /* R255 */
279};
280
281static bool wm8350_readable(struct device *dev, unsigned int reg)
282{
283	return wm8350_reg_io_map[reg].readable;
284}
285
286static bool wm8350_writeable(struct device *dev, unsigned int reg)
287{
288	struct wm8350 *wm8350 = dev_get_drvdata(dev);
289
290	if (!wm8350->unlocked) {
291		if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
292		     reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
293		    (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
294		     reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
295			return false;
296	}
297
298	return wm8350_reg_io_map[reg].writable;
299}
300
301static bool wm8350_volatile(struct device *dev, unsigned int reg)
302{
303	return wm8350_reg_io_map[reg].vol;
304}
305
306static bool wm8350_precious(struct device *dev, unsigned int reg)
307{
308	switch (reg) {
309	case WM8350_SYSTEM_INTERRUPTS:
310	case WM8350_INT_STATUS_1:
311	case WM8350_INT_STATUS_2:
312	case WM8350_POWER_UP_INT_STATUS:
313	case WM8350_UNDER_VOLTAGE_INT_STATUS:
314	case WM8350_OVER_CURRENT_INT_STATUS:
315	case WM8350_GPIO_INT_STATUS:
316	case WM8350_COMPARATOR_INT_STATUS:
317		return true;
318
319	default:
320		return false;
321	}
322}
323
324const struct regmap_config wm8350_regmap = {
325	.reg_bits = 8,
326	.val_bits = 16,
327
328	.cache_type = REGCACHE_MAPLE,
329
330	.max_register = WM8350_MAX_REGISTER,
331	.readable_reg = wm8350_readable,
332	.writeable_reg = wm8350_writeable,
333	.volatile_reg = wm8350_volatile,
334	.precious_reg = wm8350_precious,
335};
336