1// SPDX-License-Identifier: GPL-2.0 2// 3// Driver for TPS65219 Integrated Power Management Integrated Chips (PMIC) 4// 5// Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ 6 7#include <linux/i2c.h> 8#include <linux/reboot.h> 9#include <linux/regmap.h> 10 11#include <linux/mfd/core.h> 12#include <linux/mfd/tps65219.h> 13 14static int tps65219_warm_reset(struct tps65219 *tps) 15{ 16 return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL, 17 TPS65219_MFP_WARM_RESET_I2C_CTRL_MASK, 18 TPS65219_MFP_WARM_RESET_I2C_CTRL_MASK); 19} 20 21static int tps65219_cold_reset(struct tps65219 *tps) 22{ 23 return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL, 24 TPS65219_MFP_COLD_RESET_I2C_CTRL_MASK, 25 TPS65219_MFP_COLD_RESET_I2C_CTRL_MASK); 26} 27 28static int tps65219_soft_shutdown(struct tps65219 *tps) 29{ 30 return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL, 31 TPS65219_MFP_I2C_OFF_REQ_MASK, 32 TPS65219_MFP_I2C_OFF_REQ_MASK); 33} 34 35static int tps65219_power_off_handler(struct sys_off_data *data) 36{ 37 tps65219_soft_shutdown(data->cb_data); 38 return NOTIFY_DONE; 39} 40 41static int tps65219_restart(struct tps65219 *tps, unsigned long reboot_mode) 42{ 43 if (reboot_mode == REBOOT_WARM) 44 tps65219_warm_reset(tps); 45 else 46 tps65219_cold_reset(tps); 47 48 return NOTIFY_DONE; 49} 50 51static int tps65219_restart_handler(struct sys_off_data *data) 52{ 53 tps65219_restart(data->cb_data, data->mode); 54 return NOTIFY_DONE; 55} 56 57static const struct resource tps65219_pwrbutton_resources[] = { 58 DEFINE_RES_IRQ_NAMED(TPS65219_INT_PB_FALLING_EDGE_DETECT, "falling"), 59 DEFINE_RES_IRQ_NAMED(TPS65219_INT_PB_RISING_EDGE_DETECT, "rising"), 60}; 61 62static const struct resource tps65219_regulator_resources[] = { 63 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_SCG, "LDO3_SCG"), 64 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_OC, "LDO3_OC"), 65 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_UV, "LDO3_UV"), 66 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_SCG, "LDO4_SCG"), 67 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_OC, "LDO4_OC"), 68 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_UV, "LDO4_UV"), 69 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_SCG, "LDO1_SCG"), 70 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_OC, "LDO1_OC"), 71 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_UV, "LDO1_UV"), 72 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_SCG, "LDO2_SCG"), 73 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_OC, "LDO2_OC"), 74 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_UV, "LDO2_UV"), 75 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_SCG, "BUCK3_SCG"), 76 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_OC, "BUCK3_OC"), 77 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_NEG_OC, "BUCK3_NEG_OC"), 78 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_UV, "BUCK3_UV"), 79 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_SCG, "BUCK1_SCG"), 80 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_OC, "BUCK1_OC"), 81 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_NEG_OC, "BUCK1_NEG_OC"), 82 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_UV, "BUCK1_UV"), 83 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_SCG, "BUCK2_SCG"), 84 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_OC, "BUCK2_OC"), 85 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_NEG_OC, "BUCK2_NEG_OC"), 86 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_UV, "BUCK2_UV"), 87 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV, "BUCK1_RV"), 88 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV, "BUCK2_RV"), 89 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV, "BUCK3_RV"), 90 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV, "LDO1_RV"), 91 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_RV, "LDO2_RV"), 92 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_RV, "LDO3_RV"), 93 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_RV, "LDO4_RV"), 94 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV_SD, "BUCK1_RV_SD"), 95 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV_SD, "BUCK2_RV_SD"), 96 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV_SD, "BUCK3_RV_SD"), 97 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV_SD, "LDO1_RV_SD"), 98 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_RV_SD, "LDO2_RV_SD"), 99 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_RV_SD, "LDO3_RV_SD"), 100 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_RV_SD, "LDO4_RV_SD"), 101 DEFINE_RES_IRQ_NAMED(TPS65219_INT_TIMEOUT, "TIMEOUT"), 102 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_3_WARM, "SENSOR_3_WARM"), 103 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_WARM, "SENSOR_2_WARM"), 104 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_WARM, "SENSOR_1_WARM"), 105 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_WARM, "SENSOR_0_WARM"), 106 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_3_HOT, "SENSOR_3_HOT"), 107 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_HOT, "SENSOR_2_HOT"), 108 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_HOT, "SENSOR_1_HOT"), 109 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_HOT, "SENSOR_0_HOT"), 110}; 111 112static const struct mfd_cell tps65219_cells[] = { 113 { 114 .name = "tps65219-regulator", 115 .resources = tps65219_regulator_resources, 116 .num_resources = ARRAY_SIZE(tps65219_regulator_resources), 117 }, 118 { .name = "tps65219-gpio", }, 119}; 120 121static const struct mfd_cell tps65219_pwrbutton_cell = { 122 .name = "tps65219-pwrbutton", 123 .resources = tps65219_pwrbutton_resources, 124 .num_resources = ARRAY_SIZE(tps65219_pwrbutton_resources), 125}; 126 127static const struct regmap_config tps65219_regmap_config = { 128 .reg_bits = 8, 129 .val_bits = 8, 130 .max_register = TPS65219_REG_FACTORY_CONFIG_2, 131}; 132 133/* 134 * Mapping of main IRQ register bits to sub-IRQ register offsets so that we can 135 * access corect sub-IRQ registers based on bits that are set in main IRQ 136 * register. 137 */ 138/* Timeout Residual Voltage Shutdown */ 139static unsigned int bit0_offsets[] = { TPS65219_REG_INT_TO_RV_POS }; 140static unsigned int bit1_offsets[] = { TPS65219_REG_INT_RV_POS }; /* Residual Voltage */ 141static unsigned int bit2_offsets[] = { TPS65219_REG_INT_SYS_POS }; /* System */ 142static unsigned int bit3_offsets[] = { TPS65219_REG_INT_BUCK_1_2_POS }; /* Buck 1-2 */ 143static unsigned int bit4_offsets[] = { TPS65219_REG_INT_BUCK_3_POS }; /* Buck 3 */ 144static unsigned int bit5_offsets[] = { TPS65219_REG_INT_LDO_1_2_POS }; /* LDO 1-2 */ 145static unsigned int bit6_offsets[] = { TPS65219_REG_INT_LDO_3_4_POS }; /* LDO 3-4 */ 146static unsigned int bit7_offsets[] = { TPS65219_REG_INT_PB_POS }; /* Power Button */ 147 148static struct regmap_irq_sub_irq_map tps65219_sub_irq_offsets[] = { 149 REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets), 150 REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets), 151 REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets), 152 REGMAP_IRQ_MAIN_REG_OFFSET(bit3_offsets), 153 REGMAP_IRQ_MAIN_REG_OFFSET(bit4_offsets), 154 REGMAP_IRQ_MAIN_REG_OFFSET(bit5_offsets), 155 REGMAP_IRQ_MAIN_REG_OFFSET(bit6_offsets), 156 REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets), 157}; 158 159#define TPS65219_REGMAP_IRQ_REG(int_name, register_position) \ 160 REGMAP_IRQ_REG(int_name, register_position, int_name##_MASK) 161 162static struct regmap_irq tps65219_irqs[] = { 163 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_SCG, TPS65219_REG_INT_LDO_3_4_POS), 164 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_OC, TPS65219_REG_INT_LDO_3_4_POS), 165 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_UV, TPS65219_REG_INT_LDO_3_4_POS), 166 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_SCG, TPS65219_REG_INT_LDO_3_4_POS), 167 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_OC, TPS65219_REG_INT_LDO_3_4_POS), 168 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_UV, TPS65219_REG_INT_LDO_3_4_POS), 169 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_SCG, TPS65219_REG_INT_LDO_1_2_POS), 170 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_OC, TPS65219_REG_INT_LDO_1_2_POS), 171 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_UV, TPS65219_REG_INT_LDO_1_2_POS), 172 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_SCG, TPS65219_REG_INT_LDO_1_2_POS), 173 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_OC, TPS65219_REG_INT_LDO_1_2_POS), 174 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_UV, TPS65219_REG_INT_LDO_1_2_POS), 175 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_SCG, TPS65219_REG_INT_BUCK_3_POS), 176 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_OC, TPS65219_REG_INT_BUCK_3_POS), 177 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_NEG_OC, TPS65219_REG_INT_BUCK_3_POS), 178 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_UV, TPS65219_REG_INT_BUCK_3_POS), 179 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_SCG, TPS65219_REG_INT_BUCK_1_2_POS), 180 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_OC, TPS65219_REG_INT_BUCK_1_2_POS), 181 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_NEG_OC, TPS65219_REG_INT_BUCK_1_2_POS), 182 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_UV, TPS65219_REG_INT_BUCK_1_2_POS), 183 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_SCG, TPS65219_REG_INT_BUCK_1_2_POS), 184 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_OC, TPS65219_REG_INT_BUCK_1_2_POS), 185 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_NEG_OC, TPS65219_REG_INT_BUCK_1_2_POS), 186 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_UV, TPS65219_REG_INT_BUCK_1_2_POS), 187 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_3_WARM, TPS65219_REG_INT_SYS_POS), 188 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_WARM, TPS65219_REG_INT_SYS_POS), 189 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_WARM, TPS65219_REG_INT_SYS_POS), 190 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_WARM, TPS65219_REG_INT_SYS_POS), 191 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_3_HOT, TPS65219_REG_INT_SYS_POS), 192 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_HOT, TPS65219_REG_INT_SYS_POS), 193 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_HOT, TPS65219_REG_INT_SYS_POS), 194 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_HOT, TPS65219_REG_INT_SYS_POS), 195 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV, TPS65219_REG_INT_RV_POS), 196 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV, TPS65219_REG_INT_RV_POS), 197 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV, TPS65219_REG_INT_RV_POS), 198 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV, TPS65219_REG_INT_RV_POS), 199 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_RV, TPS65219_REG_INT_RV_POS), 200 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_RV, TPS65219_REG_INT_RV_POS), 201 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_RV, TPS65219_REG_INT_RV_POS), 202 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV_SD, TPS65219_REG_INT_TO_RV_POS), 203 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV_SD, TPS65219_REG_INT_TO_RV_POS), 204 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV_SD, TPS65219_REG_INT_TO_RV_POS), 205 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV_SD, TPS65219_REG_INT_TO_RV_POS), 206 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_RV_SD, TPS65219_REG_INT_TO_RV_POS), 207 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_RV_SD, TPS65219_REG_INT_TO_RV_POS), 208 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_RV_SD, TPS65219_REG_INT_TO_RV_POS), 209 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_TIMEOUT, TPS65219_REG_INT_TO_RV_POS), 210 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_FALLING_EDGE_DETECT, TPS65219_REG_INT_PB_POS), 211 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_RISING_EDGE_DETECT, TPS65219_REG_INT_PB_POS), 212}; 213 214static struct regmap_irq_chip tps65219_irq_chip = { 215 .name = "tps65219_irq", 216 .main_status = TPS65219_REG_INT_SOURCE, 217 .num_main_regs = 1, 218 .num_main_status_bits = 8, 219 .irqs = tps65219_irqs, 220 .num_irqs = ARRAY_SIZE(tps65219_irqs), 221 .status_base = TPS65219_REG_INT_LDO_3_4, 222 .ack_base = TPS65219_REG_INT_LDO_3_4, 223 .clear_ack = 1, 224 .num_regs = 8, 225 .sub_reg_offsets = tps65219_sub_irq_offsets, 226}; 227 228static int tps65219_probe(struct i2c_client *client) 229{ 230 struct tps65219 *tps; 231 unsigned int chipid; 232 bool pwr_button; 233 int ret; 234 235 tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); 236 if (!tps) 237 return -ENOMEM; 238 239 i2c_set_clientdata(client, tps); 240 241 tps->dev = &client->dev; 242 243 tps->regmap = devm_regmap_init_i2c(client, &tps65219_regmap_config); 244 if (IS_ERR(tps->regmap)) { 245 ret = PTR_ERR(tps->regmap); 246 dev_err(tps->dev, "Failed to allocate register map: %d\n", ret); 247 return ret; 248 } 249 250 ret = devm_regmap_add_irq_chip(&client->dev, tps->regmap, client->irq, 251 IRQF_ONESHOT, 0, &tps65219_irq_chip, 252 &tps->irq_data); 253 if (ret) 254 return ret; 255 256 ret = regmap_read(tps->regmap, TPS65219_REG_TI_DEV_ID, &chipid); 257 if (ret) { 258 dev_err(tps->dev, "Failed to read device ID: %d\n", ret); 259 return ret; 260 } 261 262 ret = devm_mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, 263 tps65219_cells, ARRAY_SIZE(tps65219_cells), 264 NULL, 0, regmap_irq_get_domain(tps->irq_data)); 265 if (ret) { 266 dev_err(tps->dev, "Failed to add child devices: %d\n", ret); 267 return ret; 268 } 269 270 pwr_button = of_property_read_bool(tps->dev->of_node, "ti,power-button"); 271 if (pwr_button) { 272 ret = devm_mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, 273 &tps65219_pwrbutton_cell, 1, NULL, 0, 274 regmap_irq_get_domain(tps->irq_data)); 275 if (ret) { 276 dev_err(tps->dev, "Failed to add power-button: %d\n", ret); 277 return ret; 278 } 279 } 280 281 ret = devm_register_restart_handler(tps->dev, 282 tps65219_restart_handler, 283 tps); 284 285 if (ret) { 286 dev_err(tps->dev, "cannot register restart handler, %d\n", ret); 287 return ret; 288 } 289 290 ret = devm_register_power_off_handler(tps->dev, 291 tps65219_power_off_handler, 292 tps); 293 if (ret) { 294 dev_err(tps->dev, "failed to register power-off handler: %d\n", ret); 295 return ret; 296 } 297 return 0; 298} 299 300static const struct of_device_id of_tps65219_match_table[] = { 301 { .compatible = "ti,tps65219", }, 302 {} 303}; 304MODULE_DEVICE_TABLE(of, of_tps65219_match_table); 305 306static struct i2c_driver tps65219_driver = { 307 .driver = { 308 .name = "tps65219", 309 .of_match_table = of_tps65219_match_table, 310 }, 311 .probe = tps65219_probe, 312}; 313module_i2c_driver(tps65219_driver); 314 315MODULE_AUTHOR("Jerome Neanne <jneanne@baylibre.com>"); 316MODULE_DESCRIPTION("TPS65219 power management IC driver"); 317MODULE_LICENSE("GPL"); 318