1// SPDX-License-Identifier: GPL-2.0-only 2/* Linux driver for devices based on the DiBcom DiB0700 USB bridge 3 * 4 * Copyright (C) 2005-9 DiBcom, SA et al 5 */ 6#include "dib0700.h" 7 8#include "dib3000mc.h" 9#include "dib7000m.h" 10#include "dib7000p.h" 11#include "dib8000.h" 12#include "dib9000.h" 13#include "mt2060.h" 14#include "mt2266.h" 15#include "xc2028.h" 16#include "xc5000.h" 17#include "xc4000.h" 18#include "s5h1411.h" 19#include "dib0070.h" 20#include "dib0090.h" 21#include "lgdt3305.h" 22#include "mxl5007t.h" 23#include "mn88472.h" 24#include "tda18250.h" 25 26 27static int force_lna_activation; 28module_param(force_lna_activation, int, 0644); 29MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifier(s) (LNA), if applicable for the device (default: 0=automatic/off)."); 30 31struct dib0700_adapter_state { 32 int (*set_param_save) (struct dvb_frontend *); 33 const struct firmware *frontend_firmware; 34 struct dib7000p_ops dib7000p_ops; 35 struct dib8000_ops dib8000_ops; 36}; 37 38/* Hauppauge Nova-T 500 (aka Bristol) 39 * has a LNA on GPIO0 which is enabled by setting 1 */ 40static struct mt2060_config bristol_mt2060_config[2] = { 41 { 42 .i2c_address = 0x60, 43 .clock_out = 3, 44 }, { 45 .i2c_address = 0x61, 46 } 47}; 48 49 50static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = { 51 .band_caps = BAND_VHF | BAND_UHF, 52 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0), 53 54 .agc1_max = 42598, 55 .agc1_min = 17694, 56 .agc2_max = 45875, 57 .agc2_min = 0, 58 59 .agc1_pt1 = 0, 60 .agc1_pt2 = 59, 61 62 .agc1_slope1 = 0, 63 .agc1_slope2 = 69, 64 65 .agc2_pt1 = 0, 66 .agc2_pt2 = 59, 67 68 .agc2_slope1 = 111, 69 .agc2_slope2 = 28, 70}; 71 72static struct dib3000mc_config bristol_dib3000mc_config[2] = { 73 { .agc = &bristol_dib3000p_mt2060_agc_config, 74 .max_time = 0x196, 75 .ln_adc_level = 0x1cc7, 76 .output_mpeg2_in_188_bytes = 1, 77 }, 78 { .agc = &bristol_dib3000p_mt2060_agc_config, 79 .max_time = 0x196, 80 .ln_adc_level = 0x1cc7, 81 .output_mpeg2_in_188_bytes = 1, 82 } 83}; 84 85static int bristol_frontend_attach(struct dvb_usb_adapter *adap) 86{ 87 struct dib0700_state *st = adap->dev->priv; 88 if (adap->id == 0) { 89 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10); 90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10); 91 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10); 92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10); 93 94 if (force_lna_activation) 95 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 96 else 97 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0); 98 99 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) { 100 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10); 101 return -ENODEV; 102 } 103 } 104 st->mt2060_if1[adap->id] = 1220; 105 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap, 106 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0; 107} 108 109static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval) 110{ 111 struct i2c_msg msg[2] = { 112 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 }, 113 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 }, 114 }; 115 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO; 116 return 0; 117} 118 119static int bristol_tuner_attach(struct dvb_usb_adapter *adap) 120{ 121 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap; 122 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1); 123 s8 a; 124 int if1=1220; 125 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) && 126 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) { 127 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a; 128 } 129 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, 130 &bristol_mt2060_config[adap->id], if1) == NULL ? 131 -ENODEV : 0; 132} 133 134/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */ 135 136/* MT226x */ 137static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = { 138 { 139 BAND_UHF, 140 141 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1, 142 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 143 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) 144 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 145 146 1130, 147 21, 148 149 0, 150 118, 151 152 0, 153 3530, 154 1, 155 0, 156 157 65535, 158 33770, 159 65535, 160 23592, 161 162 0, 163 62, 164 255, 165 64, 166 64, 167 132, 168 192, 169 80, 170 80, 171 172 17, 173 27, 174 23, 175 51, 176 177 1, 178 }, { 179 BAND_VHF | BAND_LBAND, 180 181 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1, 182 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 183 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) 184 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 185 186 2372, 187 21, 188 189 0, 190 118, 191 192 0, 193 3530, 194 1, 195 0, 196 197 65535, 198 0, 199 65535, 200 23592, 201 202 0, 203 128, 204 128, 205 128, 206 0, 207 128, 208 253, 209 81, 210 0, 211 212 17, 213 27, 214 23, 215 51, 216 217 1, 218 } 219}; 220 221static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = { 222 .internal = 60000, 223 .sampling = 30000, 224 .pll_prediv = 1, 225 .pll_ratio = 8, 226 .pll_range = 3, 227 .pll_reset = 1, 228 .pll_bypass = 0, 229 .enable_refdiv = 0, 230 .bypclk_div = 0, 231 .IO_CLK_en_core = 1, 232 .ADClkSrc = 1, 233 .modulo = 2, 234 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 235 .ifreq = 0, 236 .timf = 20452225, 237}; 238 239static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = { 240 { .output_mpeg2_in_188_bytes = 1, 241 .hostbus_diversity = 1, 242 .tuner_is_baseband = 1, 243 244 .agc_config_count = 2, 245 .agc = stk7700d_7000p_mt2266_agc_config, 246 .bw = &stk7700d_mt2266_pll_config, 247 248 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 249 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 250 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 251 }, 252 { .output_mpeg2_in_188_bytes = 1, 253 .hostbus_diversity = 1, 254 .tuner_is_baseband = 1, 255 256 .agc_config_count = 2, 257 .agc = stk7700d_7000p_mt2266_agc_config, 258 .bw = &stk7700d_mt2266_pll_config, 259 260 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 261 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 262 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 263 } 264}; 265 266static struct mt2266_config stk7700d_mt2266_config[2] = { 267 { .i2c_address = 0x60 268 }, 269 { .i2c_address = 0x60 270 } 271}; 272 273static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap) 274{ 275 struct dib0700_adapter_state *state = adap->priv; 276 277 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 278 return -ENODEV; 279 280 if (adap->id == 0) { 281 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 282 msleep(10); 283 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 284 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 285 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 286 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 287 msleep(10); 288 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 289 msleep(10); 290 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 291 stk7700d_dib7000p_mt2266_config) 292 != 0) { 293 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 294 dvb_detach(state->dib7000p_ops.set_wbd_ref); 295 return -ENODEV; 296 } 297 } 298 299 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 300 0x80 + (adap->id << 1), 301 &stk7700d_dib7000p_mt2266_config[adap->id]); 302 303 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 304} 305 306static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap) 307{ 308 struct dib0700_adapter_state *state = adap->priv; 309 310 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 311 return -ENODEV; 312 313 if (adap->id == 0) { 314 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 315 msleep(10); 316 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 317 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 318 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 319 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 320 msleep(10); 321 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 322 msleep(10); 323 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 324 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 325 stk7700d_dib7000p_mt2266_config) 326 != 0) { 327 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 328 dvb_detach(state->dib7000p_ops.set_wbd_ref); 329 return -ENODEV; 330 } 331 } 332 333 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 334 0x80 + (adap->id << 1), 335 &stk7700d_dib7000p_mt2266_config[adap->id]); 336 337 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 338} 339 340static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap) 341{ 342 struct i2c_adapter *tun_i2c; 343 struct dib0700_adapter_state *state = adap->priv; 344 345 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, 346 DIBX000_I2C_INTERFACE_TUNER, 1); 347 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c, 348 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0; 349} 350 351/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */ 352static struct dibx000_agc_config xc3028_agc_config = { 353 .band_caps = BAND_VHF | BAND_UHF, 354 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, 355 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 356 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 357 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 358 .inv_gain = 712, 359 .time_stabiliz = 21, 360 .alpha_level = 0, 361 .thlock = 118, 362 .wbd_inv = 0, 363 .wbd_ref = 2867, 364 .wbd_sel = 0, 365 .wbd_alpha = 2, 366 .agc1_max = 0, 367 .agc1_min = 0, 368 .agc2_max = 39718, 369 .agc2_min = 9930, 370 .agc1_pt1 = 0, 371 .agc1_pt2 = 0, 372 .agc1_pt3 = 0, 373 .agc1_slope1 = 0, 374 .agc1_slope2 = 0, 375 .agc2_pt1 = 0, 376 .agc2_pt2 = 128, 377 .agc2_slope1 = 29, 378 .agc2_slope2 = 29, 379 .alpha_mant = 17, 380 .alpha_exp = 27, 381 .beta_mant = 23, 382 .beta_exp = 51, 383 .perform_agc_softsplit = 1, 384}; 385 386/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */ 387static struct dibx000_bandwidth_config xc3028_bw_config = { 388 .internal = 60000, 389 .sampling = 30000, 390 .pll_prediv = 1, 391 .pll_ratio = 8, 392 .pll_range = 3, 393 .pll_reset = 1, 394 .pll_bypass = 0, 395 .enable_refdiv = 0, 396 .bypclk_div = 0, 397 .IO_CLK_en_core = 1, 398 .ADClkSrc = 1, 399 .modulo = 0, 400 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ 401 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ 402 .timf = 20452225, 403 .xtal_hz = 30000000, 404}; 405 406static struct dib7000p_config stk7700ph_dib7700_xc3028_config = { 407 .output_mpeg2_in_188_bytes = 1, 408 .tuner_is_baseband = 1, 409 410 .agc_config_count = 1, 411 .agc = &xc3028_agc_config, 412 .bw = &xc3028_bw_config, 413 414 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 415 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 416 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 417}; 418 419static int stk7700ph_xc3028_callback(void *ptr, int component, 420 int command, int arg) 421{ 422 struct dvb_usb_adapter *adap = ptr; 423 struct dib0700_adapter_state *state = adap->priv; 424 425 switch (command) { 426 case XC2028_TUNER_RESET: 427 /* Send the tuner in then out of reset */ 428 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0); 429 msleep(10); 430 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 431 break; 432 case XC2028_RESET_CLK: 433 case XC2028_I2C_FLUSH: 434 break; 435 default: 436 err("%s: unknown command %d, arg %d\n", __func__, 437 command, arg); 438 return -EINVAL; 439 } 440 return 0; 441} 442 443static struct xc2028_ctrl stk7700ph_xc3028_ctrl = { 444 .fname = XC2028_DEFAULT_FIRMWARE, 445 .max_len = 64, 446 .demod = XC3028_FE_DIBCOM52, 447}; 448 449static struct xc2028_config stk7700ph_xc3028_config = { 450 .i2c_addr = 0x61, 451 .ctrl = &stk7700ph_xc3028_ctrl, 452}; 453 454static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap) 455{ 456 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor; 457 struct dib0700_adapter_state *state = adap->priv; 458 459 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 460 return -ENODEV; 461 462 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) && 463 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX)) 464 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 465 else 466 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 467 msleep(20); 468 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 469 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 470 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 471 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 472 msleep(10); 473 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 474 msleep(20); 475 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 476 msleep(10); 477 478 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 479 &stk7700ph_dib7700_xc3028_config) != 0) { 480 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 481 __func__); 482 dvb_detach(state->dib7000p_ops.set_wbd_ref); 483 return -ENODEV; 484 } 485 486 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, 487 &stk7700ph_dib7700_xc3028_config); 488 489 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 490} 491 492static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap) 493{ 494 struct i2c_adapter *tun_i2c; 495 struct dib0700_adapter_state *state = adap->priv; 496 497 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, 498 DIBX000_I2C_INTERFACE_TUNER, 1); 499 500 stk7700ph_xc3028_config.i2c_adap = tun_i2c; 501 502 /* FIXME: generalize & move to common area */ 503 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback; 504 505 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config) 506 == NULL ? -ENODEV : 0; 507} 508 509#define DEFAULT_RC_INTERVAL 50 510 511/* 512 * This function is used only when firmware is < 1.20 version. Newer 513 * firmwares use bulk mode, with functions implemented at dib0700_core, 514 * at dib0700_rc_urb_completion() 515 */ 516static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d) 517{ 518 enum rc_proto protocol; 519 u32 scancode; 520 u8 toggle; 521 int i; 522 struct dib0700_state *st = d->priv; 523 524 if (st->fw_version >= 0x10200) { 525 /* For 1.20 firmware , We need to keep the RC polling 526 callback so we can reuse the input device setup in 527 dvb-usb-remote.c. However, the actual work is being done 528 in the bulk URB completion handler. */ 529 return 0; 530 } 531 532 st->buf[0] = REQUEST_POLL_RC; 533 st->buf[1] = 0; 534 535 i = dib0700_ctrl_rd(d, st->buf, 2, st->buf, 4); 536 if (i <= 0) { 537 err("RC Query Failed"); 538 return -EIO; 539 } 540 541 /* losing half of KEY_0 events from Philipps rc5 remotes.. */ 542 if (st->buf[0] == 0 && st->buf[1] == 0 543 && st->buf[2] == 0 && st->buf[3] == 0) 544 return 0; 545 546 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)st->buf[3 - 2],(int)st->buf[3 - 3],(int)st->buf[3 - 1],(int)st->buf[3]); */ 547 548 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */ 549 550 switch (d->props.rc.core.protocol) { 551 case RC_PROTO_BIT_NEC: 552 /* NEC protocol sends repeat code as 0 0 0 FF */ 553 if ((st->buf[3 - 2] == 0x00) && (st->buf[3 - 3] == 0x00) && 554 (st->buf[3] == 0xff)) { 555 rc_repeat(d->rc_dev); 556 return 0; 557 } 558 559 protocol = RC_PROTO_NEC; 560 scancode = RC_SCANCODE_NEC(st->buf[3 - 2], st->buf[3 - 3]); 561 toggle = 0; 562 break; 563 564 default: 565 /* RC-5 protocol changes toggle bit on new keypress */ 566 protocol = RC_PROTO_RC5; 567 scancode = RC_SCANCODE_RC5(st->buf[3 - 2], st->buf[3 - 3]); 568 toggle = st->buf[3 - 1]; 569 break; 570 } 571 572 rc_keydown(d->rc_dev, protocol, scancode, toggle); 573 return 0; 574} 575 576/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */ 577static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = { 578 BAND_UHF | BAND_VHF, 579 580 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 581 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 582 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) 583 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 584 585 712, 586 41, 587 588 0, 589 118, 590 591 0, 592 4095, 593 0, 594 0, 595 596 42598, 597 17694, 598 45875, 599 2621, 600 0, 601 76, 602 139, 603 52, 604 59, 605 107, 606 172, 607 57, 608 70, 609 610 21, 611 25, 612 28, 613 48, 614 615 1, 616 { 0, 617 107, 618 51800, 619 24700 620 }, 621}; 622 623static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = { 624 .band_caps = BAND_UHF | BAND_VHF, 625 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 626 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 627 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 628 .inv_gain = 712, 629 .time_stabiliz = 41, 630 .alpha_level = 0, 631 .thlock = 118, 632 .wbd_inv = 0, 633 .wbd_ref = 4095, 634 .wbd_sel = 0, 635 .wbd_alpha = 0, 636 .agc1_max = 42598, 637 .agc1_min = 16384, 638 .agc2_max = 42598, 639 .agc2_min = 0, 640 .agc1_pt1 = 0, 641 .agc1_pt2 = 137, 642 .agc1_pt3 = 255, 643 .agc1_slope1 = 0, 644 .agc1_slope2 = 255, 645 .agc2_pt1 = 0, 646 .agc2_pt2 = 0, 647 .agc2_slope1 = 0, 648 .agc2_slope2 = 41, 649 .alpha_mant = 15, 650 .alpha_exp = 25, 651 .beta_mant = 28, 652 .beta_exp = 48, 653 .perform_agc_softsplit = 0, 654}; 655 656static struct dibx000_bandwidth_config stk7700p_pll_config = { 657 .internal = 60000, 658 .sampling = 30000, 659 .pll_prediv = 1, 660 .pll_ratio = 8, 661 .pll_range = 3, 662 .pll_reset = 1, 663 .pll_bypass = 0, 664 .enable_refdiv = 0, 665 .bypclk_div = 0, 666 .IO_CLK_en_core = 1, 667 .ADClkSrc = 1, 668 .modulo = 0, 669 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 670 .ifreq = 60258167, 671 .timf = 20452225, 672 .xtal_hz = 30000000, 673}; 674 675static struct dib7000m_config stk7700p_dib7000m_config = { 676 .dvbt_mode = 1, 677 .output_mpeg2_in_188_bytes = 1, 678 .quartz_direct = 1, 679 680 .agc_config_count = 1, 681 .agc = &stk7700p_7000m_mt2060_agc_config, 682 .bw = &stk7700p_pll_config, 683 684 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS, 685 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES, 686 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS, 687}; 688 689static struct dib7000p_config stk7700p_dib7000p_config = { 690 .output_mpeg2_in_188_bytes = 1, 691 692 .agc_config_count = 1, 693 .agc = &stk7700p_7000p_mt2060_agc_config, 694 .bw = &stk7700p_pll_config, 695 696 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS, 697 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES, 698 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS, 699}; 700 701static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap) 702{ 703 struct dib0700_state *st = adap->dev->priv; 704 struct dib0700_adapter_state *state = adap->priv; 705 706 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 707 return -ENODEV; 708 709 /* unless there is no real power management in DVB - we leave the device on GPIO6 */ 710 711 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 712 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50); 713 714 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10); 715 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 716 717 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10); 718 dib0700_ctrl_clock(adap->dev, 72, 1); 719 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100); 720 721 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 722 723 st->mt2060_if1[0] = 1220; 724 725 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) { 726 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config); 727 st->is_dib7000pc = 1; 728 } else { 729 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops)); 730 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config); 731 } 732 733 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 734} 735 736static struct mt2060_config stk7700p_mt2060_config = { 737 0x60 738}; 739 740static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap) 741{ 742 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap; 743 struct dib0700_state *st = adap->dev->priv; 744 struct i2c_adapter *tun_i2c; 745 struct dib0700_adapter_state *state = adap->priv; 746 s8 a; 747 int if1=1220; 748 749 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) && 750 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) { 751 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a; 752 } 753 if (st->is_dib7000pc) 754 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 755 else 756 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 757 758 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config, 759 if1) == NULL ? -ENODEV : 0; 760} 761 762/* DIB7070 generic */ 763static struct dibx000_agc_config dib7070_agc_config = { 764 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, 765 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 766 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 767 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 768 .inv_gain = 600, 769 .time_stabiliz = 10, 770 .alpha_level = 0, 771 .thlock = 118, 772 .wbd_inv = 0, 773 .wbd_ref = 3530, 774 .wbd_sel = 1, 775 .wbd_alpha = 5, 776 .agc1_max = 65535, 777 .agc1_min = 0, 778 .agc2_max = 65535, 779 .agc2_min = 0, 780 .agc1_pt1 = 0, 781 .agc1_pt2 = 40, 782 .agc1_pt3 = 183, 783 .agc1_slope1 = 206, 784 .agc1_slope2 = 255, 785 .agc2_pt1 = 72, 786 .agc2_pt2 = 152, 787 .agc2_slope1 = 88, 788 .agc2_slope2 = 90, 789 .alpha_mant = 17, 790 .alpha_exp = 27, 791 .beta_mant = 23, 792 .beta_exp = 51, 793 .perform_agc_softsplit = 0, 794}; 795 796static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff) 797{ 798 struct dvb_usb_adapter *adap = fe->dvb->priv; 799 struct dib0700_adapter_state *state = adap->priv; 800 801 deb_info("reset: %d", onoff); 802 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff); 803} 804 805static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff) 806{ 807 struct dvb_usb_adapter *adap = fe->dvb->priv; 808 struct dib0700_adapter_state *state = adap->priv; 809 810 deb_info("sleep: %d", onoff); 811 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff); 812} 813 814static struct dib0070_config dib7070p_dib0070_config[2] = { 815 { 816 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 817 .reset = dib7070_tuner_reset, 818 .sleep = dib7070_tuner_sleep, 819 .clock_khz = 12000, 820 .clock_pad_drive = 4, 821 .charge_pump = 2, 822 }, { 823 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 824 .reset = dib7070_tuner_reset, 825 .sleep = dib7070_tuner_sleep, 826 .clock_khz = 12000, 827 .charge_pump = 2, 828 } 829}; 830 831static struct dib0070_config dib7770p_dib0070_config = { 832 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 833 .reset = dib7070_tuner_reset, 834 .sleep = dib7070_tuner_sleep, 835 .clock_khz = 12000, 836 .clock_pad_drive = 0, 837 .flip_chip = 1, 838 .charge_pump = 2, 839}; 840 841static int dib7070_set_param_override(struct dvb_frontend *fe) 842{ 843 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 844 struct dvb_usb_adapter *adap = fe->dvb->priv; 845 struct dib0700_adapter_state *state = adap->priv; 846 847 u16 offset; 848 u8 band = BAND_OF_FREQUENCY(p->frequency/1000); 849 switch (band) { 850 case BAND_VHF: offset = 950; break; 851 case BAND_UHF: 852 default: offset = 550; break; 853 } 854 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe)); 855 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe)); 856 return state->set_param_save(fe); 857} 858 859static int dib7770_set_param_override(struct dvb_frontend *fe) 860{ 861 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 862 struct dvb_usb_adapter *adap = fe->dvb->priv; 863 struct dib0700_adapter_state *state = adap->priv; 864 865 u16 offset; 866 u8 band = BAND_OF_FREQUENCY(p->frequency/1000); 867 switch (band) { 868 case BAND_VHF: 869 state->dib7000p_ops.set_gpio(fe, 0, 0, 1); 870 offset = 850; 871 break; 872 case BAND_UHF: 873 default: 874 state->dib7000p_ops.set_gpio(fe, 0, 0, 0); 875 offset = 250; 876 break; 877 } 878 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe)); 879 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe)); 880 return state->set_param_save(fe); 881} 882 883static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap) 884{ 885 struct dib0700_adapter_state *st = adap->priv; 886 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, 887 DIBX000_I2C_INTERFACE_TUNER, 1); 888 889 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, 890 &dib7770p_dib0070_config) == NULL) 891 return -ENODEV; 892 893 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 894 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override; 895 return 0; 896} 897 898static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap) 899{ 900 struct dib0700_adapter_state *st = adap->priv; 901 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 902 903 if (adap->id == 0) { 904 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL) 905 return -ENODEV; 906 } else { 907 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL) 908 return -ENODEV; 909 } 910 911 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 912 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override; 913 return 0; 914} 915 916static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index, 917 u16 pid, int onoff) 918{ 919 struct dib0700_adapter_state *state = adapter->priv; 920 struct dib0700_state *st = adapter->dev->priv; 921 922 if (st->is_dib7000pc) 923 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 924 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 925} 926 927static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff) 928{ 929 struct dib0700_state *st = adapter->dev->priv; 930 struct dib0700_adapter_state *state = adapter->priv; 931 if (st->is_dib7000pc) 932 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 933 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 934} 935 936static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff) 937{ 938 struct dib0700_adapter_state *state = adapter->priv; 939 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 940} 941 942static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff) 943{ 944 struct dib0700_adapter_state *state = adapter->priv; 945 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 946} 947 948static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = { 949 .internal = 60000, 950 .sampling = 15000, 951 .pll_prediv = 1, 952 .pll_ratio = 20, 953 .pll_range = 3, 954 .pll_reset = 1, 955 .pll_bypass = 0, 956 .enable_refdiv = 0, 957 .bypclk_div = 0, 958 .IO_CLK_en_core = 1, 959 .ADClkSrc = 1, 960 .modulo = 2, 961 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 962 .ifreq = (0 << 25) | 0, 963 .timf = 20452225, 964 .xtal_hz = 12000000, 965}; 966 967static struct dib7000p_config dib7070p_dib7000p_config = { 968 .output_mpeg2_in_188_bytes = 1, 969 970 .agc_config_count = 1, 971 .agc = &dib7070_agc_config, 972 .bw = &dib7070_bw_config_12_mhz, 973 .tuner_is_baseband = 1, 974 .spur_protect = 1, 975 976 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 977 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 978 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 979 980 .hostbus_diversity = 1, 981}; 982 983/* STK7070P */ 984static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap) 985{ 986 struct usb_device_descriptor *p = &adap->dev->udev->descriptor; 987 struct dib0700_adapter_state *state = adap->priv; 988 989 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 990 return -ENODEV; 991 992 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) && 993 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E)) 994 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 995 else 996 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 997 msleep(10); 998 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 999 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1000 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1001 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1002 1003 dib0700_ctrl_clock(adap->dev, 72, 1); 1004 1005 msleep(10); 1006 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1007 msleep(10); 1008 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1009 1010 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 1011 &dib7070p_dib7000p_config) != 0) { 1012 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 1013 __func__); 1014 dvb_detach(state->dib7000p_ops.set_wbd_ref); 1015 return -ENODEV; 1016 } 1017 1018 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, 1019 &dib7070p_dib7000p_config); 1020 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1021} 1022 1023/* STK7770P */ 1024static struct dib7000p_config dib7770p_dib7000p_config = { 1025 .output_mpeg2_in_188_bytes = 1, 1026 1027 .agc_config_count = 1, 1028 .agc = &dib7070_agc_config, 1029 .bw = &dib7070_bw_config_12_mhz, 1030 .tuner_is_baseband = 1, 1031 .spur_protect = 1, 1032 1033 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 1034 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 1035 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 1036 1037 .hostbus_diversity = 1, 1038 .enable_current_mirror = 1, 1039 .disable_sample_and_hold = 0, 1040}; 1041 1042static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap) 1043{ 1044 struct usb_device_descriptor *p = &adap->dev->udev->descriptor; 1045 struct dib0700_adapter_state *state = adap->priv; 1046 1047 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 1048 return -ENODEV; 1049 1050 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) && 1051 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E)) 1052 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 1053 else 1054 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1055 msleep(10); 1056 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1057 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1058 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1059 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1060 1061 dib0700_ctrl_clock(adap->dev, 72, 1); 1062 1063 msleep(10); 1064 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1065 msleep(10); 1066 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1067 1068 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 1069 &dib7770p_dib7000p_config) != 0) { 1070 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 1071 __func__); 1072 dvb_detach(state->dib7000p_ops.set_wbd_ref); 1073 return -ENODEV; 1074 } 1075 1076 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, 1077 &dib7770p_dib7000p_config); 1078 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1079} 1080 1081/* DIB807x generic */ 1082static struct dibx000_agc_config dib807x_agc_config[2] = { 1083 { 1084 BAND_VHF, 1085 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, 1086 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, 1087 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0, 1088 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, 1089 * P_agc_write=0 */ 1090 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) | 1091 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | 1092 (0 << 0), /* setup*/ 1093 1094 600, /* inv_gain*/ 1095 10, /* time_stabiliz*/ 1096 1097 0, /* alpha_level*/ 1098 118, /* thlock*/ 1099 1100 0, /* wbd_inv*/ 1101 3530, /* wbd_ref*/ 1102 1, /* wbd_sel*/ 1103 5, /* wbd_alpha*/ 1104 1105 65535, /* agc1_max*/ 1106 0, /* agc1_min*/ 1107 1108 65535, /* agc2_max*/ 1109 0, /* agc2_min*/ 1110 1111 0, /* agc1_pt1*/ 1112 40, /* agc1_pt2*/ 1113 183, /* agc1_pt3*/ 1114 206, /* agc1_slope1*/ 1115 255, /* agc1_slope2*/ 1116 72, /* agc2_pt1*/ 1117 152, /* agc2_pt2*/ 1118 88, /* agc2_slope1*/ 1119 90, /* agc2_slope2*/ 1120 1121 17, /* alpha_mant*/ 1122 27, /* alpha_exp*/ 1123 23, /* beta_mant*/ 1124 51, /* beta_exp*/ 1125 1126 0, /* perform_agc_softsplit*/ 1127 }, { 1128 BAND_UHF, 1129 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, 1130 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, 1131 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1132 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, 1133 * P_agc_write=0 */ 1134 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) | 1135 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | 1136 (0 << 0), /* setup */ 1137 1138 600, /* inv_gain*/ 1139 10, /* time_stabiliz*/ 1140 1141 0, /* alpha_level*/ 1142 118, /* thlock*/ 1143 1144 0, /* wbd_inv*/ 1145 3530, /* wbd_ref*/ 1146 1, /* wbd_sel*/ 1147 5, /* wbd_alpha*/ 1148 1149 65535, /* agc1_max*/ 1150 0, /* agc1_min*/ 1151 1152 65535, /* agc2_max*/ 1153 0, /* agc2_min*/ 1154 1155 0, /* agc1_pt1*/ 1156 40, /* agc1_pt2*/ 1157 183, /* agc1_pt3*/ 1158 206, /* agc1_slope1*/ 1159 255, /* agc1_slope2*/ 1160 72, /* agc2_pt1*/ 1161 152, /* agc2_pt2*/ 1162 88, /* agc2_slope1*/ 1163 90, /* agc2_slope2*/ 1164 1165 17, /* alpha_mant*/ 1166 27, /* alpha_exp*/ 1167 23, /* beta_mant*/ 1168 51, /* beta_exp*/ 1169 1170 0, /* perform_agc_softsplit*/ 1171 } 1172}; 1173 1174static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = { 1175 .internal = 60000, 1176 .sampling = 15000, 1177 .pll_prediv = 1, 1178 .pll_ratio = 20, 1179 .pll_range = 3, 1180 .pll_reset = 1, 1181 .pll_bypass = 0, 1182 .enable_refdiv = 0, 1183 .bypclk_div = 0, 1184 .IO_CLK_en_core = 1, 1185 .ADClkSrc = 1, 1186 .modulo = 2, 1187 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/ 1188 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/ 1189 .timf = 18179755, 1190 .xtal_hz = 12000000, 1191}; 1192 1193static struct dib8000_config dib807x_dib8000_config[2] = { 1194 { 1195 .output_mpeg2_in_188_bytes = 1, 1196 1197 .agc_config_count = 2, 1198 .agc = dib807x_agc_config, 1199 .pll = &dib807x_bw_config_12_mhz, 1200 .tuner_is_baseband = 1, 1201 1202 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1203 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1204 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1205 1206 .hostbus_diversity = 1, 1207 .div_cfg = 1, 1208 .agc_control = &dib0070_ctrl_agc_filter, 1209 .output_mode = OUTMODE_MPEG2_FIFO, 1210 .drives = 0x2d98, 1211 }, { 1212 .output_mpeg2_in_188_bytes = 1, 1213 1214 .agc_config_count = 2, 1215 .agc = dib807x_agc_config, 1216 .pll = &dib807x_bw_config_12_mhz, 1217 .tuner_is_baseband = 1, 1218 1219 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1220 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1221 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1222 1223 .hostbus_diversity = 1, 1224 .agc_control = &dib0070_ctrl_agc_filter, 1225 .output_mode = OUTMODE_MPEG2_FIFO, 1226 .drives = 0x2d98, 1227 } 1228}; 1229 1230static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff) 1231{ 1232 struct dvb_usb_adapter *adap = fe->dvb->priv; 1233 struct dib0700_adapter_state *state = adap->priv; 1234 1235 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff); 1236} 1237 1238static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff) 1239{ 1240 struct dvb_usb_adapter *adap = fe->dvb->priv; 1241 struct dib0700_adapter_state *state = adap->priv; 1242 1243 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff); 1244} 1245 1246static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = { 1247 { 240, 7}, 1248 { 0xffff, 6}, 1249}; 1250 1251static struct dib0070_config dib807x_dib0070_config[2] = { 1252 { 1253 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 1254 .reset = dib80xx_tuner_reset, 1255 .sleep = dib80xx_tuner_sleep, 1256 .clock_khz = 12000, 1257 .clock_pad_drive = 4, 1258 .vga_filter = 1, 1259 .force_crystal_mode = 1, 1260 .enable_third_order_filter = 1, 1261 .charge_pump = 0, 1262 .wbd_gain = dib8070_wbd_gain_cfg, 1263 .osc_buffer_state = 0, 1264 .freq_offset_khz_uhf = -100, 1265 .freq_offset_khz_vhf = -100, 1266 }, { 1267 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 1268 .reset = dib80xx_tuner_reset, 1269 .sleep = dib80xx_tuner_sleep, 1270 .clock_khz = 12000, 1271 .clock_pad_drive = 2, 1272 .vga_filter = 1, 1273 .force_crystal_mode = 1, 1274 .enable_third_order_filter = 1, 1275 .charge_pump = 0, 1276 .wbd_gain = dib8070_wbd_gain_cfg, 1277 .osc_buffer_state = 0, 1278 .freq_offset_khz_uhf = -25, 1279 .freq_offset_khz_vhf = -25, 1280 } 1281}; 1282 1283static int dib807x_set_param_override(struct dvb_frontend *fe) 1284{ 1285 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 1286 struct dvb_usb_adapter *adap = fe->dvb->priv; 1287 struct dib0700_adapter_state *state = adap->priv; 1288 1289 u16 offset = dib0070_wbd_offset(fe); 1290 u8 band = BAND_OF_FREQUENCY(p->frequency/1000); 1291 switch (band) { 1292 case BAND_VHF: 1293 offset += 750; 1294 break; 1295 case BAND_UHF: /* fall-thru wanted */ 1296 default: 1297 offset += 250; break; 1298 } 1299 deb_info("WBD for DiB8000: %d\n", offset); 1300 state->dib8000_ops.set_wbd_ref(fe, offset); 1301 1302 return state->set_param_save(fe); 1303} 1304 1305static int dib807x_tuner_attach(struct dvb_usb_adapter *adap) 1306{ 1307 struct dib0700_adapter_state *st = adap->priv; 1308 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, 1309 DIBX000_I2C_INTERFACE_TUNER, 1); 1310 1311 if (adap->id == 0) { 1312 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, 1313 &dib807x_dib0070_config[0]) == NULL) 1314 return -ENODEV; 1315 } else { 1316 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, 1317 &dib807x_dib0070_config[1]) == NULL) 1318 return -ENODEV; 1319 } 1320 1321 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 1322 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override; 1323 return 0; 1324} 1325 1326static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index, 1327 u16 pid, int onoff) 1328{ 1329 struct dib0700_adapter_state *state = adapter->priv; 1330 1331 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 1332} 1333 1334static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter, 1335 int onoff) 1336{ 1337 struct dib0700_adapter_state *state = adapter->priv; 1338 1339 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 1340} 1341 1342/* STK807x */ 1343static int stk807x_frontend_attach(struct dvb_usb_adapter *adap) 1344{ 1345 struct dib0700_adapter_state *state = adap->priv; 1346 1347 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1348 return -ENODEV; 1349 1350 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1351 msleep(10); 1352 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1353 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1354 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1355 1356 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1357 1358 dib0700_ctrl_clock(adap->dev, 72, 1); 1359 1360 msleep(10); 1361 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1362 msleep(10); 1363 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1364 1365 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 1366 0x80, 0); 1367 1368 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, 1369 &dib807x_dib8000_config[0]); 1370 1371 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1372} 1373 1374/* STK807xPVR */ 1375static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap) 1376{ 1377 struct dib0700_adapter_state *state = adap->priv; 1378 1379 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1380 return -ENODEV; 1381 1382 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 1383 msleep(30); 1384 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1385 msleep(500); 1386 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1387 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1388 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1389 1390 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1391 1392 dib0700_ctrl_clock(adap->dev, 72, 1); 1393 1394 msleep(10); 1395 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1396 msleep(10); 1397 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1398 1399 /* initialize IC 0 */ 1400 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0); 1401 1402 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, 1403 &dib807x_dib8000_config[0]); 1404 1405 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1406} 1407 1408static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap) 1409{ 1410 struct dib0700_adapter_state *state = adap->priv; 1411 1412 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1413 return -ENODEV; 1414 1415 /* initialize IC 1 */ 1416 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0); 1417 1418 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, 1419 &dib807x_dib8000_config[1]); 1420 1421 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1422} 1423 1424/* STK8096GP */ 1425static struct dibx000_agc_config dib8090_agc_config[2] = { 1426 { 1427 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, 1428 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, 1429 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1430 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 1431 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) 1432 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 1433 1434 .inv_gain = 787, 1435 .time_stabiliz = 10, 1436 1437 .alpha_level = 0, 1438 .thlock = 118, 1439 1440 .wbd_inv = 0, 1441 .wbd_ref = 3530, 1442 .wbd_sel = 1, 1443 .wbd_alpha = 5, 1444 1445 .agc1_max = 65535, 1446 .agc1_min = 0, 1447 1448 .agc2_max = 65535, 1449 .agc2_min = 0, 1450 1451 .agc1_pt1 = 0, 1452 .agc1_pt2 = 32, 1453 .agc1_pt3 = 114, 1454 .agc1_slope1 = 143, 1455 .agc1_slope2 = 144, 1456 .agc2_pt1 = 114, 1457 .agc2_pt2 = 227, 1458 .agc2_slope1 = 116, 1459 .agc2_slope2 = 117, 1460 1461 .alpha_mant = 28, 1462 .alpha_exp = 26, 1463 .beta_mant = 31, 1464 .beta_exp = 51, 1465 1466 .perform_agc_softsplit = 0, 1467 }, 1468 { 1469 .band_caps = BAND_CBAND, 1470 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, 1471 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1472 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 1473 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) 1474 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 1475 1476 .inv_gain = 787, 1477 .time_stabiliz = 10, 1478 1479 .alpha_level = 0, 1480 .thlock = 118, 1481 1482 .wbd_inv = 0, 1483 .wbd_ref = 3530, 1484 .wbd_sel = 1, 1485 .wbd_alpha = 5, 1486 1487 .agc1_max = 0, 1488 .agc1_min = 0, 1489 1490 .agc2_max = 65535, 1491 .agc2_min = 0, 1492 1493 .agc1_pt1 = 0, 1494 .agc1_pt2 = 32, 1495 .agc1_pt3 = 114, 1496 .agc1_slope1 = 143, 1497 .agc1_slope2 = 144, 1498 .agc2_pt1 = 114, 1499 .agc2_pt2 = 227, 1500 .agc2_slope1 = 116, 1501 .agc2_slope2 = 117, 1502 1503 .alpha_mant = 28, 1504 .alpha_exp = 26, 1505 .beta_mant = 31, 1506 .beta_exp = 51, 1507 1508 .perform_agc_softsplit = 0, 1509 } 1510}; 1511 1512static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = { 1513 .internal = 54000, 1514 .sampling = 13500, 1515 1516 .pll_prediv = 1, 1517 .pll_ratio = 18, 1518 .pll_range = 3, 1519 .pll_reset = 1, 1520 .pll_bypass = 0, 1521 1522 .enable_refdiv = 0, 1523 .bypclk_div = 0, 1524 .IO_CLK_en_core = 1, 1525 .ADClkSrc = 1, 1526 .modulo = 2, 1527 1528 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), 1529 1530 .ifreq = (0 << 25) | 0, 1531 .timf = 20199727, 1532 1533 .xtal_hz = 12000000, 1534}; 1535 1536static int dib8090_get_adc_power(struct dvb_frontend *fe) 1537{ 1538 struct dvb_usb_adapter *adap = fe->dvb->priv; 1539 struct dib0700_adapter_state *state = adap->priv; 1540 1541 return state->dib8000_ops.get_adc_power(fe, 1); 1542} 1543 1544static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart) 1545{ 1546 deb_info("AGC control callback: %i\n", restart); 1547 dib0090_dcc_freq(fe, restart); 1548 1549 if (restart == 0) /* before AGC startup */ 1550 dib0090_set_dc_servo(fe, 1); 1551} 1552 1553static struct dib8000_config dib809x_dib8000_config[2] = { 1554 { 1555 .output_mpeg2_in_188_bytes = 1, 1556 1557 .agc_config_count = 2, 1558 .agc = dib8090_agc_config, 1559 .agc_control = dib8090_agc_control, 1560 .pll = &dib8090_pll_config_12mhz, 1561 .tuner_is_baseband = 1, 1562 1563 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1564 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1565 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1566 1567 .hostbus_diversity = 1, 1568 .div_cfg = 0x31, 1569 .output_mode = OUTMODE_MPEG2_FIFO, 1570 .drives = 0x2d98, 1571 .diversity_delay = 48, 1572 .refclksel = 3, 1573 }, { 1574 .output_mpeg2_in_188_bytes = 1, 1575 1576 .agc_config_count = 2, 1577 .agc = dib8090_agc_config, 1578 .agc_control = dib8090_agc_control, 1579 .pll = &dib8090_pll_config_12mhz, 1580 .tuner_is_baseband = 1, 1581 1582 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1583 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1584 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1585 1586 .hostbus_diversity = 1, 1587 .div_cfg = 0x31, 1588 .output_mode = OUTMODE_DIVERSITY, 1589 .drives = 0x2d08, 1590 .diversity_delay = 1, 1591 .refclksel = 3, 1592 } 1593}; 1594 1595static struct dib0090_wbd_slope dib8090_wbd_table[] = { 1596 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */ 1597 { 120, 0, 500, 0, 500, 4 }, /* CBAND */ 1598 { 170, 0, 450, 0, 450, 4 }, /* CBAND */ 1599 { 380, 48, 373, 28, 259, 6 }, /* VHF */ 1600 { 860, 34, 700, 36, 616, 6 }, /* high UHF */ 1601 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */ 1602}; 1603 1604static struct dib0090_config dib809x_dib0090_config = { 1605 .io.pll_bypass = 1, 1606 .io.pll_range = 1, 1607 .io.pll_prediv = 1, 1608 .io.pll_loopdiv = 20, 1609 .io.adc_clock_ratio = 8, 1610 .io.pll_int_loop_filt = 0, 1611 .io.clock_khz = 12000, 1612 .reset = dib80xx_tuner_reset, 1613 .sleep = dib80xx_tuner_sleep, 1614 .clkouttobamse = 1, 1615 .analog_output = 1, 1616 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS, 1617 .use_pwm_agc = 1, 1618 .clkoutdrive = 1, 1619 .get_adc_power = dib8090_get_adc_power, 1620 .freq_offset_khz_uhf = -63, 1621 .freq_offset_khz_vhf = -143, 1622 .wbd = dib8090_wbd_table, 1623 .fref_clock_ratio = 6, 1624}; 1625 1626static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe) 1627{ 1628 u8 optimal_pll_ratio = 20; 1629 u32 freq_adc, ratio, rest, max = 0; 1630 u8 pll_ratio; 1631 1632 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) { 1633 freq_adc = 12 * pll_ratio * (1 << 8) / 16; 1634 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc; 1635 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc; 1636 1637 if (rest > freq_adc / 2) 1638 rest = freq_adc - rest; 1639 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest); 1640 if ((rest > max) && (rest > 717)) { 1641 optimal_pll_ratio = pll_ratio; 1642 max = rest; 1643 } 1644 } 1645 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio); 1646 1647 return optimal_pll_ratio; 1648} 1649 1650static int dib8096_set_param_override(struct dvb_frontend *fe) 1651{ 1652 struct dvb_usb_adapter *adap = fe->dvb->priv; 1653 struct dib0700_adapter_state *state = adap->priv; 1654 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000); 1655 u16 target, ltgain, rf_gain_limit; 1656 u32 timf; 1657 int ret = 0; 1658 enum frontend_tune_state tune_state = CT_SHUTDOWN; 1659 1660 switch (band) { 1661 default: 1662 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency); 1663 fallthrough; 1664 case BAND_VHF: 1665 state->dib8000_ops.set_gpio(fe, 3, 0, 1); 1666 break; 1667 case BAND_UHF: 1668 state->dib8000_ops.set_gpio(fe, 3, 0, 0); 1669 break; 1670 } 1671 1672 ret = state->set_param_save(fe); 1673 if (ret < 0) 1674 return ret; 1675 1676 if (fe->dtv_property_cache.bandwidth_hz != 6000000) { 1677 deb_info("only 6MHz bandwidth is supported\n"); 1678 return -EINVAL; 1679 } 1680 1681 /* Update PLL if needed ratio */ 1682 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0); 1683 1684 /* Get optimize PLL ratio to remove spurious */ 1685 pll_ratio = dib8090_compute_pll_parameters(fe); 1686 if (pll_ratio == 17) 1687 timf = 21387946; 1688 else if (pll_ratio == 18) 1689 timf = 20199727; 1690 else if (pll_ratio == 19) 1691 timf = 19136583; 1692 else 1693 timf = 18179756; 1694 1695 /* Update ratio */ 1696 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio); 1697 1698 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf); 1699 1700 if (band != BAND_CBAND) { 1701 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */ 1702 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2; 1703 state->dib8000_ops.set_wbd_ref(fe, target); 1704 } 1705 1706 if (band == BAND_CBAND) { 1707 deb_info("tuning in CBAND - soft-AGC startup\n"); 1708 dib0090_set_tune_state(fe, CT_AGC_START); 1709 1710 do { 1711 ret = dib0090_gain_control(fe); 1712 msleep(ret); 1713 tune_state = dib0090_get_tune_state(fe); 1714 if (tune_state == CT_AGC_STEP_0) 1715 state->dib8000_ops.set_gpio(fe, 6, 0, 1); 1716 else if (tune_state == CT_AGC_STEP_1) { 1717 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, <gain); 1718 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */ 1719 state->dib8000_ops.set_gpio(fe, 6, 0, 0); 1720 } 1721 } while (tune_state < CT_AGC_STOP); 1722 1723 deb_info("switching to PWM AGC\n"); 1724 dib0090_pwm_gain_reset(fe); 1725 state->dib8000_ops.pwm_agc_reset(fe); 1726 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START); 1727 } else { 1728 /* for everything else than CBAND we are using standard AGC */ 1729 deb_info("not tuning in CBAND - standard AGC startup\n"); 1730 dib0090_pwm_gain_reset(fe); 1731 } 1732 1733 return 0; 1734} 1735 1736static int dib809x_tuner_attach(struct dvb_usb_adapter *adap) 1737{ 1738 struct dib0700_adapter_state *st = adap->priv; 1739 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 1740 1741 /* FIXME: if adap->id != 0, check if it is fe_adap[1] */ 1742 if (!dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config)) 1743 return -ENODEV; 1744 1745 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 1746 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override; 1747 return 0; 1748} 1749 1750static int stk809x_frontend_attach(struct dvb_usb_adapter *adap) 1751{ 1752 struct dib0700_adapter_state *state = adap->priv; 1753 1754 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1755 return -ENODEV; 1756 1757 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1758 msleep(10); 1759 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1760 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1761 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1762 1763 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1764 1765 dib0700_ctrl_clock(adap->dev, 72, 1); 1766 1767 msleep(10); 1768 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1769 msleep(10); 1770 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1771 1772 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0); 1773 1774 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]); 1775 1776 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1777} 1778 1779static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap) 1780{ 1781 struct dib0700_adapter_state *state = adap->priv; 1782 1783 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1784 return -ENODEV; 1785 1786 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0); 1787 1788 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]); 1789 1790 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1791} 1792 1793static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap) 1794{ 1795 struct dib0700_adapter_state *st = adap->priv; 1796 struct i2c_adapter *tun_i2c; 1797 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1); 1798 1799 if (fe_slave) { 1800 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1); 1801 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL) 1802 return -ENODEV; 1803 fe_slave->dvb = adap->fe_adap[0].fe->dvb; 1804 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override; 1805 } 1806 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 1807 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL) 1808 return -ENODEV; 1809 1810 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 1811 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override; 1812 1813 return 0; 1814} 1815 1816static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap) 1817{ 1818 struct dvb_frontend *fe_slave; 1819 struct dib0700_adapter_state *state = adap->priv; 1820 1821 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1822 return -ENODEV; 1823 1824 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 1825 msleep(20); 1826 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1827 msleep(1000); 1828 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1829 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1830 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1831 1832 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1833 1834 dib0700_ctrl_clock(adap->dev, 72, 1); 1835 1836 msleep(20); 1837 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1838 msleep(20); 1839 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1840 1841 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0); 1842 1843 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]); 1844 if (adap->fe_adap[0].fe == NULL) 1845 return -ENODEV; 1846 1847 /* Needed to increment refcount */ 1848 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1849 return -ENODEV; 1850 1851 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]); 1852 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave); 1853 1854 return fe_slave == NULL ? -ENODEV : 0; 1855} 1856 1857/* TFE8096P */ 1858static struct dibx000_agc_config dib8096p_agc_config[2] = { 1859 { 1860 .band_caps = BAND_UHF, 1861 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, 1862 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, 1863 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1864 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, 1865 P_agc_write=0 */ 1866 .setup = (0 << 15) | (0 << 14) | (5 << 11) 1867 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) 1868 | (0 << 4) | (5 << 1) | (0 << 0), 1869 1870 .inv_gain = 684, 1871 .time_stabiliz = 10, 1872 1873 .alpha_level = 0, 1874 .thlock = 118, 1875 1876 .wbd_inv = 0, 1877 .wbd_ref = 1200, 1878 .wbd_sel = 3, 1879 .wbd_alpha = 5, 1880 1881 .agc1_max = 65535, 1882 .agc1_min = 0, 1883 1884 .agc2_max = 32767, 1885 .agc2_min = 0, 1886 1887 .agc1_pt1 = 0, 1888 .agc1_pt2 = 0, 1889 .agc1_pt3 = 105, 1890 .agc1_slope1 = 0, 1891 .agc1_slope2 = 156, 1892 .agc2_pt1 = 105, 1893 .agc2_pt2 = 255, 1894 .agc2_slope1 = 54, 1895 .agc2_slope2 = 0, 1896 1897 .alpha_mant = 28, 1898 .alpha_exp = 26, 1899 .beta_mant = 31, 1900 .beta_exp = 51, 1901 1902 .perform_agc_softsplit = 0, 1903 } , { 1904 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND, 1905 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, 1906 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, 1907 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1908 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, 1909 P_agc_write=0 */ 1910 .setup = (0 << 15) | (0 << 14) | (5 << 11) 1911 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) 1912 | (0 << 4) | (5 << 1) | (0 << 0), 1913 1914 .inv_gain = 732, 1915 .time_stabiliz = 10, 1916 1917 .alpha_level = 0, 1918 .thlock = 118, 1919 1920 .wbd_inv = 0, 1921 .wbd_ref = 1200, 1922 .wbd_sel = 3, 1923 .wbd_alpha = 5, 1924 1925 .agc1_max = 65535, 1926 .agc1_min = 0, 1927 1928 .agc2_max = 32767, 1929 .agc2_min = 0, 1930 1931 .agc1_pt1 = 0, 1932 .agc1_pt2 = 0, 1933 .agc1_pt3 = 98, 1934 .agc1_slope1 = 0, 1935 .agc1_slope2 = 167, 1936 .agc2_pt1 = 98, 1937 .agc2_pt2 = 255, 1938 .agc2_slope1 = 52, 1939 .agc2_slope2 = 0, 1940 1941 .alpha_mant = 28, 1942 .alpha_exp = 26, 1943 .beta_mant = 31, 1944 .beta_exp = 51, 1945 1946 .perform_agc_softsplit = 0, 1947 } 1948}; 1949 1950static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = { 1951 .internal = 108000, 1952 .sampling = 13500, 1953 .pll_prediv = 1, 1954 .pll_ratio = 9, 1955 .pll_range = 1, 1956 .pll_reset = 0, 1957 .pll_bypass = 0, 1958 .enable_refdiv = 0, 1959 .bypclk_div = 0, 1960 .IO_CLK_en_core = 0, 1961 .ADClkSrc = 0, 1962 .modulo = 2, 1963 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 1964 .ifreq = (0 << 25) | 0, 1965 .timf = 20199729, 1966 .xtal_hz = 12000000, 1967}; 1968 1969static struct dib8000_config tfe8096p_dib8000_config = { 1970 .output_mpeg2_in_188_bytes = 1, 1971 .hostbus_diversity = 1, 1972 .update_lna = NULL, 1973 1974 .agc_config_count = 2, 1975 .agc = dib8096p_agc_config, 1976 .pll = &dib8096p_clock_config_12_mhz, 1977 1978 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1979 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1980 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1981 1982 .agc_control = NULL, 1983 .diversity_delay = 48, 1984 .output_mode = OUTMODE_MPEG2_FIFO, 1985 .enMpegOutput = 1, 1986}; 1987 1988static struct dib0090_wbd_slope dib8096p_wbd_table[] = { 1989 { 380, 81, 850, 64, 540, 4}, 1990 { 860, 51, 866, 21, 375, 4}, 1991 {1700, 0, 250, 0, 100, 6}, 1992 {2600, 0, 250, 0, 100, 6}, 1993 { 0xFFFF, 0, 0, 0, 0, 0}, 1994}; 1995 1996static struct dib0090_config tfe8096p_dib0090_config = { 1997 .io.clock_khz = 12000, 1998 .io.pll_bypass = 0, 1999 .io.pll_range = 0, 2000 .io.pll_prediv = 3, 2001 .io.pll_loopdiv = 6, 2002 .io.adc_clock_ratio = 0, 2003 .io.pll_int_loop_filt = 0, 2004 2005 .freq_offset_khz_uhf = -143, 2006 .freq_offset_khz_vhf = -143, 2007 2008 .get_adc_power = dib8090_get_adc_power, 2009 2010 .clkouttobamse = 1, 2011 .analog_output = 0, 2012 2013 .wbd_vhf_offset = 0, 2014 .wbd_cband_offset = 0, 2015 .use_pwm_agc = 1, 2016 .clkoutdrive = 0, 2017 2018 .fref_clock_ratio = 1, 2019 2020 .ls_cfg_pad_drv = 0, 2021 .data_tx_drv = 0, 2022 .low_if = NULL, 2023 .in_soc = 1, 2024 .force_cband_input = 0, 2025}; 2026 2027struct dibx090p_best_adc { 2028 u32 timf; 2029 u32 pll_loopdiv; 2030 u32 pll_prediv; 2031}; 2032 2033static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc) 2034{ 2035 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1; 2036 u16 xtal = 12000; 2037 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */ 2038 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */ 2039 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */ 2040 u32 fdem_min = 66000; 2041 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0; 2042 u32 harmonic_id = 0; 2043 2044 adc->timf = 0; 2045 adc->pll_loopdiv = loopdiv; 2046 adc->pll_prediv = prediv; 2047 2048 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz); 2049 2050 /* Find Min and Max prediv */ 2051 while ((xtal / max_prediv) >= fcp_min) 2052 max_prediv++; 2053 2054 max_prediv--; 2055 min_prediv = max_prediv; 2056 while ((xtal / min_prediv) <= fcp_max) { 2057 min_prediv--; 2058 if (min_prediv == 1) 2059 break; 2060 } 2061 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv); 2062 2063 min_prediv = 1; 2064 2065 for (prediv = min_prediv; prediv < max_prediv; prediv++) { 2066 fcp = xtal / prediv; 2067 if (fcp > fcp_min && fcp < fcp_max) { 2068 for (loopdiv = 1; loopdiv < 64; loopdiv++) { 2069 fmem = ((xtal/prediv) * loopdiv); 2070 fdem = fmem / 2; 2071 fs = fdem / 4; 2072 2073 /* test min/max system restrictions */ 2074 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) { 2075 spur = 0; 2076 /* test fs harmonics positions */ 2077 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) { 2078 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) { 2079 spur = 1; 2080 break; 2081 } 2082 } 2083 2084 if (!spur) { 2085 adc->pll_loopdiv = loopdiv; 2086 adc->pll_prediv = prediv; 2087 adc->timf = (4260880253U / fdem) * (1 << 8); 2088 adc->timf += ((4260880253U % fdem) << 8) / fdem; 2089 2090 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf); 2091 break; 2092 } 2093 } 2094 } 2095 } 2096 if (!spur) 2097 break; 2098 } 2099 2100 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0) 2101 return -EINVAL; 2102 return 0; 2103} 2104 2105static int dib8096p_agc_startup(struct dvb_frontend *fe) 2106{ 2107 struct dvb_usb_adapter *adap = fe->dvb->priv; 2108 struct dib0700_adapter_state *state = adap->priv; 2109 struct dibx000_bandwidth_config pll; 2110 struct dibx090p_best_adc adc; 2111 u16 target; 2112 int ret; 2113 2114 ret = state->set_param_save(fe); 2115 if (ret < 0) 2116 return ret; 2117 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config)); 2118 2119 dib0090_pwm_gain_reset(fe); 2120 /* dib0090_get_wbd_target is returning any possible 2121 temperature compensated wbd-target */ 2122 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2; 2123 state->dib8000_ops.set_wbd_ref(fe, target); 2124 2125 if (dib8096p_get_best_sampling(fe, &adc) == 0) { 2126 pll.pll_ratio = adc.pll_loopdiv; 2127 pll.pll_prediv = adc.pll_prediv; 2128 2129 dib0700_set_i2c_speed(adap->dev, 200); 2130 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0); 2131 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf); 2132 dib0700_set_i2c_speed(adap->dev, 1000); 2133 } 2134 return 0; 2135} 2136 2137static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap) 2138{ 2139 struct dib0700_state *st = adap->dev->priv; 2140 u32 fw_version; 2141 struct dib0700_adapter_state *state = adap->priv; 2142 2143 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 2144 return -ENODEV; 2145 2146 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL); 2147 if (fw_version >= 0x10200) 2148 st->fw_use_new_i2c_api = 1; 2149 2150 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 2151 msleep(20); 2152 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 2153 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 2154 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 2155 2156 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 2157 2158 dib0700_ctrl_clock(adap->dev, 72, 1); 2159 2160 msleep(20); 2161 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 2162 msleep(20); 2163 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 2164 2165 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1); 2166 2167 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 2168 0x80, &tfe8096p_dib8000_config); 2169 2170 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 2171} 2172 2173static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap) 2174{ 2175 struct dib0700_adapter_state *st = adap->priv; 2176 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe); 2177 2178 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep; 2179 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep; 2180 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table; 2181 2182 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, 2183 &tfe8096p_dib0090_config) == NULL) 2184 return -ENODEV; 2185 2186 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 2187 2188 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 2189 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup; 2190 return 0; 2191} 2192 2193/* STK9090M */ 2194static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff) 2195{ 2196 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 2197} 2198 2199static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff) 2200{ 2201 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 2202} 2203 2204static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff) 2205{ 2206 return dib9000_set_gpio(fe, 5, 0, !onoff); 2207} 2208 2209static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff) 2210{ 2211 return dib9000_set_gpio(fe, 0, 0, onoff); 2212} 2213 2214static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len) 2215{ 2216 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 }; 2217 u8 rb[2]; 2218 struct i2c_msg msg[2] = { 2219 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2}, 2220 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2}, 2221 }; 2222 u8 index_data; 2223 2224 dibx000_i2c_set_speed(i2c, 250); 2225 2226 if (i2c_transfer(i2c, msg, 2) != 2) 2227 return -EIO; 2228 2229 switch (rb[0] << 8 | rb[1]) { 2230 case 0: 2231 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n"); 2232 return -EIO; 2233 case 1: 2234 deb_info("Found DiB0170 rev2"); 2235 break; 2236 case 2: 2237 deb_info("Found DiB0190 rev2"); 2238 break; 2239 default: 2240 deb_info("DiB01x0 not found"); 2241 return -EIO; 2242 } 2243 2244 for (index_data = 0; index_data < len; index_data += 2) { 2245 wb[2] = (data[index_data + 1] >> 8) & 0xff; 2246 wb[3] = (data[index_data + 1]) & 0xff; 2247 2248 if (data[index_data] == 0) { 2249 wb[0] = (data[index_data] >> 8) & 0xff; 2250 wb[1] = (data[index_data]) & 0xff; 2251 msg[0].len = 2; 2252 if (i2c_transfer(i2c, msg, 2) != 2) 2253 return -EIO; 2254 wb[2] |= rb[0]; 2255 wb[3] |= rb[1] & ~(3 << 4); 2256 } 2257 2258 wb[0] = (data[index_data] >> 8)&0xff; 2259 wb[1] = (data[index_data])&0xff; 2260 msg[0].len = 4; 2261 if (i2c_transfer(i2c, &msg[0], 1) != 1) 2262 return -EIO; 2263 } 2264 return 0; 2265} 2266 2267static struct dib9000_config stk9090m_config = { 2268 .output_mpeg2_in_188_bytes = 1, 2269 .output_mode = OUTMODE_MPEG2_FIFO, 2270 .vcxo_timer = 279620, 2271 .timing_frequency = 20452225, 2272 .demod_clock_khz = 60000, 2273 .xtal_clock_khz = 30000, 2274 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0), 2275 .subband = { 2276 2, 2277 { 2278 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */ 2279 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */ 2280 { 0 }, 2281 }, 2282 }, 2283 .gpio_function = { 2284 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 }, 2285 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 }, 2286 }, 2287}; 2288 2289static struct dib9000_config nim9090md_config[2] = { 2290 { 2291 .output_mpeg2_in_188_bytes = 1, 2292 .output_mode = OUTMODE_MPEG2_FIFO, 2293 .vcxo_timer = 279620, 2294 .timing_frequency = 20452225, 2295 .demod_clock_khz = 60000, 2296 .xtal_clock_khz = 30000, 2297 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0), 2298 }, { 2299 .output_mpeg2_in_188_bytes = 1, 2300 .output_mode = OUTMODE_DIVERSITY, 2301 .vcxo_timer = 279620, 2302 .timing_frequency = 20452225, 2303 .demod_clock_khz = 60000, 2304 .xtal_clock_khz = 30000, 2305 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0), 2306 .subband = { 2307 2, 2308 { 2309 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */ 2310 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */ 2311 { 0 }, 2312 }, 2313 }, 2314 .gpio_function = { 2315 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 }, 2316 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 }, 2317 }, 2318 } 2319}; 2320 2321static struct dib0090_config dib9090_dib0090_config = { 2322 .io.pll_bypass = 0, 2323 .io.pll_range = 1, 2324 .io.pll_prediv = 1, 2325 .io.pll_loopdiv = 8, 2326 .io.adc_clock_ratio = 8, 2327 .io.pll_int_loop_filt = 0, 2328 .io.clock_khz = 30000, 2329 .reset = dib90x0_tuner_reset, 2330 .sleep = dib90x0_tuner_sleep, 2331 .clkouttobamse = 0, 2332 .analog_output = 0, 2333 .use_pwm_agc = 0, 2334 .clkoutdrive = 0, 2335 .freq_offset_khz_uhf = 0, 2336 .freq_offset_khz_vhf = 0, 2337}; 2338 2339static struct dib0090_config nim9090md_dib0090_config[2] = { 2340 { 2341 .io.pll_bypass = 0, 2342 .io.pll_range = 1, 2343 .io.pll_prediv = 1, 2344 .io.pll_loopdiv = 8, 2345 .io.adc_clock_ratio = 8, 2346 .io.pll_int_loop_filt = 0, 2347 .io.clock_khz = 30000, 2348 .reset = dib90x0_tuner_reset, 2349 .sleep = dib90x0_tuner_sleep, 2350 .clkouttobamse = 1, 2351 .analog_output = 0, 2352 .use_pwm_agc = 0, 2353 .clkoutdrive = 0, 2354 .freq_offset_khz_uhf = 0, 2355 .freq_offset_khz_vhf = 0, 2356 }, { 2357 .io.pll_bypass = 0, 2358 .io.pll_range = 1, 2359 .io.pll_prediv = 1, 2360 .io.pll_loopdiv = 8, 2361 .io.adc_clock_ratio = 8, 2362 .io.pll_int_loop_filt = 0, 2363 .io.clock_khz = 30000, 2364 .reset = dib90x0_tuner_reset, 2365 .sleep = dib90x0_tuner_sleep, 2366 .clkouttobamse = 0, 2367 .analog_output = 0, 2368 .use_pwm_agc = 0, 2369 .clkoutdrive = 0, 2370 .freq_offset_khz_uhf = 0, 2371 .freq_offset_khz_vhf = 0, 2372 } 2373}; 2374 2375 2376static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap) 2377{ 2378 struct dib0700_adapter_state *state = adap->priv; 2379 struct dib0700_state *st = adap->dev->priv; 2380 u32 fw_version; 2381 2382 /* Make use of the new i2c functions from FW 1.20 */ 2383 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL); 2384 if (fw_version >= 0x10200) 2385 st->fw_use_new_i2c_api = 1; 2386 dib0700_set_i2c_speed(adap->dev, 340); 2387 2388 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 2389 msleep(20); 2390 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 2391 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 2392 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 2393 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 2394 2395 dib0700_ctrl_clock(adap->dev, 72, 1); 2396 2397 msleep(20); 2398 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 2399 msleep(20); 2400 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 2401 2402 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80); 2403 2404 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) { 2405 deb_info("%s: Upload failed. (file not found?)\n", __func__); 2406 return -ENODEV; 2407 } else { 2408 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size); 2409 } 2410 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size; 2411 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data; 2412 2413 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config); 2414 2415 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 2416} 2417 2418static int dib9090_tuner_attach(struct dvb_usb_adapter *adap) 2419{ 2420 struct dib0700_adapter_state *state = adap->priv; 2421 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe); 2422 u16 data_dib190[10] = { 2423 1, 0x1374, 2424 2, 0x01a2, 2425 7, 0x0020, 2426 0, 0x00ef, 2427 8, 0x0486, 2428 }; 2429 2430 if (!IS_ENABLED(CONFIG_DVB_DIB9000)) 2431 return -ENODEV; 2432 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL) 2433 return -ENODEV; 2434 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0); 2435 if (!i2c) 2436 return -ENODEV; 2437 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0) 2438 return -ENODEV; 2439 dib0700_set_i2c_speed(adap->dev, 1500); 2440 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0) 2441 return -ENODEV; 2442 release_firmware(state->frontend_firmware); 2443 return 0; 2444} 2445 2446static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap) 2447{ 2448 struct dib0700_adapter_state *state = adap->priv; 2449 struct dib0700_state *st = adap->dev->priv; 2450 struct i2c_adapter *i2c; 2451 struct dvb_frontend *fe_slave; 2452 u32 fw_version; 2453 2454 /* Make use of the new i2c functions from FW 1.20 */ 2455 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL); 2456 if (fw_version >= 0x10200) 2457 st->fw_use_new_i2c_api = 1; 2458 dib0700_set_i2c_speed(adap->dev, 340); 2459 2460 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 2461 msleep(20); 2462 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 2463 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 2464 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 2465 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 2466 2467 dib0700_ctrl_clock(adap->dev, 72, 1); 2468 2469 msleep(20); 2470 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 2471 msleep(20); 2472 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 2473 2474 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) { 2475 deb_info("%s: Upload failed. (file not found?)\n", __func__); 2476 return -EIO; 2477 } else { 2478 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size); 2479 } 2480 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size; 2481 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data; 2482 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size; 2483 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data; 2484 2485 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80); 2486 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]); 2487 2488 if (adap->fe_adap[0].fe == NULL) 2489 return -ENODEV; 2490 2491 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0); 2492 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82); 2493 2494 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]); 2495 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave); 2496 2497 return fe_slave == NULL ? -ENODEV : 0; 2498} 2499 2500static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap) 2501{ 2502 struct dib0700_adapter_state *state = adap->priv; 2503 struct i2c_adapter *i2c; 2504 struct dvb_frontend *fe_slave; 2505 u16 data_dib190[10] = { 2506 1, 0x5374, 2507 2, 0x01ae, 2508 7, 0x0020, 2509 0, 0x00ef, 2510 8, 0x0406, 2511 }; 2512 if (!IS_ENABLED(CONFIG_DVB_DIB9000)) 2513 return -ENODEV; 2514 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe); 2515 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL) 2516 return -ENODEV; 2517 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0); 2518 if (!i2c) 2519 return -ENODEV; 2520 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0) 2521 return -ENODEV; 2522 2523 dib0700_set_i2c_speed(adap->dev, 1500); 2524 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0) 2525 return -ENODEV; 2526 2527 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1); 2528 if (fe_slave != NULL) { 2529 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe); 2530 dib9000_set_i2c_adapter(fe_slave, i2c); 2531 2532 i2c = dib9000_get_tuner_interface(fe_slave); 2533 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL) 2534 return -ENODEV; 2535 fe_slave->dvb = adap->fe_adap[0].fe->dvb; 2536 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500); 2537 if (dib9000_firmware_post_pll_init(fe_slave) < 0) 2538 return -ENODEV; 2539 } 2540 release_firmware(state->frontend_firmware); 2541 2542 return 0; 2543} 2544 2545/* NIM7090 */ 2546static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc) 2547{ 2548 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1; 2549 2550 u16 xtal = 12000; 2551 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */ 2552 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */ 2553 u32 fdem_max = 76000; 2554 u32 fdem_min = 69500; 2555 u32 fcp = 0, fs = 0, fdem = 0; 2556 u32 harmonic_id = 0; 2557 2558 adc->pll_loopdiv = loopdiv; 2559 adc->pll_prediv = prediv; 2560 adc->timf = 0; 2561 2562 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min); 2563 2564 /* Find Min and Max prediv */ 2565 while ((xtal/max_prediv) >= fcp_min) 2566 max_prediv++; 2567 2568 max_prediv--; 2569 min_prediv = max_prediv; 2570 while ((xtal/min_prediv) <= fcp_max) { 2571 min_prediv--; 2572 if (min_prediv == 1) 2573 break; 2574 } 2575 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv); 2576 2577 min_prediv = 2; 2578 2579 for (prediv = min_prediv ; prediv < max_prediv; prediv++) { 2580 fcp = xtal / prediv; 2581 if (fcp > fcp_min && fcp < fcp_max) { 2582 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) { 2583 fdem = ((xtal/prediv) * loopdiv); 2584 fs = fdem / 4; 2585 /* test min/max system restrictions */ 2586 2587 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) { 2588 spur = 0; 2589 /* test fs harmonics positions */ 2590 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) { 2591 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) { 2592 spur = 1; 2593 break; 2594 } 2595 } 2596 2597 if (!spur) { 2598 adc->pll_loopdiv = loopdiv; 2599 adc->pll_prediv = prediv; 2600 adc->timf = 2396745143UL/fdem*(1 << 9); 2601 adc->timf += ((2396745143UL%fdem) << 9)/fdem; 2602 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf); 2603 break; 2604 } 2605 } 2606 } 2607 } 2608 if (!spur) 2609 break; 2610 } 2611 2612 2613 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0) 2614 return -EINVAL; 2615 else 2616 return 0; 2617} 2618 2619static int dib7090_agc_startup(struct dvb_frontend *fe) 2620{ 2621 struct dvb_usb_adapter *adap = fe->dvb->priv; 2622 struct dib0700_adapter_state *state = adap->priv; 2623 struct dibx000_bandwidth_config pll; 2624 u16 target; 2625 struct dibx090p_best_adc adc; 2626 int ret; 2627 2628 ret = state->set_param_save(fe); 2629 if (ret < 0) 2630 return ret; 2631 2632 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config)); 2633 dib0090_pwm_gain_reset(fe); 2634 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2; 2635 state->dib7000p_ops.set_wbd_ref(fe, target); 2636 2637 if (dib7090p_get_best_sampling(fe, &adc) == 0) { 2638 pll.pll_ratio = adc.pll_loopdiv; 2639 pll.pll_prediv = adc.pll_prediv; 2640 2641 state->dib7000p_ops.update_pll(fe, &pll); 2642 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf); 2643 } 2644 return 0; 2645} 2646 2647static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart) 2648{ 2649 deb_info("AGC restart callback: %d", restart); 2650 if (restart == 0) /* before AGC startup */ 2651 dib0090_set_dc_servo(fe, 1); 2652 return 0; 2653} 2654 2655static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global) 2656{ 2657 struct dvb_usb_adapter *adap = fe->dvb->priv; 2658 struct dib0700_adapter_state *state = adap->priv; 2659 2660 deb_info("update LNA: agc global=%i", agc_global); 2661 2662 if (agc_global < 25000) { 2663 state->dib7000p_ops.set_gpio(fe, 8, 0, 0); 2664 state->dib7000p_ops.set_agc1_min(fe, 0); 2665 } else { 2666 state->dib7000p_ops.set_gpio(fe, 8, 0, 1); 2667 state->dib7000p_ops.set_agc1_min(fe, 32768); 2668 } 2669 2670 return 0; 2671} 2672 2673static struct dib0090_wbd_slope dib7090_wbd_table[] = { 2674 { 380, 81, 850, 64, 540, 4}, 2675 { 860, 51, 866, 21, 375, 4}, 2676 {1700, 0, 250, 0, 100, 6}, 2677 {2600, 0, 250, 0, 100, 6}, 2678 { 0xFFFF, 0, 0, 0, 0, 0}, 2679}; 2680 2681static struct dibx000_agc_config dib7090_agc_config[2] = { 2682 { 2683 .band_caps = BAND_UHF, 2684 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 2685 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 2686 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 2687 2688 .inv_gain = 687, 2689 .time_stabiliz = 10, 2690 2691 .alpha_level = 0, 2692 .thlock = 118, 2693 2694 .wbd_inv = 0, 2695 .wbd_ref = 1200, 2696 .wbd_sel = 3, 2697 .wbd_alpha = 5, 2698 2699 .agc1_max = 65535, 2700 .agc1_min = 32768, 2701 2702 .agc2_max = 65535, 2703 .agc2_min = 0, 2704 2705 .agc1_pt1 = 0, 2706 .agc1_pt2 = 32, 2707 .agc1_pt3 = 114, 2708 .agc1_slope1 = 143, 2709 .agc1_slope2 = 144, 2710 .agc2_pt1 = 114, 2711 .agc2_pt2 = 227, 2712 .agc2_slope1 = 116, 2713 .agc2_slope2 = 117, 2714 2715 .alpha_mant = 18, 2716 .alpha_exp = 0, 2717 .beta_mant = 20, 2718 .beta_exp = 59, 2719 2720 .perform_agc_softsplit = 0, 2721 } , { 2722 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND, 2723 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 2724 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 2725 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 2726 2727 .inv_gain = 732, 2728 .time_stabiliz = 10, 2729 2730 .alpha_level = 0, 2731 .thlock = 118, 2732 2733 .wbd_inv = 0, 2734 .wbd_ref = 1200, 2735 .wbd_sel = 3, 2736 .wbd_alpha = 5, 2737 2738 .agc1_max = 65535, 2739 .agc1_min = 0, 2740 2741 .agc2_max = 65535, 2742 .agc2_min = 0, 2743 2744 .agc1_pt1 = 0, 2745 .agc1_pt2 = 0, 2746 .agc1_pt3 = 98, 2747 .agc1_slope1 = 0, 2748 .agc1_slope2 = 167, 2749 .agc2_pt1 = 98, 2750 .agc2_pt2 = 255, 2751 .agc2_slope1 = 104, 2752 .agc2_slope2 = 0, 2753 2754 .alpha_mant = 18, 2755 .alpha_exp = 0, 2756 .beta_mant = 20, 2757 .beta_exp = 59, 2758 2759 .perform_agc_softsplit = 0, 2760 } 2761}; 2762 2763static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = { 2764 .internal = 60000, 2765 .sampling = 15000, 2766 .pll_prediv = 1, 2767 .pll_ratio = 5, 2768 .pll_range = 0, 2769 .pll_reset = 0, 2770 .pll_bypass = 0, 2771 .enable_refdiv = 0, 2772 .bypclk_div = 0, 2773 .IO_CLK_en_core = 1, 2774 .ADClkSrc = 1, 2775 .modulo = 2, 2776 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 2777 .ifreq = (0 << 25) | 0, 2778 .timf = 20452225, 2779 .xtal_hz = 15000000, 2780}; 2781 2782static struct dib7000p_config nim7090_dib7000p_config = { 2783 .output_mpeg2_in_188_bytes = 1, 2784 .hostbus_diversity = 1, 2785 .tuner_is_baseband = 1, 2786 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */ 2787 2788 .agc_config_count = 2, 2789 .agc = dib7090_agc_config, 2790 2791 .bw = &dib7090_clock_config_12_mhz, 2792 2793 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 2794 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 2795 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 2796 2797 .pwm_freq_div = 0, 2798 2799 .agc_control = dib7090_agc_restart, 2800 2801 .spur_protect = 0, 2802 .disable_sample_and_hold = 0, 2803 .enable_current_mirror = 0, 2804 .diversity_delay = 0, 2805 2806 .output_mode = OUTMODE_MPEG2_FIFO, 2807 .enMpegOutput = 1, 2808}; 2809 2810static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global) 2811{ 2812 struct dvb_usb_adapter *adap = fe->dvb->priv; 2813 struct dib0700_adapter_state *state = adap->priv; 2814 2815 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global); 2816 if (agc_global < 25000) { 2817 state->dib7000p_ops.set_gpio(fe, 5, 0, 0); 2818 state->dib7000p_ops.set_agc1_min(fe, 0); 2819 } else { 2820 state->dib7000p_ops.set_gpio(fe, 5, 0, 1); 2821 state->dib7000p_ops.set_agc1_min(fe, 32768); 2822 } 2823 2824 return 0; 2825} 2826 2827static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = { 2828 { 2829 .output_mpeg2_in_188_bytes = 1, 2830 .hostbus_diversity = 1, 2831 .tuner_is_baseband = 1, 2832 .update_lna = tfe7090p_pvr_update_lna, 2833 2834 .agc_config_count = 2, 2835 .agc = dib7090_agc_config, 2836 2837 .bw = &dib7090_clock_config_12_mhz, 2838 2839 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 2840 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 2841 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 2842 2843 .pwm_freq_div = 0, 2844 2845 .agc_control = dib7090_agc_restart, 2846 2847 .spur_protect = 0, 2848 .disable_sample_and_hold = 0, 2849 .enable_current_mirror = 0, 2850 .diversity_delay = 0, 2851 2852 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, 2853 .default_i2c_addr = 0x90, 2854 .enMpegOutput = 1, 2855 }, { 2856 .output_mpeg2_in_188_bytes = 1, 2857 .hostbus_diversity = 1, 2858 .tuner_is_baseband = 1, 2859 .update_lna = tfe7090p_pvr_update_lna, 2860 2861 .agc_config_count = 2, 2862 .agc = dib7090_agc_config, 2863 2864 .bw = &dib7090_clock_config_12_mhz, 2865 2866 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 2867 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 2868 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 2869 2870 .pwm_freq_div = 0, 2871 2872 .agc_control = dib7090_agc_restart, 2873 2874 .spur_protect = 0, 2875 .disable_sample_and_hold = 0, 2876 .enable_current_mirror = 0, 2877 .diversity_delay = 0, 2878 2879 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, 2880 .default_i2c_addr = 0x92, 2881 .enMpegOutput = 0, 2882 } 2883}; 2884 2885static struct dib0090_config nim7090_dib0090_config = { 2886 .io.clock_khz = 12000, 2887 .io.pll_bypass = 0, 2888 .io.pll_range = 0, 2889 .io.pll_prediv = 3, 2890 .io.pll_loopdiv = 6, 2891 .io.adc_clock_ratio = 0, 2892 .io.pll_int_loop_filt = 0, 2893 2894 .freq_offset_khz_uhf = 0, 2895 .freq_offset_khz_vhf = 0, 2896 2897 .clkouttobamse = 1, 2898 .analog_output = 0, 2899 2900 .wbd_vhf_offset = 0, 2901 .wbd_cband_offset = 0, 2902 .use_pwm_agc = 1, 2903 .clkoutdrive = 0, 2904 2905 .fref_clock_ratio = 0, 2906 2907 .wbd = dib7090_wbd_table, 2908 2909 .ls_cfg_pad_drv = 0, 2910 .data_tx_drv = 0, 2911 .low_if = NULL, 2912 .in_soc = 1, 2913}; 2914 2915static struct dib7000p_config tfe7790p_dib7000p_config = { 2916 .output_mpeg2_in_188_bytes = 1, 2917 .hostbus_diversity = 1, 2918 .tuner_is_baseband = 1, 2919 .update_lna = tfe7790p_update_lna, 2920 2921 .agc_config_count = 2, 2922 .agc = dib7090_agc_config, 2923 2924 .bw = &dib7090_clock_config_12_mhz, 2925 2926 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 2927 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 2928 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 2929 2930 .pwm_freq_div = 0, 2931 2932 .agc_control = dib7090_agc_restart, 2933 2934 .spur_protect = 0, 2935 .disable_sample_and_hold = 0, 2936 .enable_current_mirror = 0, 2937 .diversity_delay = 0, 2938 2939 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, 2940 .enMpegOutput = 1, 2941}; 2942 2943static struct dib0090_config tfe7790p_dib0090_config = { 2944 .io.clock_khz = 12000, 2945 .io.pll_bypass = 0, 2946 .io.pll_range = 0, 2947 .io.pll_prediv = 3, 2948 .io.pll_loopdiv = 6, 2949 .io.adc_clock_ratio = 0, 2950 .io.pll_int_loop_filt = 0, 2951 2952 .freq_offset_khz_uhf = 0, 2953 .freq_offset_khz_vhf = 0, 2954 2955 .clkouttobamse = 1, 2956 .analog_output = 0, 2957 2958 .wbd_vhf_offset = 0, 2959 .wbd_cband_offset = 0, 2960 .use_pwm_agc = 1, 2961 .clkoutdrive = 0, 2962 2963 .fref_clock_ratio = 0, 2964 2965 .wbd = dib7090_wbd_table, 2966 2967 .ls_cfg_pad_drv = 0, 2968 .data_tx_drv = 0, 2969 .low_if = NULL, 2970 .in_soc = 1, 2971 .force_cband_input = 0, 2972 .is_dib7090e = 0, 2973 .force_crystal_mode = 1, 2974}; 2975 2976static struct dib0090_config tfe7090pvr_dib0090_config[2] = { 2977 { 2978 .io.clock_khz = 12000, 2979 .io.pll_bypass = 0, 2980 .io.pll_range = 0, 2981 .io.pll_prediv = 3, 2982 .io.pll_loopdiv = 6, 2983 .io.adc_clock_ratio = 0, 2984 .io.pll_int_loop_filt = 0, 2985 2986 .freq_offset_khz_uhf = 50, 2987 .freq_offset_khz_vhf = 70, 2988 2989 .clkouttobamse = 1, 2990 .analog_output = 0, 2991 2992 .wbd_vhf_offset = 0, 2993 .wbd_cband_offset = 0, 2994 .use_pwm_agc = 1, 2995 .clkoutdrive = 0, 2996 2997 .fref_clock_ratio = 0, 2998 2999 .wbd = dib7090_wbd_table, 3000 3001 .ls_cfg_pad_drv = 0, 3002 .data_tx_drv = 0, 3003 .low_if = NULL, 3004 .in_soc = 1, 3005 }, { 3006 .io.clock_khz = 12000, 3007 .io.pll_bypass = 0, 3008 .io.pll_range = 0, 3009 .io.pll_prediv = 3, 3010 .io.pll_loopdiv = 6, 3011 .io.adc_clock_ratio = 0, 3012 .io.pll_int_loop_filt = 0, 3013 3014 .freq_offset_khz_uhf = -50, 3015 .freq_offset_khz_vhf = -70, 3016 3017 .clkouttobamse = 1, 3018 .analog_output = 0, 3019 3020 .wbd_vhf_offset = 0, 3021 .wbd_cband_offset = 0, 3022 .use_pwm_agc = 1, 3023 .clkoutdrive = 0, 3024 3025 .fref_clock_ratio = 0, 3026 3027 .wbd = dib7090_wbd_table, 3028 3029 .ls_cfg_pad_drv = 0, 3030 .data_tx_drv = 0, 3031 .low_if = NULL, 3032 .in_soc = 1, 3033 } 3034}; 3035 3036static int nim7090_frontend_attach(struct dvb_usb_adapter *adap) 3037{ 3038 struct dib0700_adapter_state *state = adap->priv; 3039 3040 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3041 return -ENODEV; 3042 3043 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3044 msleep(20); 3045 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 3046 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 3047 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 3048 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3049 3050 msleep(20); 3051 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3052 msleep(20); 3053 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3054 3055 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) { 3056 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 3057 dvb_detach(state->dib7000p_ops.set_wbd_ref); 3058 return -ENODEV; 3059 } 3060 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config); 3061 3062 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3063} 3064 3065static int nim7090_tuner_attach(struct dvb_usb_adapter *adap) 3066{ 3067 struct dib0700_adapter_state *st = adap->priv; 3068 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe); 3069 3070 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep; 3071 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep; 3072 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power; 3073 3074 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL) 3075 return -ENODEV; 3076 3077 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3078 3079 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 3080 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup; 3081 return 0; 3082} 3083 3084static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap) 3085{ 3086 struct dib0700_state *st = adap->dev->priv; 3087 struct dib0700_adapter_state *state = adap->priv; 3088 3089 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3090 return -ENODEV; 3091 3092 /* The TFE7090 requires the dib0700 to not be in master mode */ 3093 st->disable_streaming_master_mode = 1; 3094 3095 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3096 msleep(20); 3097 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 3098 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 3099 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 3100 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3101 3102 msleep(20); 3103 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3104 msleep(20); 3105 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3106 3107 /* initialize IC 0 */ 3108 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) { 3109 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 3110 dvb_detach(state->dib7000p_ops.set_wbd_ref); 3111 return -ENODEV; 3112 } 3113 3114 dib0700_set_i2c_speed(adap->dev, 340); 3115 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]); 3116 if (adap->fe_adap[0].fe == NULL) 3117 return -ENODEV; 3118 3119 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe); 3120 3121 return 0; 3122} 3123 3124static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap) 3125{ 3126 struct i2c_adapter *i2c; 3127 struct dib0700_adapter_state *state = adap->priv; 3128 3129 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) { 3130 err("the master dib7090 has to be initialized first"); 3131 return -ENODEV; /* the master device has not been initialized */ 3132 } 3133 3134 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3135 return -ENODEV; 3136 3137 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1); 3138 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) { 3139 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 3140 dvb_detach(state->dib7000p_ops.set_wbd_ref); 3141 return -ENODEV; 3142 } 3143 3144 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]); 3145 dib0700_set_i2c_speed(adap->dev, 200); 3146 3147 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3148} 3149 3150static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap) 3151{ 3152 struct dib0700_adapter_state *st = adap->priv; 3153 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe); 3154 3155 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep; 3156 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep; 3157 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power; 3158 3159 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL) 3160 return -ENODEV; 3161 3162 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3163 3164 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 3165 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup; 3166 return 0; 3167} 3168 3169static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap) 3170{ 3171 struct dib0700_adapter_state *st = adap->priv; 3172 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe); 3173 3174 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep; 3175 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep; 3176 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power; 3177 3178 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL) 3179 return -ENODEV; 3180 3181 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3182 3183 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 3184 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup; 3185 return 0; 3186} 3187 3188static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap) 3189{ 3190 struct dib0700_state *st = adap->dev->priv; 3191 struct dib0700_adapter_state *state = adap->priv; 3192 3193 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3194 return -ENODEV; 3195 3196 /* The TFE7790P requires the dib0700 to not be in master mode */ 3197 st->disable_streaming_master_mode = 1; 3198 3199 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3200 msleep(20); 3201 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 3202 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 3203 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 3204 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3205 msleep(20); 3206 dib0700_ctrl_clock(adap->dev, 72, 1); 3207 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3208 msleep(20); 3209 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3210 3211 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 3212 1, 0x10, &tfe7790p_dib7000p_config) != 0) { 3213 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 3214 __func__); 3215 dvb_detach(state->dib7000p_ops.set_wbd_ref); 3216 return -ENODEV; 3217 } 3218 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 3219 0x80, &tfe7790p_dib7000p_config); 3220 3221 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3222} 3223 3224static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap) 3225{ 3226 struct dib0700_adapter_state *st = adap->priv; 3227 struct i2c_adapter *tun_i2c = 3228 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe); 3229 3230 3231 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep; 3232 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep; 3233 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power; 3234 3235 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, 3236 &tfe7790p_dib0090_config) == NULL) 3237 return -ENODEV; 3238 3239 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3240 3241 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 3242 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup; 3243 return 0; 3244} 3245 3246/* STK7070PD */ 3247static struct dib7000p_config stk7070pd_dib7000p_config[2] = { 3248 { 3249 .output_mpeg2_in_188_bytes = 1, 3250 3251 .agc_config_count = 1, 3252 .agc = &dib7070_agc_config, 3253 .bw = &dib7070_bw_config_12_mhz, 3254 .tuner_is_baseband = 1, 3255 .spur_protect = 1, 3256 3257 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 3258 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 3259 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 3260 3261 .hostbus_diversity = 1, 3262 }, { 3263 .output_mpeg2_in_188_bytes = 1, 3264 3265 .agc_config_count = 1, 3266 .agc = &dib7070_agc_config, 3267 .bw = &dib7070_bw_config_12_mhz, 3268 .tuner_is_baseband = 1, 3269 .spur_protect = 1, 3270 3271 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 3272 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 3273 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 3274 3275 .hostbus_diversity = 1, 3276 } 3277}; 3278 3279static void stk7070pd_init(struct dvb_usb_device *dev) 3280{ 3281 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1); 3282 msleep(10); 3283 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1); 3284 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1); 3285 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1); 3286 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0); 3287 3288 dib0700_ctrl_clock(dev, 72, 1); 3289 3290 msleep(10); 3291 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1); 3292} 3293 3294static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap) 3295{ 3296 struct dib0700_adapter_state *state = adap->priv; 3297 3298 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3299 return -ENODEV; 3300 3301 stk7070pd_init(adap->dev); 3302 3303 msleep(10); 3304 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3305 3306 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 3307 stk7070pd_dib7000p_config) != 0) { 3308 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 3309 __func__); 3310 dvb_detach(state->dib7000p_ops.set_wbd_ref); 3311 return -ENODEV; 3312 } 3313 3314 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]); 3315 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3316} 3317 3318static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap) 3319{ 3320 struct dib0700_adapter_state *state = adap->priv; 3321 3322 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3323 return -ENODEV; 3324 3325 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]); 3326 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3327} 3328 3329static int novatd_read_status_override(struct dvb_frontend *fe, 3330 enum fe_status *stat) 3331{ 3332 struct dvb_usb_adapter *adap = fe->dvb->priv; 3333 struct dvb_usb_device *dev = adap->dev; 3334 struct dib0700_state *state = dev->priv; 3335 int ret; 3336 3337 ret = state->read_status(fe, stat); 3338 3339 if (!ret) 3340 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 3341 !!(*stat & FE_HAS_LOCK)); 3342 3343 return ret; 3344} 3345 3346static int novatd_sleep_override(struct dvb_frontend* fe) 3347{ 3348 struct dvb_usb_adapter *adap = fe->dvb->priv; 3349 struct dvb_usb_device *dev = adap->dev; 3350 struct dib0700_state *state = dev->priv; 3351 3352 /* turn off LED */ 3353 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0); 3354 3355 return state->sleep(fe); 3356} 3357 3358/* 3359 * novatd_frontend_attach - Nova-TD specific attach 3360 * 3361 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for 3362 * information purposes. 3363 */ 3364static int novatd_frontend_attach(struct dvb_usb_adapter *adap) 3365{ 3366 struct dvb_usb_device *dev = adap->dev; 3367 struct dib0700_state *st = dev->priv; 3368 struct dib0700_adapter_state *state = adap->priv; 3369 3370 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3371 return -ENODEV; 3372 3373 if (adap->id == 0) { 3374 stk7070pd_init(dev); 3375 3376 /* turn the power LED on, the other two off (just in case) */ 3377 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0); 3378 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0); 3379 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1); 3380 3381 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18, 3382 stk7070pd_dib7000p_config) != 0) { 3383 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 3384 __func__); 3385 dvb_detach(state->dib7000p_ops.set_wbd_ref); 3386 return -ENODEV; 3387 } 3388 } 3389 3390 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap, 3391 adap->id == 0 ? 0x80 : 0x82, 3392 &stk7070pd_dib7000p_config[adap->id]); 3393 3394 if (adap->fe_adap[0].fe == NULL) 3395 return -ENODEV; 3396 3397 st->read_status = adap->fe_adap[0].fe->ops.read_status; 3398 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override; 3399 st->sleep = adap->fe_adap[0].fe->ops.sleep; 3400 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override; 3401 3402 return 0; 3403} 3404 3405/* S5H1411 */ 3406static struct s5h1411_config pinnacle_801e_config = { 3407 .output_mode = S5H1411_PARALLEL_OUTPUT, 3408 .gpio = S5H1411_GPIO_OFF, 3409 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK, 3410 .qam_if = S5H1411_IF_44000, 3411 .vsb_if = S5H1411_IF_44000, 3412 .inversion = S5H1411_INVERSION_OFF, 3413 .status_mode = S5H1411_DEMODLOCKING 3414}; 3415 3416/* Pinnacle PCTV HD Pro 801e GPIOs map: 3417 GPIO0 - currently unknown 3418 GPIO1 - xc5000 tuner reset 3419 GPIO2 - CX25843 sleep 3420 GPIO3 - currently unknown 3421 GPIO4 - currently unknown 3422 GPIO6 - currently unknown 3423 GPIO7 - currently unknown 3424 GPIO9 - currently unknown 3425 GPIO10 - CX25843 reset 3426 */ 3427static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap) 3428{ 3429 struct dib0700_state *st = adap->dev->priv; 3430 3431 /* Make use of the new i2c functions from FW 1.20 */ 3432 st->fw_use_new_i2c_api = 1; 3433 3434 /* The s5h1411 requires the dib0700 to not be in master mode */ 3435 st->disable_streaming_master_mode = 1; 3436 3437 /* All msleep values taken from Windows USB trace */ 3438 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0); 3439 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0); 3440 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3441 msleep(400); 3442 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3443 msleep(60); 3444 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3445 msleep(30); 3446 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3447 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 3448 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 3449 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 3450 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0); 3451 msleep(30); 3452 3453 /* Put the CX25843 to sleep for now since we're in digital mode */ 3454 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1); 3455 3456 /* GPIOs are initialized, do the attach */ 3457 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config, 3458 &adap->dev->i2c_adap); 3459 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3460} 3461 3462static int dib0700_xc5000_tuner_callback(void *priv, int component, 3463 int command, int arg) 3464{ 3465 struct dvb_usb_adapter *adap = priv; 3466 3467 if (command == XC5000_TUNER_RESET) { 3468 /* Reset the tuner */ 3469 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0); 3470 msleep(10); 3471 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1); 3472 msleep(10); 3473 } else { 3474 err("xc5000: unknown tuner callback command: %d\n", command); 3475 return -EINVAL; 3476 } 3477 3478 return 0; 3479} 3480 3481static struct xc5000_config s5h1411_xc5000_tunerconfig = { 3482 .i2c_address = 0x64, 3483 .if_khz = 5380, 3484}; 3485 3486static int xc5000_tuner_attach(struct dvb_usb_adapter *adap) 3487{ 3488 /* FIXME: generalize & move to common area */ 3489 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback; 3490 3491 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap, 3492 &s5h1411_xc5000_tunerconfig) 3493 == NULL ? -ENODEV : 0; 3494} 3495 3496static int dib0700_xc4000_tuner_callback(void *priv, int component, 3497 int command, int arg) 3498{ 3499 struct dvb_usb_adapter *adap = priv; 3500 struct dib0700_adapter_state *state = adap->priv; 3501 3502 if (command == XC4000_TUNER_RESET) { 3503 /* Reset the tuner */ 3504 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0); 3505 msleep(10); 3506 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3507 } else { 3508 err("xc4000: unknown tuner callback command: %d\n", command); 3509 return -EINVAL; 3510 } 3511 3512 return 0; 3513} 3514 3515static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = { 3516 .band_caps = BAND_UHF | BAND_VHF, 3517 .setup = 0x64, 3518 .inv_gain = 0x02c8, 3519 .time_stabiliz = 0x15, 3520 .alpha_level = 0x00, 3521 .thlock = 0x76, 3522 .wbd_inv = 0x01, 3523 .wbd_ref = 0x0b33, 3524 .wbd_sel = 0x00, 3525 .wbd_alpha = 0x02, 3526 .agc1_max = 0x00, 3527 .agc1_min = 0x00, 3528 .agc2_max = 0x9b26, 3529 .agc2_min = 0x26ca, 3530 .agc1_pt1 = 0x00, 3531 .agc1_pt2 = 0x00, 3532 .agc1_pt3 = 0x00, 3533 .agc1_slope1 = 0x00, 3534 .agc1_slope2 = 0x00, 3535 .agc2_pt1 = 0x00, 3536 .agc2_pt2 = 0x80, 3537 .agc2_slope1 = 0x1d, 3538 .agc2_slope2 = 0x1d, 3539 .alpha_mant = 0x11, 3540 .alpha_exp = 0x1b, 3541 .beta_mant = 0x17, 3542 .beta_exp = 0x33, 3543 .perform_agc_softsplit = 0x00, 3544}; 3545 3546static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = { 3547 .internal = 60000, 3548 .sampling = 30000, 3549 .pll_prediv = 1, 3550 .pll_ratio = 8, 3551 .pll_range = 3, 3552 .pll_reset = 1, 3553 .pll_bypass = 0, 3554 .enable_refdiv = 0, 3555 .bypclk_div = 0, 3556 .IO_CLK_en_core = 1, 3557 .ADClkSrc = 1, 3558 .modulo = 0, 3559 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */ 3560 .ifreq = 39370534, 3561 .timf = 20452225, 3562 .xtal_hz = 30000000 3563}; 3564 3565/* FIXME: none of these inputs are validated yet */ 3566static struct dib7000p_config pctv_340e_config = { 3567 .output_mpeg2_in_188_bytes = 1, 3568 3569 .agc_config_count = 1, 3570 .agc = &stk7700p_7000p_xc4000_agc_config, 3571 .bw = &stk7700p_xc4000_pll_config, 3572 3573 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS, 3574 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES, 3575 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS, 3576}; 3577 3578/* PCTV 340e GPIOs map: 3579 dib0700: 3580 GPIO2 - CX25843 sleep 3581 GPIO3 - CS5340 reset 3582 GPIO5 - IRD 3583 GPIO6 - Power Supply 3584 GPIO8 - LNA (1=off 0=on) 3585 GPIO10 - CX25843 reset 3586 dib7000: 3587 GPIO8 - xc4000 reset 3588 */ 3589static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap) 3590{ 3591 struct dib0700_state *st = adap->dev->priv; 3592 struct dib0700_adapter_state *state = adap->priv; 3593 3594 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3595 return -ENODEV; 3596 3597 /* Power Supply on */ 3598 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 3599 msleep(50); 3600 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3601 msleep(100); /* Allow power supply to settle before probing */ 3602 3603 /* cx25843 reset */ 3604 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3605 msleep(1); /* cx25843 datasheet say 350us required */ 3606 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3607 3608 /* LNA off for now */ 3609 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1); 3610 3611 /* Put the CX25843 to sleep for now since we're in digital mode */ 3612 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1); 3613 3614 /* FIXME: not verified yet */ 3615 dib0700_ctrl_clock(adap->dev, 72, 1); 3616 3617 msleep(500); 3618 3619 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) { 3620 /* Demodulator not found for some reason? */ 3621 dvb_detach(state->dib7000p_ops.set_wbd_ref); 3622 return -ENODEV; 3623 } 3624 3625 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12, 3626 &pctv_340e_config); 3627 st->is_dib7000pc = 1; 3628 3629 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3630} 3631 3632static struct xc4000_config dib7000p_xc4000_tunerconfig = { 3633 .i2c_address = 0x61, 3634 .default_pm = 1, 3635 .dvb_amplitude = 0, 3636 .set_smoothedcvbs = 0, 3637 .if_khz = 5400 3638}; 3639 3640static int xc4000_tuner_attach(struct dvb_usb_adapter *adap) 3641{ 3642 struct i2c_adapter *tun_i2c; 3643 struct dib0700_adapter_state *state = adap->priv; 3644 3645 /* The xc4000 is not on the main i2c bus */ 3646 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, 3647 DIBX000_I2C_INTERFACE_TUNER, 1); 3648 if (tun_i2c == NULL) { 3649 printk(KERN_ERR "Could not reach tuner i2c bus\n"); 3650 return 0; 3651 } 3652 3653 /* Setup the reset callback */ 3654 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback; 3655 3656 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c, 3657 &dib7000p_xc4000_tunerconfig) 3658 == NULL ? -ENODEV : 0; 3659} 3660 3661static struct lgdt3305_config hcw_lgdt3305_config = { 3662 .i2c_addr = 0x0e, 3663 .mpeg_mode = LGDT3305_MPEG_PARALLEL, 3664 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, 3665 .tpvalid_polarity = LGDT3305_TP_VALID_LOW, 3666 .deny_i2c_rptr = 0, 3667 .spectral_inversion = 1, 3668 .qam_if_khz = 6000, 3669 .vsb_if_khz = 6000, 3670 .usref_8vsb = 0x0500, 3671}; 3672 3673static struct mxl5007t_config hcw_mxl5007t_config = { 3674 .xtal_freq_hz = MxL_XTAL_25_MHZ, 3675 .if_freq_hz = MxL_IF_6_MHZ, 3676 .invert_if = 1, 3677}; 3678 3679/* TIGER-ATSC map: 3680 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled) 3681 GPIO1 - ANT_SEL (H: VPA, L: MCX) 3682 GPIO4 - SCL2 3683 GPIO6 - EN_TUNER 3684 GPIO7 - SDA2 3685 GPIO10 - DEM_RST 3686 3687 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB 3688 */ 3689static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap) 3690{ 3691 struct dib0700_state *st = adap->dev->priv; 3692 3693 /* Make use of the new i2c functions from FW 1.20 */ 3694 st->fw_use_new_i2c_api = 1; 3695 3696 st->disable_streaming_master_mode = 1; 3697 3698 /* fe power enable */ 3699 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 3700 msleep(30); 3701 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3702 msleep(30); 3703 3704 /* demod reset */ 3705 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3706 msleep(30); 3707 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3708 msleep(30); 3709 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3710 msleep(30); 3711 3712 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach, 3713 &hcw_lgdt3305_config, 3714 &adap->dev->i2c_adap); 3715 3716 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3717} 3718 3719static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap) 3720{ 3721 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe, 3722 &adap->dev->i2c_adap, 0x60, 3723 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0; 3724} 3725 3726static int xbox_one_attach(struct dvb_usb_adapter *adap) 3727{ 3728 struct dib0700_state *st = adap->dev->priv; 3729 struct i2c_client *client_demod, *client_tuner; 3730 struct dvb_usb_device *d = adap->dev; 3731 struct mn88472_config mn88472_config = { }; 3732 struct tda18250_config tda18250_config; 3733 struct i2c_board_info info; 3734 3735 st->fw_use_new_i2c_api = 1; 3736 st->disable_streaming_master_mode = 1; 3737 3738 /* fe power enable */ 3739 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 3740 msleep(30); 3741 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3742 msleep(30); 3743 3744 /* demod reset */ 3745 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3746 msleep(30); 3747 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3748 msleep(30); 3749 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3750 msleep(30); 3751 3752 /* attach demod */ 3753 mn88472_config.fe = &adap->fe_adap[0].fe; 3754 mn88472_config.i2c_wr_max = 22; 3755 mn88472_config.xtal = 20500000; 3756 mn88472_config.ts_mode = PARALLEL_TS_MODE; 3757 mn88472_config.ts_clock = FIXED_TS_CLOCK; 3758 memset(&info, 0, sizeof(struct i2c_board_info)); 3759 strscpy(info.type, "mn88472", I2C_NAME_SIZE); 3760 info.addr = 0x18; 3761 info.platform_data = &mn88472_config; 3762 request_module(info.type); 3763 client_demod = i2c_new_client_device(&d->i2c_adap, &info); 3764 if (!i2c_client_has_driver(client_demod)) 3765 goto fail_demod_device; 3766 if (!try_module_get(client_demod->dev.driver->owner)) 3767 goto fail_demod_module; 3768 3769 st->i2c_client_demod = client_demod; 3770 3771 adap->fe_adap[0].fe = mn88472_config.get_dvb_frontend(client_demod); 3772 3773 /* attach tuner */ 3774 memset(&tda18250_config, 0, sizeof(tda18250_config)); 3775 tda18250_config.if_dvbt_6 = 3950; 3776 tda18250_config.if_dvbt_7 = 4450; 3777 tda18250_config.if_dvbt_8 = 4950; 3778 tda18250_config.if_dvbc_6 = 4950; 3779 tda18250_config.if_dvbc_8 = 4950; 3780 tda18250_config.if_atsc = 4079; 3781 tda18250_config.loopthrough = true; 3782 tda18250_config.xtal_freq = TDA18250_XTAL_FREQ_27MHZ; 3783 tda18250_config.fe = adap->fe_adap[0].fe; 3784 3785 memset(&info, 0, sizeof(struct i2c_board_info)); 3786 strscpy(info.type, "tda18250", I2C_NAME_SIZE); 3787 info.addr = 0x60; 3788 info.platform_data = &tda18250_config; 3789 3790 request_module(info.type); 3791 client_tuner = i2c_new_client_device(&adap->dev->i2c_adap, &info); 3792 if (!i2c_client_has_driver(client_tuner)) 3793 goto fail_tuner_device; 3794 if (!try_module_get(client_tuner->dev.driver->owner)) 3795 goto fail_tuner_module; 3796 3797 st->i2c_client_tuner = client_tuner; 3798 return 0; 3799 3800fail_tuner_module: 3801 i2c_unregister_device(client_tuner); 3802fail_tuner_device: 3803 module_put(client_demod->dev.driver->owner); 3804fail_demod_module: 3805 i2c_unregister_device(client_demod); 3806fail_demod_device: 3807 return -ENODEV; 3808} 3809 3810 3811/* DVB-USB and USB stuff follows */ 3812enum { 3813 DIBCOM_STK7700P, 3814 DIBCOM_STK7700P_PC, 3815 HAUPPAUGE_NOVA_T_500, 3816 HAUPPAUGE_NOVA_T_500_2, 3817 HAUPPAUGE_NOVA_T_STICK, 3818 AVERMEDIA_VOLAR, 3819 COMPRO_VIDEOMATE_U500, 3820 UNIWILL_STK7700P, 3821 LEADTEK_WINFAST_DTV_DONGLE_STK7700P, 3822 HAUPPAUGE_NOVA_T_STICK_2, 3823 AVERMEDIA_VOLAR_2, 3824 PINNACLE_PCTV2000E, 3825 TERRATEC_CINERGY_DT_XS_DIVERSITY, 3826 HAUPPAUGE_NOVA_TD_STICK, 3827 DIBCOM_STK7700D, 3828 DIBCOM_STK7070P, 3829 PINNACLE_PCTV_DVB_T_FLASH, 3830 DIBCOM_STK7070PD, 3831 PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T, 3832 COMPRO_VIDEOMATE_U500_PC, 3833 AVERMEDIA_EXPRESS, 3834 GIGABYTE_U7000, 3835 ULTIMA_ARTEC_T14BR, 3836 ASUS_U3000, 3837 ASUS_U3100, 3838 HAUPPAUGE_NOVA_T_STICK_3, 3839 HAUPPAUGE_MYTV_T, 3840 TERRATEC_CINERGY_HT_USB_XE, 3841 PINNACLE_EXPRESSCARD_320CX, 3842 PINNACLE_PCTV72E, 3843 PINNACLE_PCTV73E, 3844 YUAN_EC372S, 3845 TERRATEC_CINERGY_HT_EXPRESS, 3846 TERRATEC_CINERGY_T_XXS, 3847 LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2, 3848 HAUPPAUGE_NOVA_TD_STICK_52009, 3849 HAUPPAUGE_NOVA_T_500_3, 3850 GIGABYTE_U8000, 3851 YUAN_STK7700PH, 3852 ASUS_U3000H, 3853 PINNACLE_PCTV801E, 3854 PINNACLE_PCTV801E_SE, 3855 TERRATEC_CINERGY_T_EXPRESS, 3856 TERRATEC_CINERGY_DT_XS_DIVERSITY_2, 3857 SONY_PLAYTV, 3858 YUAN_PD378S, 3859 HAUPPAUGE_TIGER_ATSC, 3860 HAUPPAUGE_TIGER_ATSC_B210, 3861 YUAN_MC770, 3862 ELGATO_EYETV_DTT, 3863 ELGATO_EYETV_DTT_Dlx, 3864 LEADTEK_WINFAST_DTV_DONGLE_H, 3865 TERRATEC_T3, 3866 TERRATEC_T5, 3867 YUAN_STK7700D, 3868 YUAN_STK7700D_2, 3869 PINNACLE_PCTV73A, 3870 PCTV_PINNACLE_PCTV73ESE, 3871 PCTV_PINNACLE_PCTV282E, 3872 DIBCOM_STK7770P, 3873 TERRATEC_CINERGY_T_XXS_2, 3874 DIBCOM_STK807XPVR, 3875 DIBCOM_STK807XP, 3876 PIXELVIEW_SBTVD, 3877 EVOLUTEPC_TVWAY_PLUS, 3878 PINNACLE_PCTV73ESE, 3879 PINNACLE_PCTV282E, 3880 DIBCOM_STK8096GP, 3881 ELGATO_EYETV_DIVERSITY, 3882 DIBCOM_NIM9090M, 3883 DIBCOM_NIM8096MD, 3884 DIBCOM_NIM9090MD, 3885 DIBCOM_NIM7090, 3886 DIBCOM_TFE7090PVR, 3887 TECHNISAT_AIRSTAR_TELESTICK_2, 3888 MEDION_CREATIX_CTX1921, 3889 PINNACLE_PCTV340E, 3890 PINNACLE_PCTV340E_SE, 3891 DIBCOM_TFE7790P, 3892 DIBCOM_TFE8096P, 3893 ELGATO_EYETV_DTT_2, 3894 PCTV_2002E, 3895 PCTV_2002E_SE, 3896 PCTV_DIBCOM_STK8096PVR, 3897 DIBCOM_STK8096PVR, 3898 HAMA_DVBT_HYBRID, 3899 MICROSOFT_XBOX_ONE_TUNER, 3900}; 3901 3902struct usb_device_id dib0700_usb_id_table[] = { 3903 DVB_USB_DEV(DIBCOM, DIBCOM_STK7700P), 3904 DVB_USB_DEV(DIBCOM, DIBCOM_STK7700P_PC), 3905 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500), 3906 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500_2), 3907 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK), 3908 DVB_USB_DEV(AVERMEDIA, AVERMEDIA_VOLAR), 3909 DVB_USB_DEV(COMPRO, COMPRO_VIDEOMATE_U500), 3910 DVB_USB_DEV(UNIWILL, UNIWILL_STK7700P), 3911 DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_STK7700P), 3912 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK_2), 3913 DVB_USB_DEV(AVERMEDIA, AVERMEDIA_VOLAR_2), 3914 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV2000E), 3915 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_DT_XS_DIVERSITY), 3916 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_TD_STICK), 3917 DVB_USB_DEV(DIBCOM, DIBCOM_STK7700D), 3918 DVB_USB_DEV(DIBCOM, DIBCOM_STK7070P), 3919 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV_DVB_T_FLASH), 3920 DVB_USB_DEV(DIBCOM, DIBCOM_STK7070PD), 3921 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T), 3922 DVB_USB_DEV(COMPRO, COMPRO_VIDEOMATE_U500_PC), 3923 DVB_USB_DEV(AVERMEDIA, AVERMEDIA_EXPRESS), 3924 DVB_USB_DEV(GIGABYTE, GIGABYTE_U7000), 3925 DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_ARTEC_T14BR), 3926 DVB_USB_DEV(ASUS, ASUS_U3000), 3927 DVB_USB_DEV(ASUS, ASUS_U3100), 3928 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK_3), 3929 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_MYTV_T), 3930 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_HT_USB_XE), 3931 DVB_USB_DEV(PINNACLE, PINNACLE_EXPRESSCARD_320CX), 3932 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV72E), 3933 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73E), 3934 DVB_USB_DEV(YUAN, YUAN_EC372S), 3935 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_HT_EXPRESS), 3936 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_XXS), 3937 DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2), 3938 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_TD_STICK_52009), 3939 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500_3), 3940 DVB_USB_DEV(GIGABYTE, GIGABYTE_U8000), 3941 DVB_USB_DEV(YUAN, YUAN_STK7700PH), 3942 DVB_USB_DEV(ASUS, ASUS_U3000H), 3943 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV801E), 3944 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV801E_SE), 3945 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_EXPRESS), 3946 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_DT_XS_DIVERSITY_2), 3947 DVB_USB_DEV(SONY, SONY_PLAYTV), 3948 DVB_USB_DEV(YUAN, YUAN_PD378S), 3949 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_TIGER_ATSC), 3950 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_TIGER_ATSC_B210), 3951 DVB_USB_DEV(YUAN, YUAN_MC770), 3952 DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT), 3953 DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT_Dlx), 3954 DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_H), 3955 DVB_USB_DEV(TERRATEC, TERRATEC_T3), 3956 DVB_USB_DEV(TERRATEC, TERRATEC_T5), 3957 DVB_USB_DEV(YUAN, YUAN_STK7700D), 3958 DVB_USB_DEV(YUAN, YUAN_STK7700D_2), 3959 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73A), 3960 DVB_USB_DEV(PCTV, PCTV_PINNACLE_PCTV73ESE), 3961 DVB_USB_DEV(PCTV, PCTV_PINNACLE_PCTV282E), 3962 DVB_USB_DEV(DIBCOM, DIBCOM_STK7770P), 3963 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_XXS_2), 3964 DVB_USB_DEV(DIBCOM, DIBCOM_STK807XPVR), 3965 DVB_USB_DEV(DIBCOM, DIBCOM_STK807XP), 3966 DVB_USB_DEV_VER(PIXELVIEW, PIXELVIEW_SBTVD, 0x000, 0x3f00), 3967 DVB_USB_DEV(EVOLUTEPC, EVOLUTEPC_TVWAY_PLUS), 3968 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73ESE), 3969 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV282E), 3970 DVB_USB_DEV(DIBCOM, DIBCOM_STK8096GP), 3971 DVB_USB_DEV(ELGATO, ELGATO_EYETV_DIVERSITY), 3972 DVB_USB_DEV(DIBCOM, DIBCOM_NIM9090M), 3973 DVB_USB_DEV(DIBCOM, DIBCOM_NIM8096MD), 3974 DVB_USB_DEV(DIBCOM, DIBCOM_NIM9090MD), 3975 DVB_USB_DEV(DIBCOM, DIBCOM_NIM7090), 3976 DVB_USB_DEV(DIBCOM, DIBCOM_TFE7090PVR), 3977 DVB_USB_DEV(TECHNISAT, TECHNISAT_AIRSTAR_TELESTICK_2), 3978 DVB_USB_DEV(MEDION, MEDION_CREATIX_CTX1921), 3979 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV340E), 3980 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV340E_SE), 3981 DVB_USB_DEV(DIBCOM, DIBCOM_TFE7790P), 3982 DVB_USB_DEV(DIBCOM, DIBCOM_TFE8096P), 3983 DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT_2), 3984 DVB_USB_DEV(PCTV, PCTV_2002E), 3985 DVB_USB_DEV(PCTV, PCTV_2002E_SE), 3986 DVB_USB_DEV(PCTV, PCTV_DIBCOM_STK8096PVR), 3987 DVB_USB_DEV(DIBCOM, DIBCOM_STK8096PVR), 3988 DVB_USB_DEV(HAMA, HAMA_DVBT_HYBRID), 3989 DVB_USB_DEV(MICROSOFT, MICROSOFT_XBOX_ONE_TUNER), 3990 { } 3991}; 3992 3993MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table); 3994 3995#define DIB0700_DEFAULT_DEVICE_PROPERTIES \ 3996 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \ 3997 .usb_ctrl = DEVICE_SPECIFIC, \ 3998 .firmware = "dvb-usb-dib0700-1.20.fw", \ 3999 .download_firmware = dib0700_download_firmware, \ 4000 .no_reconnect = 1, \ 4001 .size_of_priv = sizeof(struct dib0700_state), \ 4002 .i2c_algo = &dib0700_i2c_algo, \ 4003 .identify_state = dib0700_identify_state 4004 4005#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \ 4006 .streaming_ctrl = dib0700_streaming_ctrl, \ 4007 .stream = { \ 4008 .type = USB_BULK, \ 4009 .count = 4, \ 4010 .endpoint = ep, \ 4011 .u = { \ 4012 .bulk = { \ 4013 .buffersize = 39480, \ 4014 } \ 4015 } \ 4016 } 4017 4018#define DIB0700_NUM_FRONTENDS(n) \ 4019 .num_frontends = n, \ 4020 .size_of_priv = sizeof(struct dib0700_adapter_state) 4021 4022struct dvb_usb_device_properties dib0700_devices[] = { 4023 { 4024 DIB0700_DEFAULT_DEVICE_PROPERTIES, 4025 4026 .num_adapters = 1, 4027 .adapter = { 4028 { 4029 DIB0700_NUM_FRONTENDS(1), 4030 .fe = {{ 4031 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4032 .pid_filter_count = 32, 4033 .pid_filter = stk7700p_pid_filter, 4034 .pid_filter_ctrl = stk7700p_pid_filter_ctrl, 4035 .frontend_attach = stk7700p_frontend_attach, 4036 .tuner_attach = stk7700p_tuner_attach, 4037 4038 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4039 }}, 4040 }, 4041 }, 4042 4043 .num_device_descs = 8, 4044 .devices = { 4045 { "DiBcom STK7700P reference design", 4046 { &dib0700_usb_id_table[DIBCOM_STK7700P], &dib0700_usb_id_table[DIBCOM_STK7700P_PC] }, 4047 { NULL }, 4048 }, 4049 { "Hauppauge Nova-T Stick", 4050 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK], &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK_2], NULL }, 4051 { NULL }, 4052 }, 4053 { "AVerMedia AVerTV DVB-T Volar", 4054 { &dib0700_usb_id_table[AVERMEDIA_VOLAR], &dib0700_usb_id_table[AVERMEDIA_VOLAR_2] }, 4055 { NULL }, 4056 }, 4057 { "Compro Videomate U500", 4058 { &dib0700_usb_id_table[COMPRO_VIDEOMATE_U500], &dib0700_usb_id_table[COMPRO_VIDEOMATE_U500_PC] }, 4059 { NULL }, 4060 }, 4061 { "Uniwill STK7700P based (Hama and others)", 4062 { &dib0700_usb_id_table[UNIWILL_STK7700P], NULL }, 4063 { NULL }, 4064 }, 4065 { "Leadtek Winfast DTV Dongle (STK7700P based)", 4066 { &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_STK7700P], &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2] }, 4067 { NULL }, 4068 }, 4069 { "AVerMedia AVerTV DVB-T Express", 4070 { &dib0700_usb_id_table[AVERMEDIA_EXPRESS] }, 4071 { NULL }, 4072 }, 4073 { "Gigabyte U7000", 4074 { &dib0700_usb_id_table[GIGABYTE_U7000], NULL }, 4075 { NULL }, 4076 } 4077 }, 4078 4079 .rc.core = { 4080 .rc_interval = DEFAULT_RC_INTERVAL, 4081 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4082 .rc_query = dib0700_rc_query_old_firmware, 4083 .allowed_protos = RC_PROTO_BIT_RC5 | 4084 RC_PROTO_BIT_RC6_MCE | 4085 RC_PROTO_BIT_NEC, 4086 .change_protocol = dib0700_change_protocol, 4087 }, 4088 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4089 4090 .num_adapters = 2, 4091 .adapter = { 4092 { 4093 DIB0700_NUM_FRONTENDS(1), 4094 .fe = {{ 4095 .frontend_attach = bristol_frontend_attach, 4096 .tuner_attach = bristol_tuner_attach, 4097 4098 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4099 }}, 4100 }, { 4101 DIB0700_NUM_FRONTENDS(1), 4102 .fe = {{ 4103 .frontend_attach = bristol_frontend_attach, 4104 .tuner_attach = bristol_tuner_attach, 4105 4106 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4107 }}, 4108 } 4109 }, 4110 4111 .num_device_descs = 1, 4112 .devices = { 4113 { "Hauppauge Nova-T 500 Dual DVB-T", 4114 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500], &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500_2], NULL }, 4115 { NULL }, 4116 }, 4117 }, 4118 4119 .rc.core = { 4120 .rc_interval = DEFAULT_RC_INTERVAL, 4121 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4122 .rc_query = dib0700_rc_query_old_firmware, 4123 .allowed_protos = RC_PROTO_BIT_RC5 | 4124 RC_PROTO_BIT_RC6_MCE | 4125 RC_PROTO_BIT_NEC, 4126 .change_protocol = dib0700_change_protocol, 4127 }, 4128 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4129 4130 .num_adapters = 2, 4131 .adapter = { 4132 { 4133 DIB0700_NUM_FRONTENDS(1), 4134 .fe = {{ 4135 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4136 .pid_filter_count = 32, 4137 .pid_filter = stk70x0p_pid_filter, 4138 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4139 .frontend_attach = stk7700d_frontend_attach, 4140 .tuner_attach = stk7700d_tuner_attach, 4141 4142 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4143 }}, 4144 }, { 4145 DIB0700_NUM_FRONTENDS(1), 4146 .fe = {{ 4147 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4148 .pid_filter_count = 32, 4149 .pid_filter = stk70x0p_pid_filter, 4150 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4151 .frontend_attach = stk7700d_frontend_attach, 4152 .tuner_attach = stk7700d_tuner_attach, 4153 4154 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4155 }}, 4156 } 4157 }, 4158 4159 .num_device_descs = 5, 4160 .devices = { 4161 { "Pinnacle PCTV 2000e", 4162 { &dib0700_usb_id_table[PINNACLE_PCTV2000E], NULL }, 4163 { NULL }, 4164 }, 4165 { "Terratec Cinergy DT XS Diversity", 4166 { &dib0700_usb_id_table[TERRATEC_CINERGY_DT_XS_DIVERSITY], NULL }, 4167 { NULL }, 4168 }, 4169 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity", 4170 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_TD_STICK], NULL }, 4171 { NULL }, 4172 }, 4173 { "DiBcom STK7700D reference design", 4174 { &dib0700_usb_id_table[DIBCOM_STK7700D], NULL }, 4175 { NULL }, 4176 }, 4177 { "YUAN High-Tech DiBcom STK7700D", 4178 { &dib0700_usb_id_table[YUAN_STK7700D_2], NULL }, 4179 { NULL }, 4180 }, 4181 4182 }, 4183 4184 .rc.core = { 4185 .rc_interval = DEFAULT_RC_INTERVAL, 4186 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4187 .rc_query = dib0700_rc_query_old_firmware, 4188 .allowed_protos = RC_PROTO_BIT_RC5 | 4189 RC_PROTO_BIT_RC6_MCE | 4190 RC_PROTO_BIT_NEC, 4191 .change_protocol = dib0700_change_protocol, 4192 }, 4193 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4194 4195 .num_adapters = 1, 4196 .adapter = { 4197 { 4198 DIB0700_NUM_FRONTENDS(1), 4199 .fe = {{ 4200 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4201 .pid_filter_count = 32, 4202 .pid_filter = stk70x0p_pid_filter, 4203 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4204 .frontend_attach = stk7700P2_frontend_attach, 4205 .tuner_attach = stk7700d_tuner_attach, 4206 4207 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4208 }}, 4209 }, 4210 }, 4211 4212 .num_device_descs = 3, 4213 .devices = { 4214 { "ASUS My Cinema U3000 Mini DVBT Tuner", 4215 { &dib0700_usb_id_table[ASUS_U3000], NULL }, 4216 { NULL }, 4217 }, 4218 { "Yuan EC372S", 4219 { &dib0700_usb_id_table[YUAN_EC372S], NULL }, 4220 { NULL }, 4221 }, 4222 { "Terratec Cinergy T Express", 4223 { &dib0700_usb_id_table[TERRATEC_CINERGY_T_EXPRESS], NULL }, 4224 { NULL }, 4225 } 4226 }, 4227 4228 .rc.core = { 4229 .rc_interval = DEFAULT_RC_INTERVAL, 4230 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4231 .module_name = "dib0700", 4232 .rc_query = dib0700_rc_query_old_firmware, 4233 .allowed_protos = RC_PROTO_BIT_RC5 | 4234 RC_PROTO_BIT_RC6_MCE | 4235 RC_PROTO_BIT_NEC, 4236 .change_protocol = dib0700_change_protocol, 4237 }, 4238 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4239 4240 .num_adapters = 1, 4241 .adapter = { 4242 { 4243 DIB0700_NUM_FRONTENDS(1), 4244 .fe = {{ 4245 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4246 .pid_filter_count = 32, 4247 .pid_filter = stk70x0p_pid_filter, 4248 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4249 .frontend_attach = stk7070p_frontend_attach, 4250 .tuner_attach = dib7070p_tuner_attach, 4251 4252 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4253 }}, 4254 }, 4255 }, 4256 4257 .num_device_descs = 12, 4258 .devices = { 4259 { "DiBcom STK7070P reference design", 4260 { &dib0700_usb_id_table[DIBCOM_STK7070P], NULL }, 4261 { NULL }, 4262 }, 4263 { "Pinnacle PCTV DVB-T Flash Stick", 4264 { &dib0700_usb_id_table[PINNACLE_PCTV_DVB_T_FLASH], NULL }, 4265 { NULL }, 4266 }, 4267 { "Artec T14BR DVB-T", 4268 { &dib0700_usb_id_table[ULTIMA_ARTEC_T14BR], NULL }, 4269 { NULL }, 4270 }, 4271 { "ASUS My Cinema U3100 Mini DVBT Tuner", 4272 { &dib0700_usb_id_table[ASUS_U3100], NULL }, 4273 { NULL }, 4274 }, 4275 { "Hauppauge Nova-T Stick", 4276 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK_3], NULL }, 4277 { NULL }, 4278 }, 4279 { "Hauppauge Nova-T MyTV.t", 4280 { &dib0700_usb_id_table[HAUPPAUGE_MYTV_T], NULL }, 4281 { NULL }, 4282 }, 4283 { "Pinnacle PCTV 72e", 4284 { &dib0700_usb_id_table[PINNACLE_PCTV72E], NULL }, 4285 { NULL }, 4286 }, 4287 { "Pinnacle PCTV 73e", 4288 { &dib0700_usb_id_table[PINNACLE_PCTV73E], NULL }, 4289 { NULL }, 4290 }, 4291 { "Elgato EyeTV DTT", 4292 { &dib0700_usb_id_table[ELGATO_EYETV_DTT], NULL }, 4293 { NULL }, 4294 }, 4295 { "Yuan PD378S", 4296 { &dib0700_usb_id_table[YUAN_PD378S], NULL }, 4297 { NULL }, 4298 }, 4299 { "Elgato EyeTV Dtt Dlx PD378S", 4300 { &dib0700_usb_id_table[ELGATO_EYETV_DTT_Dlx], NULL }, 4301 { NULL }, 4302 }, 4303 { "Elgato EyeTV DTT rev. 2", 4304 { &dib0700_usb_id_table[ELGATO_EYETV_DTT_2], NULL }, 4305 { NULL }, 4306 }, 4307 }, 4308 4309 .rc.core = { 4310 .rc_interval = DEFAULT_RC_INTERVAL, 4311 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4312 .module_name = "dib0700", 4313 .rc_query = dib0700_rc_query_old_firmware, 4314 .allowed_protos = RC_PROTO_BIT_RC5 | 4315 RC_PROTO_BIT_RC6_MCE | 4316 RC_PROTO_BIT_NEC, 4317 .change_protocol = dib0700_change_protocol, 4318 }, 4319 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4320 4321 .num_adapters = 1, 4322 .adapter = { 4323 { 4324 DIB0700_NUM_FRONTENDS(1), 4325 .fe = {{ 4326 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4327 .pid_filter_count = 32, 4328 .pid_filter = stk70x0p_pid_filter, 4329 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4330 .frontend_attach = stk7070p_frontend_attach, 4331 .tuner_attach = dib7070p_tuner_attach, 4332 4333 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4334 }}, 4335 }, 4336 }, 4337 4338 .num_device_descs = 3, 4339 .devices = { 4340 { "Pinnacle PCTV 73A", 4341 { &dib0700_usb_id_table[PINNACLE_PCTV73A], NULL }, 4342 { NULL }, 4343 }, 4344 { "Pinnacle PCTV 73e SE", 4345 { &dib0700_usb_id_table[PCTV_PINNACLE_PCTV73ESE], &dib0700_usb_id_table[PINNACLE_PCTV73ESE], NULL }, 4346 { NULL }, 4347 }, 4348 { "Pinnacle PCTV 282e", 4349 { &dib0700_usb_id_table[PCTV_PINNACLE_PCTV282E], &dib0700_usb_id_table[PINNACLE_PCTV282E], NULL }, 4350 { NULL }, 4351 }, 4352 }, 4353 4354 .rc.core = { 4355 .rc_interval = DEFAULT_RC_INTERVAL, 4356 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4357 .module_name = "dib0700", 4358 .rc_query = dib0700_rc_query_old_firmware, 4359 .allowed_protos = RC_PROTO_BIT_RC5 | 4360 RC_PROTO_BIT_RC6_MCE | 4361 RC_PROTO_BIT_NEC, 4362 .change_protocol = dib0700_change_protocol, 4363 }, 4364 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4365 4366 .num_adapters = 2, 4367 .adapter = { 4368 { 4369 DIB0700_NUM_FRONTENDS(1), 4370 .fe = {{ 4371 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4372 .pid_filter_count = 32, 4373 .pid_filter = stk70x0p_pid_filter, 4374 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4375 .frontend_attach = novatd_frontend_attach, 4376 .tuner_attach = dib7070p_tuner_attach, 4377 4378 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4379 }}, 4380 }, { 4381 DIB0700_NUM_FRONTENDS(1), 4382 .fe = {{ 4383 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4384 .pid_filter_count = 32, 4385 .pid_filter = stk70x0p_pid_filter, 4386 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4387 .frontend_attach = novatd_frontend_attach, 4388 .tuner_attach = dib7070p_tuner_attach, 4389 4390 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4391 }}, 4392 } 4393 }, 4394 4395 .num_device_descs = 3, 4396 .devices = { 4397 { "Hauppauge Nova-TD Stick (52009)", 4398 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_TD_STICK_52009], NULL }, 4399 { NULL }, 4400 }, 4401 { "PCTV 2002e", 4402 { &dib0700_usb_id_table[PCTV_2002E], NULL }, 4403 { NULL }, 4404 }, 4405 { "PCTV 2002e SE", 4406 { &dib0700_usb_id_table[PCTV_2002E_SE], NULL }, 4407 { NULL }, 4408 }, 4409 }, 4410 4411 .rc.core = { 4412 .rc_interval = DEFAULT_RC_INTERVAL, 4413 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4414 .module_name = "dib0700", 4415 .rc_query = dib0700_rc_query_old_firmware, 4416 .allowed_protos = RC_PROTO_BIT_RC5 | 4417 RC_PROTO_BIT_RC6_MCE | 4418 RC_PROTO_BIT_NEC, 4419 .change_protocol = dib0700_change_protocol, 4420 }, 4421 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4422 4423 .num_adapters = 2, 4424 .adapter = { 4425 { 4426 DIB0700_NUM_FRONTENDS(1), 4427 .fe = {{ 4428 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4429 .pid_filter_count = 32, 4430 .pid_filter = stk70x0p_pid_filter, 4431 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4432 .frontend_attach = stk7070pd_frontend_attach0, 4433 .tuner_attach = dib7070p_tuner_attach, 4434 4435 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4436 }}, 4437 }, { 4438 DIB0700_NUM_FRONTENDS(1), 4439 .fe = {{ 4440 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4441 .pid_filter_count = 32, 4442 .pid_filter = stk70x0p_pid_filter, 4443 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4444 .frontend_attach = stk7070pd_frontend_attach1, 4445 .tuner_attach = dib7070p_tuner_attach, 4446 4447 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4448 }}, 4449 } 4450 }, 4451 4452 .num_device_descs = 5, 4453 .devices = { 4454 { "DiBcom STK7070PD reference design", 4455 { &dib0700_usb_id_table[DIBCOM_STK7070PD], NULL }, 4456 { NULL }, 4457 }, 4458 { "Pinnacle PCTV Dual DVB-T Diversity Stick", 4459 { &dib0700_usb_id_table[PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T], NULL }, 4460 { NULL }, 4461 }, 4462 { "Hauppauge Nova-TD-500 (84xxx)", 4463 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500_3], NULL }, 4464 { NULL }, 4465 }, 4466 { "Terratec Cinergy DT USB XS Diversity/ T5", 4467 { &dib0700_usb_id_table[TERRATEC_CINERGY_DT_XS_DIVERSITY_2], 4468 &dib0700_usb_id_table[TERRATEC_T5], NULL}, 4469 { NULL }, 4470 }, 4471 { "Sony PlayTV", 4472 { &dib0700_usb_id_table[SONY_PLAYTV], NULL }, 4473 { NULL }, 4474 }, 4475 }, 4476 4477 .rc.core = { 4478 .rc_interval = DEFAULT_RC_INTERVAL, 4479 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4480 .module_name = "dib0700", 4481 .rc_query = dib0700_rc_query_old_firmware, 4482 .allowed_protos = RC_PROTO_BIT_RC5 | 4483 RC_PROTO_BIT_RC6_MCE | 4484 RC_PROTO_BIT_NEC, 4485 .change_protocol = dib0700_change_protocol, 4486 }, 4487 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4488 4489 .num_adapters = 2, 4490 .adapter = { 4491 { 4492 DIB0700_NUM_FRONTENDS(1), 4493 .fe = {{ 4494 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4495 .pid_filter_count = 32, 4496 .pid_filter = stk70x0p_pid_filter, 4497 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4498 .frontend_attach = stk7070pd_frontend_attach0, 4499 .tuner_attach = dib7070p_tuner_attach, 4500 4501 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4502 }}, 4503 }, { 4504 DIB0700_NUM_FRONTENDS(1), 4505 .fe = {{ 4506 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4507 .pid_filter_count = 32, 4508 .pid_filter = stk70x0p_pid_filter, 4509 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4510 .frontend_attach = stk7070pd_frontend_attach1, 4511 .tuner_attach = dib7070p_tuner_attach, 4512 4513 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4514 }}, 4515 } 4516 }, 4517 4518 .num_device_descs = 1, 4519 .devices = { 4520 { "Elgato EyeTV Diversity", 4521 { &dib0700_usb_id_table[ELGATO_EYETV_DIVERSITY], NULL }, 4522 { NULL }, 4523 }, 4524 }, 4525 4526 .rc.core = { 4527 .rc_interval = DEFAULT_RC_INTERVAL, 4528 .rc_codes = RC_MAP_DIB0700_NEC_TABLE, 4529 .module_name = "dib0700", 4530 .rc_query = dib0700_rc_query_old_firmware, 4531 .allowed_protos = RC_PROTO_BIT_RC5 | 4532 RC_PROTO_BIT_RC6_MCE | 4533 RC_PROTO_BIT_NEC, 4534 .change_protocol = dib0700_change_protocol, 4535 }, 4536 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4537 4538 .num_adapters = 1, 4539 .adapter = { 4540 { 4541 DIB0700_NUM_FRONTENDS(1), 4542 .fe = {{ 4543 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4544 .pid_filter_count = 32, 4545 .pid_filter = stk70x0p_pid_filter, 4546 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4547 .frontend_attach = stk7700ph_frontend_attach, 4548 .tuner_attach = stk7700ph_tuner_attach, 4549 4550 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4551 }}, 4552 }, 4553 }, 4554 4555 .num_device_descs = 10, 4556 .devices = { 4557 { "Terratec Cinergy HT USB XE", 4558 { &dib0700_usb_id_table[TERRATEC_CINERGY_HT_USB_XE], NULL }, 4559 { NULL }, 4560 }, 4561 { "Pinnacle Expresscard 320cx", 4562 { &dib0700_usb_id_table[PINNACLE_EXPRESSCARD_320CX], NULL }, 4563 { NULL }, 4564 }, 4565 { "Terratec Cinergy HT Express", 4566 { &dib0700_usb_id_table[TERRATEC_CINERGY_HT_EXPRESS], NULL }, 4567 { NULL }, 4568 }, 4569 { "Gigabyte U8000-RH", 4570 { &dib0700_usb_id_table[GIGABYTE_U8000], NULL }, 4571 { NULL }, 4572 }, 4573 { "YUAN High-Tech STK7700PH", 4574 { &dib0700_usb_id_table[YUAN_STK7700PH], NULL }, 4575 { NULL }, 4576 }, 4577 { "Asus My Cinema-U3000Hybrid", 4578 { &dib0700_usb_id_table[ASUS_U3000H], NULL }, 4579 { NULL }, 4580 }, 4581 { "YUAN High-Tech MC770", 4582 { &dib0700_usb_id_table[YUAN_MC770], NULL }, 4583 { NULL }, 4584 }, 4585 { "Leadtek WinFast DTV Dongle H", 4586 { &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_H], NULL }, 4587 { NULL }, 4588 }, 4589 { "YUAN High-Tech STK7700D", 4590 { &dib0700_usb_id_table[YUAN_STK7700D], NULL }, 4591 { NULL }, 4592 }, 4593 { "Hama DVB=T Hybrid USB Stick", 4594 { &dib0700_usb_id_table[HAMA_DVBT_HYBRID], NULL }, 4595 { NULL }, 4596 }, 4597 }, 4598 4599 .rc.core = { 4600 .rc_interval = DEFAULT_RC_INTERVAL, 4601 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4602 .module_name = "dib0700", 4603 .rc_query = dib0700_rc_query_old_firmware, 4604 .allowed_protos = RC_PROTO_BIT_RC5 | 4605 RC_PROTO_BIT_RC6_MCE | 4606 RC_PROTO_BIT_NEC, 4607 .change_protocol = dib0700_change_protocol, 4608 }, 4609 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4610 .num_adapters = 1, 4611 .adapter = { 4612 { 4613 DIB0700_NUM_FRONTENDS(1), 4614 .fe = {{ 4615 .frontend_attach = s5h1411_frontend_attach, 4616 .tuner_attach = xc5000_tuner_attach, 4617 4618 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4619 }}, 4620 }, 4621 }, 4622 4623 .num_device_descs = 2, 4624 .devices = { 4625 { "Pinnacle PCTV HD Pro USB Stick", 4626 { &dib0700_usb_id_table[PINNACLE_PCTV801E], NULL }, 4627 { NULL }, 4628 }, 4629 { "Pinnacle PCTV HD USB Stick", 4630 { &dib0700_usb_id_table[PINNACLE_PCTV801E_SE], NULL }, 4631 { NULL }, 4632 }, 4633 }, 4634 4635 .rc.core = { 4636 .rc_interval = DEFAULT_RC_INTERVAL, 4637 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4638 .module_name = "dib0700", 4639 .rc_query = dib0700_rc_query_old_firmware, 4640 .allowed_protos = RC_PROTO_BIT_RC5 | 4641 RC_PROTO_BIT_RC6_MCE | 4642 RC_PROTO_BIT_NEC, 4643 .change_protocol = dib0700_change_protocol, 4644 }, 4645 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4646 .num_adapters = 1, 4647 .adapter = { 4648 { 4649 DIB0700_NUM_FRONTENDS(1), 4650 .fe = {{ 4651 .frontend_attach = lgdt3305_frontend_attach, 4652 .tuner_attach = mxl5007t_tuner_attach, 4653 4654 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4655 }}, 4656 }, 4657 }, 4658 4659 .num_device_descs = 2, 4660 .devices = { 4661 { "Hauppauge ATSC MiniCard (B200)", 4662 { &dib0700_usb_id_table[HAUPPAUGE_TIGER_ATSC], NULL }, 4663 { NULL }, 4664 }, 4665 { "Hauppauge ATSC MiniCard (B210)", 4666 { &dib0700_usb_id_table[HAUPPAUGE_TIGER_ATSC_B210], NULL }, 4667 { NULL }, 4668 }, 4669 }, 4670 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4671 4672 .num_adapters = 1, 4673 .adapter = { 4674 { 4675 DIB0700_NUM_FRONTENDS(1), 4676 .fe = {{ 4677 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4678 .pid_filter_count = 32, 4679 .pid_filter = stk70x0p_pid_filter, 4680 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4681 .frontend_attach = stk7770p_frontend_attach, 4682 .tuner_attach = dib7770p_tuner_attach, 4683 4684 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4685 }}, 4686 }, 4687 }, 4688 4689 .num_device_descs = 4, 4690 .devices = { 4691 { "DiBcom STK7770P reference design", 4692 { &dib0700_usb_id_table[DIBCOM_STK7770P], NULL }, 4693 { NULL }, 4694 }, 4695 { "Terratec Cinergy T USB XXS (HD)/ T3", 4696 { &dib0700_usb_id_table[TERRATEC_CINERGY_T_XXS], 4697 &dib0700_usb_id_table[TERRATEC_T3], 4698 &dib0700_usb_id_table[TERRATEC_CINERGY_T_XXS_2], NULL}, 4699 { NULL }, 4700 }, 4701 { "TechniSat AirStar TeleStick 2", 4702 { &dib0700_usb_id_table[TECHNISAT_AIRSTAR_TELESTICK_2], NULL }, 4703 { NULL }, 4704 }, 4705 { "Medion CTX1921 DVB-T USB", 4706 { &dib0700_usb_id_table[MEDION_CREATIX_CTX1921], NULL }, 4707 { NULL }, 4708 }, 4709 }, 4710 4711 .rc.core = { 4712 .rc_interval = DEFAULT_RC_INTERVAL, 4713 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4714 .module_name = "dib0700", 4715 .rc_query = dib0700_rc_query_old_firmware, 4716 .allowed_protos = RC_PROTO_BIT_RC5 | 4717 RC_PROTO_BIT_RC6_MCE | 4718 RC_PROTO_BIT_NEC, 4719 .change_protocol = dib0700_change_protocol, 4720 }, 4721 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4722 .num_adapters = 1, 4723 .adapter = { 4724 { 4725 DIB0700_NUM_FRONTENDS(1), 4726 .fe = {{ 4727 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4728 .pid_filter_count = 32, 4729 .pid_filter = stk80xx_pid_filter, 4730 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4731 .frontend_attach = stk807x_frontend_attach, 4732 .tuner_attach = dib807x_tuner_attach, 4733 4734 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4735 }}, 4736 }, 4737 }, 4738 4739 .num_device_descs = 3, 4740 .devices = { 4741 { "DiBcom STK807xP reference design", 4742 { &dib0700_usb_id_table[DIBCOM_STK807XP], NULL }, 4743 { NULL }, 4744 }, 4745 { "Prolink Pixelview SBTVD", 4746 { &dib0700_usb_id_table[PIXELVIEW_SBTVD], NULL }, 4747 { NULL }, 4748 }, 4749 { "EvolutePC TVWay+", 4750 { &dib0700_usb_id_table[EVOLUTEPC_TVWAY_PLUS], NULL }, 4751 { NULL }, 4752 }, 4753 }, 4754 4755 .rc.core = { 4756 .rc_interval = DEFAULT_RC_INTERVAL, 4757 .rc_codes = RC_MAP_DIB0700_NEC_TABLE, 4758 .module_name = "dib0700", 4759 .rc_query = dib0700_rc_query_old_firmware, 4760 .allowed_protos = RC_PROTO_BIT_RC5 | 4761 RC_PROTO_BIT_RC6_MCE | 4762 RC_PROTO_BIT_NEC, 4763 .change_protocol = dib0700_change_protocol, 4764 }, 4765 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4766 .num_adapters = 2, 4767 .adapter = { 4768 { 4769 DIB0700_NUM_FRONTENDS(1), 4770 .fe = {{ 4771 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4772 .pid_filter_count = 32, 4773 .pid_filter = stk80xx_pid_filter, 4774 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4775 .frontend_attach = stk807xpvr_frontend_attach0, 4776 .tuner_attach = dib807x_tuner_attach, 4777 4778 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4779 }}, 4780 }, 4781 { 4782 DIB0700_NUM_FRONTENDS(1), 4783 .fe = {{ 4784 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4785 .pid_filter_count = 32, 4786 .pid_filter = stk80xx_pid_filter, 4787 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4788 .frontend_attach = stk807xpvr_frontend_attach1, 4789 .tuner_attach = dib807x_tuner_attach, 4790 4791 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4792 }}, 4793 }, 4794 }, 4795 4796 .num_device_descs = 1, 4797 .devices = { 4798 { "DiBcom STK807xPVR reference design", 4799 { &dib0700_usb_id_table[DIBCOM_STK807XPVR], NULL }, 4800 { NULL }, 4801 }, 4802 }, 4803 4804 .rc.core = { 4805 .rc_interval = DEFAULT_RC_INTERVAL, 4806 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4807 .module_name = "dib0700", 4808 .rc_query = dib0700_rc_query_old_firmware, 4809 .allowed_protos = RC_PROTO_BIT_RC5 | 4810 RC_PROTO_BIT_RC6_MCE | 4811 RC_PROTO_BIT_NEC, 4812 .change_protocol = dib0700_change_protocol, 4813 }, 4814 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4815 .num_adapters = 1, 4816 .adapter = { 4817 { 4818 DIB0700_NUM_FRONTENDS(1), 4819 .fe = {{ 4820 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4821 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4822 .pid_filter_count = 32, 4823 .pid_filter = stk80xx_pid_filter, 4824 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4825 .frontend_attach = stk809x_frontend_attach, 4826 .tuner_attach = dib809x_tuner_attach, 4827 4828 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4829 }}, 4830 }, 4831 }, 4832 4833 .num_device_descs = 1, 4834 .devices = { 4835 { "DiBcom STK8096GP reference design", 4836 { &dib0700_usb_id_table[DIBCOM_STK8096GP], NULL }, 4837 { NULL }, 4838 }, 4839 }, 4840 4841 .rc.core = { 4842 .rc_interval = DEFAULT_RC_INTERVAL, 4843 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4844 .module_name = "dib0700", 4845 .rc_query = dib0700_rc_query_old_firmware, 4846 .allowed_protos = RC_PROTO_BIT_RC5 | 4847 RC_PROTO_BIT_RC6_MCE | 4848 RC_PROTO_BIT_NEC, 4849 .change_protocol = dib0700_change_protocol, 4850 }, 4851 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4852 .num_adapters = 1, 4853 .adapter = { 4854 { 4855 DIB0700_NUM_FRONTENDS(1), 4856 .fe = {{ 4857 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4858 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4859 .pid_filter_count = 32, 4860 .pid_filter = dib90x0_pid_filter, 4861 .pid_filter_ctrl = dib90x0_pid_filter_ctrl, 4862 .frontend_attach = stk9090m_frontend_attach, 4863 .tuner_attach = dib9090_tuner_attach, 4864 4865 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4866 }}, 4867 }, 4868 }, 4869 4870 .num_device_descs = 1, 4871 .devices = { 4872 { "DiBcom STK9090M reference design", 4873 { &dib0700_usb_id_table[DIBCOM_NIM9090M], NULL }, 4874 { NULL }, 4875 }, 4876 }, 4877 4878 .rc.core = { 4879 .rc_interval = DEFAULT_RC_INTERVAL, 4880 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4881 .module_name = "dib0700", 4882 .rc_query = dib0700_rc_query_old_firmware, 4883 .allowed_protos = RC_PROTO_BIT_RC5 | 4884 RC_PROTO_BIT_RC6_MCE | 4885 RC_PROTO_BIT_NEC, 4886 .change_protocol = dib0700_change_protocol, 4887 }, 4888 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4889 .num_adapters = 1, 4890 .adapter = { 4891 { 4892 DIB0700_NUM_FRONTENDS(1), 4893 .fe = {{ 4894 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4895 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4896 .pid_filter_count = 32, 4897 .pid_filter = stk80xx_pid_filter, 4898 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4899 .frontend_attach = nim8096md_frontend_attach, 4900 .tuner_attach = nim8096md_tuner_attach, 4901 4902 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4903 }}, 4904 }, 4905 }, 4906 4907 .num_device_descs = 1, 4908 .devices = { 4909 { "DiBcom NIM8096MD reference design", 4910 { &dib0700_usb_id_table[DIBCOM_NIM8096MD], NULL }, 4911 { NULL }, 4912 }, 4913 }, 4914 4915 .rc.core = { 4916 .rc_interval = DEFAULT_RC_INTERVAL, 4917 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4918 .module_name = "dib0700", 4919 .rc_query = dib0700_rc_query_old_firmware, 4920 .allowed_protos = RC_PROTO_BIT_RC5 | 4921 RC_PROTO_BIT_RC6_MCE | 4922 RC_PROTO_BIT_NEC, 4923 .change_protocol = dib0700_change_protocol, 4924 }, 4925 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4926 .num_adapters = 1, 4927 .adapter = { 4928 { 4929 DIB0700_NUM_FRONTENDS(1), 4930 .fe = {{ 4931 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4932 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4933 .pid_filter_count = 32, 4934 .pid_filter = dib90x0_pid_filter, 4935 .pid_filter_ctrl = dib90x0_pid_filter_ctrl, 4936 .frontend_attach = nim9090md_frontend_attach, 4937 .tuner_attach = nim9090md_tuner_attach, 4938 4939 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4940 }}, 4941 }, 4942 }, 4943 4944 .num_device_descs = 1, 4945 .devices = { 4946 { "DiBcom NIM9090MD reference design", 4947 { &dib0700_usb_id_table[DIBCOM_NIM9090MD], NULL }, 4948 { NULL }, 4949 }, 4950 }, 4951 4952 .rc.core = { 4953 .rc_interval = DEFAULT_RC_INTERVAL, 4954 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4955 .module_name = "dib0700", 4956 .rc_query = dib0700_rc_query_old_firmware, 4957 .allowed_protos = RC_PROTO_BIT_RC5 | 4958 RC_PROTO_BIT_RC6_MCE | 4959 RC_PROTO_BIT_NEC, 4960 .change_protocol = dib0700_change_protocol, 4961 }, 4962 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4963 .num_adapters = 1, 4964 .adapter = { 4965 { 4966 DIB0700_NUM_FRONTENDS(1), 4967 .fe = {{ 4968 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4969 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4970 .pid_filter_count = 32, 4971 .pid_filter = stk70x0p_pid_filter, 4972 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4973 .frontend_attach = nim7090_frontend_attach, 4974 .tuner_attach = nim7090_tuner_attach, 4975 4976 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4977 }}, 4978 }, 4979 }, 4980 4981 .num_device_descs = 1, 4982 .devices = { 4983 { "DiBcom NIM7090 reference design", 4984 { &dib0700_usb_id_table[DIBCOM_NIM7090], NULL }, 4985 { NULL }, 4986 }, 4987 }, 4988 4989 .rc.core = { 4990 .rc_interval = DEFAULT_RC_INTERVAL, 4991 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4992 .module_name = "dib0700", 4993 .rc_query = dib0700_rc_query_old_firmware, 4994 .allowed_protos = RC_PROTO_BIT_RC5 | 4995 RC_PROTO_BIT_RC6_MCE | 4996 RC_PROTO_BIT_NEC, 4997 .change_protocol = dib0700_change_protocol, 4998 }, 4999 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 5000 .num_adapters = 2, 5001 .adapter = { 5002 { 5003 DIB0700_NUM_FRONTENDS(1), 5004 .fe = {{ 5005 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 5006 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 5007 .pid_filter_count = 32, 5008 .pid_filter = stk70x0p_pid_filter, 5009 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 5010 .frontend_attach = tfe7090pvr_frontend0_attach, 5011 .tuner_attach = tfe7090pvr_tuner0_attach, 5012 5013 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 5014 }}, 5015 }, 5016 { 5017 DIB0700_NUM_FRONTENDS(1), 5018 .fe = {{ 5019 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 5020 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 5021 .pid_filter_count = 32, 5022 .pid_filter = stk70x0p_pid_filter, 5023 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 5024 .frontend_attach = tfe7090pvr_frontend1_attach, 5025 .tuner_attach = tfe7090pvr_tuner1_attach, 5026 5027 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 5028 }}, 5029 }, 5030 }, 5031 5032 .num_device_descs = 1, 5033 .devices = { 5034 { "DiBcom TFE7090PVR reference design", 5035 { &dib0700_usb_id_table[DIBCOM_TFE7090PVR], NULL }, 5036 { NULL }, 5037 }, 5038 }, 5039 5040 .rc.core = { 5041 .rc_interval = DEFAULT_RC_INTERVAL, 5042 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 5043 .module_name = "dib0700", 5044 .rc_query = dib0700_rc_query_old_firmware, 5045 .allowed_protos = RC_PROTO_BIT_RC5 | 5046 RC_PROTO_BIT_RC6_MCE | 5047 RC_PROTO_BIT_NEC, 5048 .change_protocol = dib0700_change_protocol, 5049 }, 5050 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 5051 .num_adapters = 1, 5052 .adapter = { 5053 { 5054 DIB0700_NUM_FRONTENDS(1), 5055 .fe = {{ 5056 .frontend_attach = pctv340e_frontend_attach, 5057 .tuner_attach = xc4000_tuner_attach, 5058 5059 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 5060 }}, 5061 }, 5062 }, 5063 5064 .num_device_descs = 2, 5065 .devices = { 5066 { "Pinnacle PCTV 340e HD Pro USB Stick", 5067 { &dib0700_usb_id_table[PINNACLE_PCTV340E], NULL }, 5068 { NULL }, 5069 }, 5070 { "Pinnacle PCTV Hybrid Stick Solo", 5071 { &dib0700_usb_id_table[PINNACLE_PCTV340E_SE], NULL }, 5072 { NULL }, 5073 }, 5074 }, 5075 .rc.core = { 5076 .rc_interval = DEFAULT_RC_INTERVAL, 5077 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 5078 .module_name = "dib0700", 5079 .rc_query = dib0700_rc_query_old_firmware, 5080 .allowed_protos = RC_PROTO_BIT_RC5 | 5081 RC_PROTO_BIT_RC6_MCE | 5082 RC_PROTO_BIT_NEC, 5083 .change_protocol = dib0700_change_protocol, 5084 }, 5085 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 5086 .num_adapters = 1, 5087 .adapter = { 5088 { 5089 DIB0700_NUM_FRONTENDS(1), 5090 .fe = {{ 5091 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 5092 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 5093 .pid_filter_count = 32, 5094 .pid_filter = stk70x0p_pid_filter, 5095 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 5096 .frontend_attach = tfe7790p_frontend_attach, 5097 .tuner_attach = tfe7790p_tuner_attach, 5098 5099 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 5100 } }, 5101 }, 5102 }, 5103 5104 .num_device_descs = 1, 5105 .devices = { 5106 { "DiBcom TFE7790P reference design", 5107 { &dib0700_usb_id_table[DIBCOM_TFE7790P], NULL }, 5108 { NULL }, 5109 }, 5110 }, 5111 5112 .rc.core = { 5113 .rc_interval = DEFAULT_RC_INTERVAL, 5114 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 5115 .module_name = "dib0700", 5116 .rc_query = dib0700_rc_query_old_firmware, 5117 .allowed_protos = RC_PROTO_BIT_RC5 | 5118 RC_PROTO_BIT_RC6_MCE | 5119 RC_PROTO_BIT_NEC, 5120 .change_protocol = dib0700_change_protocol, 5121 }, 5122 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 5123 .num_adapters = 1, 5124 .adapter = { 5125 { 5126 DIB0700_NUM_FRONTENDS(1), 5127 .fe = {{ 5128 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 5129 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 5130 .pid_filter_count = 32, 5131 .pid_filter = stk80xx_pid_filter, 5132 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 5133 .frontend_attach = tfe8096p_frontend_attach, 5134 .tuner_attach = tfe8096p_tuner_attach, 5135 5136 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 5137 5138 } }, 5139 }, 5140 }, 5141 5142 .num_device_descs = 1, 5143 .devices = { 5144 { "DiBcom TFE8096P reference design", 5145 { &dib0700_usb_id_table[DIBCOM_TFE8096P], NULL }, 5146 { NULL }, 5147 }, 5148 }, 5149 5150 .rc.core = { 5151 .rc_interval = DEFAULT_RC_INTERVAL, 5152 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 5153 .module_name = "dib0700", 5154 .rc_query = dib0700_rc_query_old_firmware, 5155 .allowed_protos = RC_PROTO_BIT_RC5 | 5156 RC_PROTO_BIT_RC6_MCE | 5157 RC_PROTO_BIT_NEC, 5158 .change_protocol = dib0700_change_protocol, 5159 }, 5160 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 5161 .num_adapters = 2, 5162 .adapter = { 5163 { 5164 .num_frontends = 1, 5165 .fe = {{ 5166 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 5167 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 5168 .pid_filter_count = 32, 5169 .pid_filter = stk80xx_pid_filter, 5170 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 5171 .frontend_attach = stk809x_frontend_attach, 5172 .tuner_attach = dib809x_tuner_attach, 5173 5174 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 5175 } }, 5176 .size_of_priv = 5177 sizeof(struct dib0700_adapter_state), 5178 }, { 5179 .num_frontends = 1, 5180 .fe = { { 5181 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 5182 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 5183 .pid_filter_count = 32, 5184 .pid_filter = stk80xx_pid_filter, 5185 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 5186 .frontend_attach = stk809x_frontend1_attach, 5187 .tuner_attach = dib809x_tuner_attach, 5188 5189 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 5190 } }, 5191 .size_of_priv = 5192 sizeof(struct dib0700_adapter_state), 5193 }, 5194 }, 5195 .num_device_descs = 1, 5196 .devices = { 5197 { "DiBcom STK8096-PVR reference design", 5198 { &dib0700_usb_id_table[PCTV_DIBCOM_STK8096PVR], 5199 &dib0700_usb_id_table[DIBCOM_STK8096PVR], NULL}, 5200 { NULL }, 5201 }, 5202 }, 5203 5204 .rc.core = { 5205 .rc_interval = DEFAULT_RC_INTERVAL, 5206 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 5207 .module_name = "dib0700", 5208 .rc_query = dib0700_rc_query_old_firmware, 5209 .allowed_protos = RC_PROTO_BIT_RC5 | 5210 RC_PROTO_BIT_RC6_MCE | 5211 RC_PROTO_BIT_NEC, 5212 .change_protocol = dib0700_change_protocol, 5213 }, 5214 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 5215 .num_adapters = 1, 5216 .adapter = { 5217 { 5218 DIB0700_NUM_FRONTENDS(1), 5219 .fe = {{ 5220 .frontend_attach = xbox_one_attach, 5221 5222 DIB0700_DEFAULT_STREAMING_CONFIG(0x82), 5223 } }, 5224 }, 5225 }, 5226 .num_device_descs = 1, 5227 .devices = { 5228 { "Microsoft Xbox One Digital TV Tuner", 5229 { &dib0700_usb_id_table[MICROSOFT_XBOX_ONE_TUNER], NULL }, 5230 { NULL }, 5231 }, 5232 }, 5233 }, 5234}; 5235 5236int dib0700_device_count = ARRAY_SIZE(dib0700_devices); 5237