1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com 5 * 6 * Samsung EXYNOS5 SoC series G-Scaler driver 7 */ 8 9#include <linux/module.h> 10#include <linux/kernel.h> 11#include <linux/types.h> 12#include <linux/errno.h> 13#include <linux/bug.h> 14#include <linux/interrupt.h> 15#include <linux/workqueue.h> 16#include <linux/device.h> 17#include <linux/platform_device.h> 18#include <linux/list.h> 19#include <linux/io.h> 20#include <linux/slab.h> 21#include <linux/clk.h> 22#include <linux/of.h> 23#include <media/v4l2-ioctl.h> 24 25#include "gsc-core.h" 26 27static const struct gsc_fmt gsc_formats[] = { 28 { 29 .pixelformat = V4L2_PIX_FMT_RGB565X, 30 .depth = { 16 }, 31 .color = GSC_RGB, 32 .num_planes = 1, 33 .num_comp = 1, 34 }, { 35 .pixelformat = V4L2_PIX_FMT_BGR32, 36 .depth = { 32 }, 37 .color = GSC_RGB, 38 .num_planes = 1, 39 .num_comp = 1, 40 }, { 41 .pixelformat = V4L2_PIX_FMT_YUYV, 42 .depth = { 16 }, 43 .color = GSC_YUV422, 44 .yorder = GSC_LSB_Y, 45 .corder = GSC_CBCR, 46 .num_planes = 1, 47 .num_comp = 1, 48 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 49 }, { 50 .pixelformat = V4L2_PIX_FMT_UYVY, 51 .depth = { 16 }, 52 .color = GSC_YUV422, 53 .yorder = GSC_LSB_C, 54 .corder = GSC_CBCR, 55 .num_planes = 1, 56 .num_comp = 1, 57 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 58 }, { 59 .pixelformat = V4L2_PIX_FMT_VYUY, 60 .depth = { 16 }, 61 .color = GSC_YUV422, 62 .yorder = GSC_LSB_C, 63 .corder = GSC_CRCB, 64 .num_planes = 1, 65 .num_comp = 1, 66 .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 67 }, { 68 .pixelformat = V4L2_PIX_FMT_YVYU, 69 .depth = { 16 }, 70 .color = GSC_YUV422, 71 .yorder = GSC_LSB_Y, 72 .corder = GSC_CRCB, 73 .num_planes = 1, 74 .num_comp = 1, 75 .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 76 }, { 77 .pixelformat = V4L2_PIX_FMT_YUV32, 78 .depth = { 32 }, 79 .color = GSC_YUV444, 80 .yorder = GSC_LSB_Y, 81 .corder = GSC_CBCR, 82 .num_planes = 1, 83 .num_comp = 1, 84 }, { 85 .pixelformat = V4L2_PIX_FMT_YUV422P, 86 .depth = { 16 }, 87 .color = GSC_YUV422, 88 .yorder = GSC_LSB_Y, 89 .corder = GSC_CBCR, 90 .num_planes = 1, 91 .num_comp = 3, 92 }, { 93 .pixelformat = V4L2_PIX_FMT_NV16, 94 .depth = { 16 }, 95 .color = GSC_YUV422, 96 .yorder = GSC_LSB_Y, 97 .corder = GSC_CBCR, 98 .num_planes = 1, 99 .num_comp = 2, 100 }, { 101 .pixelformat = V4L2_PIX_FMT_NV16M, 102 .depth = { 8, 8 }, 103 .color = GSC_YUV422, 104 .yorder = GSC_LSB_Y, 105 .corder = GSC_CBCR, 106 .num_planes = 2, 107 .num_comp = 2, 108 }, { 109 .pixelformat = V4L2_PIX_FMT_NV61, 110 .depth = { 16 }, 111 .color = GSC_YUV422, 112 .yorder = GSC_LSB_Y, 113 .corder = GSC_CRCB, 114 .num_planes = 1, 115 .num_comp = 2, 116 }, { 117 .pixelformat = V4L2_PIX_FMT_NV61M, 118 .depth = { 8, 8 }, 119 .color = GSC_YUV422, 120 .yorder = GSC_LSB_Y, 121 .corder = GSC_CRCB, 122 .num_planes = 2, 123 .num_comp = 2, 124 }, { 125 .pixelformat = V4L2_PIX_FMT_YUV420, 126 .depth = { 12 }, 127 .color = GSC_YUV420, 128 .yorder = GSC_LSB_Y, 129 .corder = GSC_CBCR, 130 .num_planes = 1, 131 .num_comp = 3, 132 }, { 133 .pixelformat = V4L2_PIX_FMT_YVU420, 134 .depth = { 12 }, 135 .color = GSC_YUV420, 136 .yorder = GSC_LSB_Y, 137 .corder = GSC_CRCB, 138 .num_planes = 1, 139 .num_comp = 3, 140 141 }, { 142 .pixelformat = V4L2_PIX_FMT_NV12, 143 .depth = { 12 }, 144 .color = GSC_YUV420, 145 .yorder = GSC_LSB_Y, 146 .corder = GSC_CBCR, 147 .num_planes = 1, 148 .num_comp = 2, 149 }, { 150 .pixelformat = V4L2_PIX_FMT_NV21, 151 .depth = { 12 }, 152 .color = GSC_YUV420, 153 .yorder = GSC_LSB_Y, 154 .corder = GSC_CRCB, 155 .num_planes = 1, 156 .num_comp = 2, 157 }, { 158 .pixelformat = V4L2_PIX_FMT_NV21M, 159 .depth = { 8, 4 }, 160 .color = GSC_YUV420, 161 .yorder = GSC_LSB_Y, 162 .corder = GSC_CRCB, 163 .num_planes = 2, 164 .num_comp = 2, 165 }, { 166 .pixelformat = V4L2_PIX_FMT_NV12M, 167 .depth = { 8, 4 }, 168 .color = GSC_YUV420, 169 .yorder = GSC_LSB_Y, 170 .corder = GSC_CBCR, 171 .num_planes = 2, 172 .num_comp = 2, 173 }, { 174 .pixelformat = V4L2_PIX_FMT_YUV420M, 175 .depth = { 8, 2, 2 }, 176 .color = GSC_YUV420, 177 .yorder = GSC_LSB_Y, 178 .corder = GSC_CBCR, 179 .num_planes = 3, 180 .num_comp = 3, 181 }, { 182 .pixelformat = V4L2_PIX_FMT_YVU420M, 183 .depth = { 8, 2, 2 }, 184 .color = GSC_YUV420, 185 .yorder = GSC_LSB_Y, 186 .corder = GSC_CRCB, 187 .num_planes = 3, 188 .num_comp = 3, 189 }, { 190 .pixelformat = V4L2_PIX_FMT_NV12MT_16X16, 191 .depth = { 8, 4 }, 192 .color = GSC_YUV420, 193 .yorder = GSC_LSB_Y, 194 .corder = GSC_CBCR, 195 .num_planes = 2, 196 .num_comp = 2, 197 } 198}; 199 200const struct gsc_fmt *get_format(int index) 201{ 202 if (index >= ARRAY_SIZE(gsc_formats)) 203 return NULL; 204 205 return (struct gsc_fmt *)&gsc_formats[index]; 206} 207 208const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index) 209{ 210 const struct gsc_fmt *fmt, *def_fmt = NULL; 211 unsigned int i; 212 213 if (index >= ARRAY_SIZE(gsc_formats)) 214 return NULL; 215 216 for (i = 0; i < ARRAY_SIZE(gsc_formats); ++i) { 217 fmt = get_format(i); 218 if (pixelformat && fmt->pixelformat == *pixelformat) 219 return fmt; 220 if (mbus_code && fmt->mbus_code == *mbus_code) 221 return fmt; 222 if (index == i) 223 def_fmt = fmt; 224 } 225 return def_fmt; 226 227} 228 229void gsc_set_frame_size(struct gsc_frame *frame, int width, int height) 230{ 231 frame->f_width = width; 232 frame->f_height = height; 233 frame->crop.width = width; 234 frame->crop.height = height; 235 frame->crop.left = 0; 236 frame->crop.top = 0; 237} 238 239int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst, 240 u32 *ratio) 241{ 242 if ((dst > src) || (dst >= src / var->poly_sc_down_max)) { 243 *ratio = 1; 244 return 0; 245 } 246 247 if ((src / var->poly_sc_down_max / var->pre_sc_down_max) > dst) { 248 pr_err("Exceeded maximum downscaling ratio (1/16))"); 249 return -EINVAL; 250 } 251 252 *ratio = (dst > (src / 8)) ? 2 : 4; 253 254 return 0; 255} 256 257void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh) 258{ 259 if (hratio == 4 && vratio == 4) 260 *sh = 4; 261 else if ((hratio == 4 && vratio == 2) || 262 (hratio == 2 && vratio == 4)) 263 *sh = 3; 264 else if ((hratio == 4 && vratio == 1) || 265 (hratio == 1 && vratio == 4) || 266 (hratio == 2 && vratio == 2)) 267 *sh = 2; 268 else if (hratio == 1 && vratio == 1) 269 *sh = 0; 270 else 271 *sh = 1; 272} 273 274void gsc_check_src_scale_info(struct gsc_variant *var, 275 struct gsc_frame *s_frame, u32 *wratio, 276 u32 tx, u32 ty, u32 *hratio) 277{ 278 int remainder = 0, walign, halign; 279 280 if (is_yuv420(s_frame->fmt->color)) { 281 walign = GSC_SC_ALIGN_4; 282 halign = GSC_SC_ALIGN_4; 283 } else if (is_yuv422(s_frame->fmt->color)) { 284 walign = GSC_SC_ALIGN_4; 285 halign = GSC_SC_ALIGN_2; 286 } else { 287 walign = GSC_SC_ALIGN_2; 288 halign = GSC_SC_ALIGN_2; 289 } 290 291 remainder = s_frame->crop.width % (*wratio * walign); 292 if (remainder) { 293 s_frame->crop.width -= remainder; 294 gsc_cal_prescaler_ratio(var, s_frame->crop.width, tx, wratio); 295 pr_info("cropped src width size is recalculated from %d to %d", 296 s_frame->crop.width + remainder, s_frame->crop.width); 297 } 298 299 remainder = s_frame->crop.height % (*hratio * halign); 300 if (remainder) { 301 s_frame->crop.height -= remainder; 302 gsc_cal_prescaler_ratio(var, s_frame->crop.height, ty, hratio); 303 pr_info("cropped src height size is recalculated from %d to %d", 304 s_frame->crop.height + remainder, s_frame->crop.height); 305 } 306} 307 308int gsc_enum_fmt(struct v4l2_fmtdesc *f) 309{ 310 const struct gsc_fmt *fmt; 311 312 fmt = find_fmt(NULL, NULL, f->index); 313 if (!fmt) 314 return -EINVAL; 315 316 f->pixelformat = fmt->pixelformat; 317 318 return 0; 319} 320 321static int get_plane_info(struct gsc_frame *frm, u32 addr, u32 *index, u32 *ret_addr) 322{ 323 if (frm->addr.y == addr) { 324 *index = 0; 325 *ret_addr = frm->addr.y; 326 } else if (frm->addr.cb == addr) { 327 *index = 1; 328 *ret_addr = frm->addr.cb; 329 } else if (frm->addr.cr == addr) { 330 *index = 2; 331 *ret_addr = frm->addr.cr; 332 } else { 333 pr_err("Plane address is wrong"); 334 return -EINVAL; 335 } 336 return 0; 337} 338 339void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm) 340{ 341 u32 f_chk_addr, f_chk_len, s_chk_addr = 0, s_chk_len = 0; 342 343 f_chk_addr = frm->addr.y; 344 f_chk_len = frm->payload[0]; 345 if (frm->fmt->num_planes == 2) { 346 s_chk_addr = frm->addr.cb; 347 s_chk_len = frm->payload[1]; 348 } else if (frm->fmt->num_planes == 3) { 349 u32 low_addr, low_plane, mid_addr, mid_plane; 350 u32 high_addr, high_plane; 351 u32 t_min, t_max; 352 353 t_min = min3(frm->addr.y, frm->addr.cb, frm->addr.cr); 354 if (get_plane_info(frm, t_min, &low_plane, &low_addr)) 355 return; 356 t_max = max3(frm->addr.y, frm->addr.cb, frm->addr.cr); 357 if (get_plane_info(frm, t_max, &high_plane, &high_addr)) 358 return; 359 360 mid_plane = 3 - (low_plane + high_plane); 361 if (mid_plane == 0) 362 mid_addr = frm->addr.y; 363 else if (mid_plane == 1) 364 mid_addr = frm->addr.cb; 365 else if (mid_plane == 2) 366 mid_addr = frm->addr.cr; 367 else 368 return; 369 370 f_chk_addr = low_addr; 371 if (mid_addr + frm->payload[mid_plane] - low_addr > 372 high_addr + frm->payload[high_plane] - mid_addr) { 373 f_chk_len = frm->payload[low_plane]; 374 s_chk_addr = mid_addr; 375 s_chk_len = high_addr + 376 frm->payload[high_plane] - mid_addr; 377 } else { 378 f_chk_len = mid_addr + 379 frm->payload[mid_plane] - low_addr; 380 s_chk_addr = high_addr; 381 s_chk_len = frm->payload[high_plane]; 382 } 383 } 384 pr_debug("f_addr = 0x%08x, f_len = %d, s_addr = 0x%08x, s_len = %d\n", 385 f_chk_addr, f_chk_len, s_chk_addr, s_chk_len); 386} 387 388int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f) 389{ 390 struct gsc_dev *gsc = ctx->gsc_dev; 391 struct gsc_variant *variant = gsc->variant; 392 struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; 393 const struct gsc_fmt *fmt; 394 u32 max_w, max_h, mod_x, mod_y; 395 u32 min_w, min_h, tmp_w, tmp_h; 396 int i; 397 398 pr_debug("user put w: %d, h: %d", pix_mp->width, pix_mp->height); 399 400 fmt = find_fmt(&pix_mp->pixelformat, NULL, 0); 401 if (!fmt) { 402 pr_err("pixelformat format (0x%X) invalid\n", 403 pix_mp->pixelformat); 404 return -EINVAL; 405 } 406 407 if (pix_mp->field == V4L2_FIELD_ANY) 408 pix_mp->field = V4L2_FIELD_NONE; 409 else if (pix_mp->field != V4L2_FIELD_NONE) { 410 pr_debug("Not supported field order(%d)\n", pix_mp->field); 411 return -EINVAL; 412 } 413 414 max_w = variant->pix_max->target_rot_dis_w; 415 max_h = variant->pix_max->target_rot_dis_h; 416 417 mod_x = ffs(variant->pix_align->org_w) - 1; 418 if (is_yuv420(fmt->color)) 419 mod_y = ffs(variant->pix_align->org_h) - 1; 420 else 421 mod_y = ffs(variant->pix_align->org_h) - 2; 422 423 if (V4L2_TYPE_IS_OUTPUT(f->type)) { 424 min_w = variant->pix_min->org_w; 425 min_h = variant->pix_min->org_h; 426 } else { 427 min_w = variant->pix_min->target_rot_dis_w; 428 min_h = variant->pix_min->target_rot_dis_h; 429 pix_mp->colorspace = ctx->out_colorspace; 430 } 431 432 pr_debug("mod_x: %d, mod_y: %d, max_w: %d, max_h = %d", 433 mod_x, mod_y, max_w, max_h); 434 435 /* To check if image size is modified to adjust parameter against 436 hardware abilities */ 437 tmp_w = pix_mp->width; 438 tmp_h = pix_mp->height; 439 440 v4l_bound_align_image(&pix_mp->width, min_w, max_w, mod_x, 441 &pix_mp->height, min_h, max_h, mod_y, 0); 442 if (tmp_w != pix_mp->width || tmp_h != pix_mp->height) 443 pr_debug("Image size has been modified from %dx%d to %dx%d\n", 444 tmp_w, tmp_h, pix_mp->width, pix_mp->height); 445 446 pix_mp->num_planes = fmt->num_planes; 447 448 if (V4L2_TYPE_IS_OUTPUT(f->type)) 449 ctx->out_colorspace = pix_mp->colorspace; 450 451 for (i = 0; i < pix_mp->num_planes; ++i) { 452 struct v4l2_plane_pix_format *plane_fmt = &pix_mp->plane_fmt[i]; 453 u32 bpl = plane_fmt->bytesperline; 454 455 if (fmt->num_comp == 1 && /* Packed */ 456 (bpl == 0 || (bpl * 8 / fmt->depth[i]) < pix_mp->width)) 457 bpl = pix_mp->width * fmt->depth[i] / 8; 458 459 if (fmt->num_comp > 1 && /* Planar */ 460 (bpl == 0 || bpl < pix_mp->width)) 461 bpl = pix_mp->width; 462 463 if (i != 0 && fmt->num_comp == 3) 464 bpl /= 2; 465 466 plane_fmt->bytesperline = bpl; 467 plane_fmt->sizeimage = max(pix_mp->width * pix_mp->height * 468 fmt->depth[i] / 8, 469 plane_fmt->sizeimage); 470 pr_debug("[%d]: bpl: %d, sizeimage: %d", 471 i, bpl, pix_mp->plane_fmt[i].sizeimage); 472 } 473 474 return 0; 475} 476 477int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f) 478{ 479 struct gsc_frame *frame; 480 struct v4l2_pix_format_mplane *pix_mp; 481 int i; 482 483 frame = ctx_get_frame(ctx, f->type); 484 if (IS_ERR(frame)) 485 return PTR_ERR(frame); 486 487 pix_mp = &f->fmt.pix_mp; 488 489 pix_mp->width = frame->f_width; 490 pix_mp->height = frame->f_height; 491 pix_mp->field = V4L2_FIELD_NONE; 492 pix_mp->pixelformat = frame->fmt->pixelformat; 493 pix_mp->num_planes = frame->fmt->num_planes; 494 pix_mp->colorspace = ctx->out_colorspace; 495 496 for (i = 0; i < pix_mp->num_planes; ++i) { 497 pix_mp->plane_fmt[i].bytesperline = (frame->f_width * 498 frame->fmt->depth[i]) / 8; 499 pix_mp->plane_fmt[i].sizeimage = 500 pix_mp->plane_fmt[i].bytesperline * frame->f_height; 501 } 502 503 return 0; 504} 505 506void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h) 507{ 508 if (tmp_w != *w || tmp_h != *h) { 509 pr_info("Cropped size has been modified from %dx%d to %dx%d", 510 *w, *h, tmp_w, tmp_h); 511 *w = tmp_w; 512 *h = tmp_h; 513 } 514} 515 516int gsc_try_selection(struct gsc_ctx *ctx, struct v4l2_selection *s) 517{ 518 struct gsc_frame *f; 519 struct gsc_dev *gsc = ctx->gsc_dev; 520 struct gsc_variant *variant = gsc->variant; 521 u32 mod_x = 0, mod_y = 0, tmp_w, tmp_h; 522 u32 min_w, min_h, max_w, max_h; 523 524 if (s->r.top < 0 || s->r.left < 0) { 525 pr_err("doesn't support negative values for top & left\n"); 526 return -EINVAL; 527 } 528 pr_debug("user put w: %d, h: %d", s->r.width, s->r.height); 529 530 if (s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) 531 f = &ctx->d_frame; 532 else if (s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) 533 f = &ctx->s_frame; 534 else 535 return -EINVAL; 536 537 max_w = f->f_width; 538 max_h = f->f_height; 539 tmp_w = s->r.width; 540 tmp_h = s->r.height; 541 542 if (V4L2_TYPE_IS_OUTPUT(s->type)) { 543 if ((is_yuv422(f->fmt->color) && f->fmt->num_comp == 1) || 544 is_rgb(f->fmt->color)) 545 min_w = 32; 546 else 547 min_w = 64; 548 if ((is_yuv422(f->fmt->color) && f->fmt->num_comp == 3) || 549 is_yuv420(f->fmt->color)) 550 min_h = 32; 551 else 552 min_h = 16; 553 } else { 554 if (is_yuv420(f->fmt->color) || is_yuv422(f->fmt->color)) 555 mod_x = ffs(variant->pix_align->target_w) - 1; 556 if (is_yuv420(f->fmt->color)) 557 mod_y = ffs(variant->pix_align->target_h) - 1; 558 if (ctx->gsc_ctrls.rotate->val == 90 || 559 ctx->gsc_ctrls.rotate->val == 270) { 560 max_w = f->f_height; 561 max_h = f->f_width; 562 min_w = variant->pix_min->target_rot_en_w; 563 min_h = variant->pix_min->target_rot_en_h; 564 tmp_w = s->r.height; 565 tmp_h = s->r.width; 566 } else { 567 min_w = variant->pix_min->target_rot_dis_w; 568 min_h = variant->pix_min->target_rot_dis_h; 569 } 570 } 571 pr_debug("mod_x: %d, mod_y: %d, min_w: %d, min_h = %d", 572 mod_x, mod_y, min_w, min_h); 573 pr_debug("tmp_w : %d, tmp_h : %d", tmp_w, tmp_h); 574 575 v4l_bound_align_image(&tmp_w, min_w, max_w, mod_x, 576 &tmp_h, min_h, max_h, mod_y, 0); 577 578 if (V4L2_TYPE_IS_CAPTURE(s->type) && 579 (ctx->gsc_ctrls.rotate->val == 90 || 580 ctx->gsc_ctrls.rotate->val == 270)) 581 gsc_check_crop_change(tmp_h, tmp_w, 582 &s->r.width, &s->r.height); 583 else 584 gsc_check_crop_change(tmp_w, tmp_h, 585 &s->r.width, &s->r.height); 586 587 588 /* adjust left/top if cropping rectangle is out of bounds */ 589 /* Need to add code to algin left value with 2's multiple */ 590 if (s->r.left + tmp_w > max_w) 591 s->r.left = max_w - tmp_w; 592 if (s->r.top + tmp_h > max_h) 593 s->r.top = max_h - tmp_h; 594 595 if ((is_yuv420(f->fmt->color) || is_yuv422(f->fmt->color)) && 596 s->r.left & 1) 597 s->r.left -= 1; 598 599 pr_debug("Aligned l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d", 600 s->r.left, s->r.top, s->r.width, s->r.height, max_w, max_h); 601 602 return 0; 603} 604 605int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw, 606 int dh, int rot, int out_path) 607{ 608 int tmp_w, tmp_h, sc_down_max; 609 610 if (out_path == GSC_DMA) 611 sc_down_max = var->sc_down_max; 612 else 613 sc_down_max = var->local_sc_down; 614 615 if (rot == 90 || rot == 270) { 616 tmp_w = dh; 617 tmp_h = dw; 618 } else { 619 tmp_w = dw; 620 tmp_h = dh; 621 } 622 623 if ((sw / tmp_w) > sc_down_max || 624 (sh / tmp_h) > sc_down_max || 625 (tmp_w / sw) > var->sc_up_max || 626 (tmp_h / sh) > var->sc_up_max) 627 return -EINVAL; 628 629 return 0; 630} 631 632int gsc_set_scaler_info(struct gsc_ctx *ctx) 633{ 634 struct gsc_scaler *sc = &ctx->scaler; 635 struct gsc_frame *s_frame = &ctx->s_frame; 636 struct gsc_frame *d_frame = &ctx->d_frame; 637 struct gsc_variant *variant = ctx->gsc_dev->variant; 638 struct device *dev = &ctx->gsc_dev->pdev->dev; 639 int tx, ty; 640 int ret; 641 642 ret = gsc_check_scaler_ratio(variant, s_frame->crop.width, 643 s_frame->crop.height, d_frame->crop.width, d_frame->crop.height, 644 ctx->gsc_ctrls.rotate->val, ctx->out_path); 645 if (ret) { 646 pr_err("out of scaler range"); 647 return ret; 648 } 649 650 if (ctx->gsc_ctrls.rotate->val == 90 || 651 ctx->gsc_ctrls.rotate->val == 270) { 652 ty = d_frame->crop.width; 653 tx = d_frame->crop.height; 654 } else { 655 tx = d_frame->crop.width; 656 ty = d_frame->crop.height; 657 } 658 659 if (tx <= 0 || ty <= 0) { 660 dev_err(dev, "Invalid target size: %dx%d", tx, ty); 661 return -EINVAL; 662 } 663 664 ret = gsc_cal_prescaler_ratio(variant, s_frame->crop.width, 665 tx, &sc->pre_hratio); 666 if (ret) { 667 pr_err("Horizontal scale ratio is out of range"); 668 return ret; 669 } 670 671 ret = gsc_cal_prescaler_ratio(variant, s_frame->crop.height, 672 ty, &sc->pre_vratio); 673 if (ret) { 674 pr_err("Vertical scale ratio is out of range"); 675 return ret; 676 } 677 678 gsc_check_src_scale_info(variant, s_frame, &sc->pre_hratio, 679 tx, ty, &sc->pre_vratio); 680 681 gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio, 682 &sc->pre_shfactor); 683 684 sc->main_hratio = (s_frame->crop.width << 16) / tx; 685 sc->main_vratio = (s_frame->crop.height << 16) / ty; 686 687 pr_debug("scaler input/output size : sx = %d, sy = %d, tx = %d, ty = %d", 688 s_frame->crop.width, s_frame->crop.height, tx, ty); 689 pr_debug("scaler ratio info : pre_shfactor : %d, pre_h : %d", 690 sc->pre_shfactor, sc->pre_hratio); 691 pr_debug("pre_v :%d, main_h : %d, main_v : %d", 692 sc->pre_vratio, sc->main_hratio, sc->main_vratio); 693 694 return 0; 695} 696 697static int __gsc_s_ctrl(struct gsc_ctx *ctx, struct v4l2_ctrl *ctrl) 698{ 699 struct gsc_dev *gsc = ctx->gsc_dev; 700 struct gsc_variant *variant = gsc->variant; 701 unsigned int flags = GSC_DST_FMT | GSC_SRC_FMT; 702 int ret = 0; 703 704 if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE) 705 return 0; 706 707 switch (ctrl->id) { 708 case V4L2_CID_HFLIP: 709 ctx->hflip = ctrl->val; 710 break; 711 712 case V4L2_CID_VFLIP: 713 ctx->vflip = ctrl->val; 714 break; 715 716 case V4L2_CID_ROTATE: 717 if ((ctx->state & flags) == flags) { 718 ret = gsc_check_scaler_ratio(variant, 719 ctx->s_frame.crop.width, 720 ctx->s_frame.crop.height, 721 ctx->d_frame.crop.width, 722 ctx->d_frame.crop.height, 723 ctx->gsc_ctrls.rotate->val, 724 ctx->out_path); 725 726 if (ret) 727 return -EINVAL; 728 } 729 730 ctx->rotation = ctrl->val; 731 break; 732 733 case V4L2_CID_ALPHA_COMPONENT: 734 ctx->d_frame.alpha = ctrl->val; 735 break; 736 } 737 738 ctx->state |= GSC_PARAMS; 739 return 0; 740} 741 742static int gsc_s_ctrl(struct v4l2_ctrl *ctrl) 743{ 744 struct gsc_ctx *ctx = ctrl_to_ctx(ctrl); 745 unsigned long flags; 746 int ret; 747 748 spin_lock_irqsave(&ctx->gsc_dev->slock, flags); 749 ret = __gsc_s_ctrl(ctx, ctrl); 750 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags); 751 752 return ret; 753} 754 755static const struct v4l2_ctrl_ops gsc_ctrl_ops = { 756 .s_ctrl = gsc_s_ctrl, 757}; 758 759int gsc_ctrls_create(struct gsc_ctx *ctx) 760{ 761 if (ctx->ctrls_rdy) { 762 pr_err("Control handler of this context was created already"); 763 return 0; 764 } 765 766 v4l2_ctrl_handler_init(&ctx->ctrl_handler, GSC_MAX_CTRL_NUM); 767 768 ctx->gsc_ctrls.rotate = v4l2_ctrl_new_std(&ctx->ctrl_handler, 769 &gsc_ctrl_ops, V4L2_CID_ROTATE, 0, 270, 90, 0); 770 ctx->gsc_ctrls.hflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, 771 &gsc_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); 772 ctx->gsc_ctrls.vflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, 773 &gsc_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); 774 ctx->gsc_ctrls.global_alpha = v4l2_ctrl_new_std(&ctx->ctrl_handler, 775 &gsc_ctrl_ops, V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 0); 776 777 ctx->ctrls_rdy = ctx->ctrl_handler.error == 0; 778 779 if (ctx->ctrl_handler.error) { 780 int err = ctx->ctrl_handler.error; 781 v4l2_ctrl_handler_free(&ctx->ctrl_handler); 782 pr_err("Failed to create G-Scaler control handlers"); 783 return err; 784 } 785 786 return 0; 787} 788 789void gsc_ctrls_delete(struct gsc_ctx *ctx) 790{ 791 if (ctx->ctrls_rdy) { 792 v4l2_ctrl_handler_free(&ctx->ctrl_handler); 793 ctx->ctrls_rdy = false; 794 } 795} 796 797/* The color format (num_comp, num_planes) must be already configured. */ 798int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb, 799 struct gsc_frame *frame, struct gsc_addr *addr) 800{ 801 int ret = 0; 802 u32 pix_size; 803 804 if ((vb == NULL) || (frame == NULL)) 805 return -EINVAL; 806 807 pix_size = frame->f_width * frame->f_height; 808 809 pr_debug("num_planes= %d, num_comp= %d, pix_size= %d", 810 frame->fmt->num_planes, frame->fmt->num_comp, pix_size); 811 812 addr->y = vb2_dma_contig_plane_dma_addr(vb, 0); 813 814 if (frame->fmt->num_planes == 1) { 815 switch (frame->fmt->num_comp) { 816 case 1: 817 addr->cb = 0; 818 addr->cr = 0; 819 break; 820 case 2: 821 /* decompose Y into Y/Cb */ 822 addr->cb = (dma_addr_t)(addr->y + pix_size); 823 addr->cr = 0; 824 break; 825 case 3: 826 /* decompose Y into Y/Cb/Cr */ 827 addr->cb = (dma_addr_t)(addr->y + pix_size); 828 if (GSC_YUV420 == frame->fmt->color) 829 addr->cr = (dma_addr_t)(addr->cb 830 + (pix_size >> 2)); 831 else /* 422 */ 832 addr->cr = (dma_addr_t)(addr->cb 833 + (pix_size >> 1)); 834 break; 835 default: 836 pr_err("Invalid the number of color planes"); 837 return -EINVAL; 838 } 839 } else { 840 if (frame->fmt->num_planes >= 2) 841 addr->cb = vb2_dma_contig_plane_dma_addr(vb, 1); 842 843 if (frame->fmt->num_planes == 3) 844 addr->cr = vb2_dma_contig_plane_dma_addr(vb, 2); 845 } 846 847 if ((frame->fmt->pixelformat == V4L2_PIX_FMT_VYUY) || 848 (frame->fmt->pixelformat == V4L2_PIX_FMT_YVYU) || 849 (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420) || 850 (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420M)) 851 swap(addr->cb, addr->cr); 852 853 pr_debug("ADDR: y= %pad cb= %pad cr= %pad ret= %d", 854 &addr->y, &addr->cb, &addr->cr, ret); 855 856 return ret; 857} 858 859static irqreturn_t gsc_irq_handler(int irq, void *priv) 860{ 861 struct gsc_dev *gsc = priv; 862 struct gsc_ctx *ctx; 863 int gsc_irq; 864 865 gsc_irq = gsc_hw_get_irq_status(gsc); 866 gsc_hw_clear_irq(gsc, gsc_irq); 867 868 if (gsc_irq == GSC_IRQ_OVERRUN) { 869 pr_err("Local path input over-run interrupt has occurred!\n"); 870 return IRQ_HANDLED; 871 } 872 873 spin_lock(&gsc->slock); 874 875 if (test_and_clear_bit(ST_M2M_PEND, &gsc->state)) { 876 877 gsc_hw_enable_control(gsc, false); 878 879 if (test_and_clear_bit(ST_M2M_SUSPENDING, &gsc->state)) { 880 set_bit(ST_M2M_SUSPENDED, &gsc->state); 881 wake_up(&gsc->irq_queue); 882 goto isr_unlock; 883 } 884 ctx = v4l2_m2m_get_curr_priv(gsc->m2m.m2m_dev); 885 886 if (!ctx || !ctx->m2m_ctx) 887 goto isr_unlock; 888 889 spin_unlock(&gsc->slock); 890 gsc_m2m_job_finish(ctx, VB2_BUF_STATE_DONE); 891 892 /* wake_up job_abort, stop_streaming */ 893 if (ctx->state & GSC_CTX_STOP_REQ) { 894 ctx->state &= ~GSC_CTX_STOP_REQ; 895 wake_up(&gsc->irq_queue); 896 } 897 return IRQ_HANDLED; 898 } 899 900isr_unlock: 901 spin_unlock(&gsc->slock); 902 return IRQ_HANDLED; 903} 904 905static struct gsc_pix_max gsc_v_100_max = { 906 .org_scaler_bypass_w = 8192, 907 .org_scaler_bypass_h = 8192, 908 .org_scaler_input_w = 4800, 909 .org_scaler_input_h = 3344, 910 .real_rot_dis_w = 4800, 911 .real_rot_dis_h = 3344, 912 .real_rot_en_w = 2047, 913 .real_rot_en_h = 2047, 914 .target_rot_dis_w = 4800, 915 .target_rot_dis_h = 3344, 916 .target_rot_en_w = 2016, 917 .target_rot_en_h = 2016, 918}; 919 920static struct gsc_pix_max gsc_v_5250_max = { 921 .org_scaler_bypass_w = 8192, 922 .org_scaler_bypass_h = 8192, 923 .org_scaler_input_w = 4800, 924 .org_scaler_input_h = 3344, 925 .real_rot_dis_w = 4800, 926 .real_rot_dis_h = 3344, 927 .real_rot_en_w = 2016, 928 .real_rot_en_h = 2016, 929 .target_rot_dis_w = 4800, 930 .target_rot_dis_h = 3344, 931 .target_rot_en_w = 2016, 932 .target_rot_en_h = 2016, 933}; 934 935static struct gsc_pix_max gsc_v_5420_max = { 936 .org_scaler_bypass_w = 8192, 937 .org_scaler_bypass_h = 8192, 938 .org_scaler_input_w = 4800, 939 .org_scaler_input_h = 3344, 940 .real_rot_dis_w = 4800, 941 .real_rot_dis_h = 3344, 942 .real_rot_en_w = 2048, 943 .real_rot_en_h = 2048, 944 .target_rot_dis_w = 4800, 945 .target_rot_dis_h = 3344, 946 .target_rot_en_w = 2016, 947 .target_rot_en_h = 2016, 948}; 949 950static struct gsc_pix_max gsc_v_5433_max = { 951 .org_scaler_bypass_w = 8192, 952 .org_scaler_bypass_h = 8192, 953 .org_scaler_input_w = 4800, 954 .org_scaler_input_h = 3344, 955 .real_rot_dis_w = 4800, 956 .real_rot_dis_h = 3344, 957 .real_rot_en_w = 2047, 958 .real_rot_en_h = 2047, 959 .target_rot_dis_w = 4800, 960 .target_rot_dis_h = 3344, 961 .target_rot_en_w = 2016, 962 .target_rot_en_h = 2016, 963}; 964 965static struct gsc_pix_min gsc_v_100_min = { 966 .org_w = 64, 967 .org_h = 32, 968 .real_w = 64, 969 .real_h = 32, 970 .target_rot_dis_w = 64, 971 .target_rot_dis_h = 32, 972 .target_rot_en_w = 32, 973 .target_rot_en_h = 16, 974}; 975 976static struct gsc_pix_align gsc_v_100_align = { 977 .org_h = 16, 978 .org_w = 16, /* yuv420 : 16, others : 8 */ 979 .offset_h = 2, /* yuv420/422 : 2, others : 1 */ 980 .real_w = 16, /* yuv420/422 : 4~16, others : 2~8 */ 981 .real_h = 16, /* yuv420 : 4~16, others : 1 */ 982 .target_w = 2, /* yuv420/422 : 2, others : 1 */ 983 .target_h = 2, /* yuv420 : 2, others : 1 */ 984}; 985 986static struct gsc_variant gsc_v_100_variant = { 987 .pix_max = &gsc_v_100_max, 988 .pix_min = &gsc_v_100_min, 989 .pix_align = &gsc_v_100_align, 990 .in_buf_cnt = 32, 991 .out_buf_cnt = 32, 992 .sc_up_max = 8, 993 .sc_down_max = 16, 994 .poly_sc_down_max = 4, 995 .pre_sc_down_max = 4, 996 .local_sc_down = 2, 997}; 998 999static struct gsc_variant gsc_v_5250_variant = { 1000 .pix_max = &gsc_v_5250_max, 1001 .pix_min = &gsc_v_100_min, 1002 .pix_align = &gsc_v_100_align, 1003 .in_buf_cnt = 32, 1004 .out_buf_cnt = 32, 1005 .sc_up_max = 8, 1006 .sc_down_max = 16, 1007 .poly_sc_down_max = 4, 1008 .pre_sc_down_max = 4, 1009 .local_sc_down = 2, 1010}; 1011 1012static struct gsc_variant gsc_v_5420_variant = { 1013 .pix_max = &gsc_v_5420_max, 1014 .pix_min = &gsc_v_100_min, 1015 .pix_align = &gsc_v_100_align, 1016 .in_buf_cnt = 32, 1017 .out_buf_cnt = 32, 1018 .sc_up_max = 8, 1019 .sc_down_max = 16, 1020 .poly_sc_down_max = 4, 1021 .pre_sc_down_max = 4, 1022 .local_sc_down = 2, 1023}; 1024 1025static struct gsc_variant gsc_v_5433_variant = { 1026 .pix_max = &gsc_v_5433_max, 1027 .pix_min = &gsc_v_100_min, 1028 .pix_align = &gsc_v_100_align, 1029 .in_buf_cnt = 32, 1030 .out_buf_cnt = 32, 1031 .sc_up_max = 8, 1032 .sc_down_max = 16, 1033 .poly_sc_down_max = 4, 1034 .pre_sc_down_max = 4, 1035 .local_sc_down = 2, 1036}; 1037 1038static struct gsc_driverdata gsc_v_100_drvdata = { 1039 .variant = { 1040 [0] = &gsc_v_100_variant, 1041 [1] = &gsc_v_100_variant, 1042 [2] = &gsc_v_100_variant, 1043 [3] = &gsc_v_100_variant, 1044 }, 1045 .num_entities = 4, 1046 .clk_names = { "gscl" }, 1047 .num_clocks = 1, 1048}; 1049 1050static struct gsc_driverdata gsc_v_5250_drvdata = { 1051 .variant = { 1052 [0] = &gsc_v_5250_variant, 1053 [1] = &gsc_v_5250_variant, 1054 [2] = &gsc_v_5250_variant, 1055 [3] = &gsc_v_5250_variant, 1056 }, 1057 .num_entities = 4, 1058 .clk_names = { "gscl" }, 1059 .num_clocks = 1, 1060}; 1061 1062static struct gsc_driverdata gsc_v_5420_drvdata = { 1063 .variant = { 1064 [0] = &gsc_v_5420_variant, 1065 [1] = &gsc_v_5420_variant, 1066 }, 1067 .num_entities = 2, 1068 .clk_names = { "gscl" }, 1069 .num_clocks = 1, 1070}; 1071 1072static struct gsc_driverdata gsc_5433_drvdata = { 1073 .variant = { 1074 [0] = &gsc_v_5433_variant, 1075 [1] = &gsc_v_5433_variant, 1076 [2] = &gsc_v_5433_variant, 1077 }, 1078 .num_entities = 3, 1079 .clk_names = { "pclk", "aclk", "aclk_xiu", "aclk_gsclbend" }, 1080 .num_clocks = 4, 1081}; 1082 1083static const struct of_device_id exynos_gsc_match[] = { 1084 { 1085 .compatible = "samsung,exynos5250-gsc", 1086 .data = &gsc_v_5250_drvdata, 1087 }, 1088 { 1089 .compatible = "samsung,exynos5420-gsc", 1090 .data = &gsc_v_5420_drvdata, 1091 }, 1092 { 1093 .compatible = "samsung,exynos5433-gsc", 1094 .data = &gsc_5433_drvdata, 1095 }, 1096 { 1097 .compatible = "samsung,exynos5-gsc", 1098 .data = &gsc_v_100_drvdata, 1099 }, 1100 {}, 1101}; 1102MODULE_DEVICE_TABLE(of, exynos_gsc_match); 1103 1104static int gsc_probe(struct platform_device *pdev) 1105{ 1106 struct gsc_dev *gsc; 1107 struct device *dev = &pdev->dev; 1108 const struct gsc_driverdata *drv_data = of_device_get_match_data(dev); 1109 int irq; 1110 int ret; 1111 int i; 1112 1113 gsc = devm_kzalloc(dev, sizeof(struct gsc_dev), GFP_KERNEL); 1114 if (!gsc) 1115 return -ENOMEM; 1116 1117 ret = of_alias_get_id(pdev->dev.of_node, "gsc"); 1118 if (ret < 0) 1119 return ret; 1120 1121 if (drv_data == &gsc_v_100_drvdata) 1122 dev_info(dev, "compatible 'exynos5-gsc' is deprecated\n"); 1123 1124 gsc->id = ret; 1125 if (gsc->id >= drv_data->num_entities) { 1126 dev_err(dev, "Invalid platform device id: %d\n", gsc->id); 1127 return -EINVAL; 1128 } 1129 1130 gsc->num_clocks = drv_data->num_clocks; 1131 gsc->variant = drv_data->variant[gsc->id]; 1132 gsc->pdev = pdev; 1133 1134 init_waitqueue_head(&gsc->irq_queue); 1135 spin_lock_init(&gsc->slock); 1136 mutex_init(&gsc->lock); 1137 1138 gsc->regs = devm_platform_ioremap_resource(pdev, 0); 1139 if (IS_ERR(gsc->regs)) 1140 return PTR_ERR(gsc->regs); 1141 1142 irq = platform_get_irq(pdev, 0); 1143 if (irq < 0) 1144 return irq; 1145 1146 for (i = 0; i < gsc->num_clocks; i++) { 1147 gsc->clock[i] = devm_clk_get(dev, drv_data->clk_names[i]); 1148 if (IS_ERR(gsc->clock[i])) { 1149 dev_err(dev, "failed to get clock: %s\n", 1150 drv_data->clk_names[i]); 1151 return PTR_ERR(gsc->clock[i]); 1152 } 1153 } 1154 1155 for (i = 0; i < gsc->num_clocks; i++) { 1156 ret = clk_prepare_enable(gsc->clock[i]); 1157 if (ret) { 1158 dev_err(dev, "clock prepare failed for clock: %s\n", 1159 drv_data->clk_names[i]); 1160 while (--i >= 0) 1161 clk_disable_unprepare(gsc->clock[i]); 1162 return ret; 1163 } 1164 } 1165 1166 ret = devm_request_irq(dev, irq, gsc_irq_handler, 1167 0, pdev->name, gsc); 1168 if (ret) { 1169 dev_err(dev, "failed to install irq (%d)\n", ret); 1170 goto err_clk; 1171 } 1172 1173 ret = v4l2_device_register(dev, &gsc->v4l2_dev); 1174 if (ret) 1175 goto err_clk; 1176 1177 ret = gsc_register_m2m_device(gsc); 1178 if (ret) 1179 goto err_v4l2; 1180 1181 platform_set_drvdata(pdev, gsc); 1182 1183 gsc_hw_set_sw_reset(gsc); 1184 gsc_wait_reset(gsc); 1185 1186 vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32)); 1187 1188 dev_dbg(dev, "gsc-%d registered successfully\n", gsc->id); 1189 1190 pm_runtime_set_active(dev); 1191 pm_runtime_enable(dev); 1192 1193 return 0; 1194 1195err_v4l2: 1196 v4l2_device_unregister(&gsc->v4l2_dev); 1197err_clk: 1198 for (i = gsc->num_clocks - 1; i >= 0; i--) 1199 clk_disable_unprepare(gsc->clock[i]); 1200 return ret; 1201} 1202 1203static void gsc_remove(struct platform_device *pdev) 1204{ 1205 struct gsc_dev *gsc = platform_get_drvdata(pdev); 1206 int i; 1207 1208 gsc_unregister_m2m_device(gsc); 1209 v4l2_device_unregister(&gsc->v4l2_dev); 1210 1211 vb2_dma_contig_clear_max_seg_size(&pdev->dev); 1212 1213 pm_runtime_disable(&pdev->dev); 1214 1215 if (!pm_runtime_status_suspended(&pdev->dev)) 1216 for (i = 0; i < gsc->num_clocks; i++) 1217 clk_disable_unprepare(gsc->clock[i]); 1218 1219 pm_runtime_set_suspended(&pdev->dev); 1220 1221 dev_dbg(&pdev->dev, "%s driver unloaded\n", pdev->name); 1222} 1223 1224#ifdef CONFIG_PM 1225static int gsc_m2m_suspend(struct gsc_dev *gsc) 1226{ 1227 unsigned long flags; 1228 int timeout; 1229 1230 spin_lock_irqsave(&gsc->slock, flags); 1231 if (!gsc_m2m_pending(gsc)) { 1232 spin_unlock_irqrestore(&gsc->slock, flags); 1233 return 0; 1234 } 1235 clear_bit(ST_M2M_SUSPENDED, &gsc->state); 1236 set_bit(ST_M2M_SUSPENDING, &gsc->state); 1237 spin_unlock_irqrestore(&gsc->slock, flags); 1238 1239 timeout = wait_event_timeout(gsc->irq_queue, 1240 test_bit(ST_M2M_SUSPENDED, &gsc->state), 1241 GSC_SHUTDOWN_TIMEOUT); 1242 1243 clear_bit(ST_M2M_SUSPENDING, &gsc->state); 1244 return timeout == 0 ? -EAGAIN : 0; 1245} 1246 1247static void gsc_m2m_resume(struct gsc_dev *gsc) 1248{ 1249 struct gsc_ctx *ctx; 1250 unsigned long flags; 1251 1252 spin_lock_irqsave(&gsc->slock, flags); 1253 /* Clear for full H/W setup in first run after resume */ 1254 ctx = gsc->m2m.ctx; 1255 gsc->m2m.ctx = NULL; 1256 spin_unlock_irqrestore(&gsc->slock, flags); 1257 1258 if (test_and_clear_bit(ST_M2M_SUSPENDED, &gsc->state)) 1259 gsc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR); 1260} 1261 1262static int gsc_runtime_resume(struct device *dev) 1263{ 1264 struct gsc_dev *gsc = dev_get_drvdata(dev); 1265 int ret = 0; 1266 int i; 1267 1268 pr_debug("gsc%d: state: 0x%lx\n", gsc->id, gsc->state); 1269 1270 for (i = 0; i < gsc->num_clocks; i++) { 1271 ret = clk_prepare_enable(gsc->clock[i]); 1272 if (ret) { 1273 while (--i >= 0) 1274 clk_disable_unprepare(gsc->clock[i]); 1275 return ret; 1276 } 1277 } 1278 1279 gsc_hw_set_sw_reset(gsc); 1280 gsc_wait_reset(gsc); 1281 gsc_m2m_resume(gsc); 1282 1283 return 0; 1284} 1285 1286static int gsc_runtime_suspend(struct device *dev) 1287{ 1288 struct gsc_dev *gsc = dev_get_drvdata(dev); 1289 int ret = 0; 1290 int i; 1291 1292 ret = gsc_m2m_suspend(gsc); 1293 if (ret) 1294 return ret; 1295 1296 for (i = gsc->num_clocks - 1; i >= 0; i--) 1297 clk_disable_unprepare(gsc->clock[i]); 1298 1299 pr_debug("gsc%d: state: 0x%lx\n", gsc->id, gsc->state); 1300 return ret; 1301} 1302#endif 1303 1304static const struct dev_pm_ops gsc_pm_ops = { 1305 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1306 pm_runtime_force_resume) 1307 SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL) 1308}; 1309 1310static struct platform_driver gsc_driver = { 1311 .probe = gsc_probe, 1312 .remove_new = gsc_remove, 1313 .driver = { 1314 .name = GSC_MODULE_NAME, 1315 .pm = &gsc_pm_ops, 1316 .of_match_table = exynos_gsc_match, 1317 } 1318}; 1319 1320module_platform_driver(gsc_driver); 1321 1322MODULE_AUTHOR("Hyunwong Kim <khw0178.kim@samsung.com>"); 1323MODULE_DESCRIPTION("Samsung EXYNOS5 Soc series G-Scaler driver"); 1324MODULE_LICENSE("GPL"); 1325