1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2019-2020 Pengutronix, Michael Tretter <kernel@pengutronix.de> 4 * 5 * Convert NAL units between raw byte sequence payloads (RBSP) and C structs. 6 * 7 * The conversion is defined in "ITU-T Rec. H.265 (02/2018) high efficiency 8 * video coding". Decoder drivers may use the parser to parse RBSP from 9 * encoded streams and configure the hardware, if the hardware is not able to 10 * parse RBSP itself. Encoder drivers may use the generator to generate the 11 * RBSP for VPS/SPS/PPS nal units and add them to the encoded stream if the 12 * hardware does not generate the units. 13 */ 14 15#include <linux/kernel.h> 16#include <linux/types.h> 17#include <linux/string.h> 18#include <linux/v4l2-controls.h> 19 20#include <linux/device.h> 21#include <linux/export.h> 22#include <linux/log2.h> 23 24#include "nal-hevc.h" 25#include "nal-rbsp.h" 26 27/* 28 * See Rec. ITU-T H.265 (02/2018) Table 7-1 - NAL unit type codes and NAL unit 29 * type classes 30 */ 31enum nal_unit_type { 32 VPS_NUT = 32, 33 SPS_NUT = 33, 34 PPS_NUT = 34, 35 FD_NUT = 38, 36}; 37 38static void nal_hevc_write_start_code_prefix(struct rbsp *rbsp) 39{ 40 u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8); 41 int i = 4; 42 43 if (DIV_ROUND_UP(rbsp->pos, 8) + i > rbsp->size) { 44 rbsp->error = -EINVAL; 45 return; 46 } 47 48 p[0] = 0x00; 49 p[1] = 0x00; 50 p[2] = 0x00; 51 p[3] = 0x01; 52 53 rbsp->pos += i * 8; 54} 55 56static void nal_hevc_read_start_code_prefix(struct rbsp *rbsp) 57{ 58 u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8); 59 int i = 4; 60 61 if (DIV_ROUND_UP(rbsp->pos, 8) + i > rbsp->size) { 62 rbsp->error = -EINVAL; 63 return; 64 } 65 66 if (p[0] != 0x00 || p[1] != 0x00 || p[2] != 0x00 || p[3] != 0x01) { 67 rbsp->error = -EINVAL; 68 return; 69 } 70 71 rbsp->pos += i * 8; 72} 73 74static void nal_hevc_write_filler_data(struct rbsp *rbsp) 75{ 76 u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8); 77 int i; 78 79 /* Keep 1 byte extra for terminating the NAL unit */ 80 i = rbsp->size - DIV_ROUND_UP(rbsp->pos, 8) - 1; 81 memset(p, 0xff, i); 82 rbsp->pos += i * 8; 83} 84 85static void nal_hevc_read_filler_data(struct rbsp *rbsp) 86{ 87 u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8); 88 89 while (*p == 0xff) { 90 if (DIV_ROUND_UP(rbsp->pos, 8) > rbsp->size) { 91 rbsp->error = -EINVAL; 92 return; 93 } 94 95 p++; 96 rbsp->pos += 8; 97 } 98} 99 100static void nal_hevc_rbsp_profile_tier_level(struct rbsp *rbsp, 101 struct nal_hevc_profile_tier_level *ptl) 102{ 103 unsigned int i; 104 unsigned int max_num_sub_layers_minus_1 = 0; 105 106 rbsp_bits(rbsp, 2, &ptl->general_profile_space); 107 rbsp_bit(rbsp, &ptl->general_tier_flag); 108 rbsp_bits(rbsp, 5, &ptl->general_profile_idc); 109 for (i = 0; i < 32; i++) 110 rbsp_bit(rbsp, &ptl->general_profile_compatibility_flag[i]); 111 rbsp_bit(rbsp, &ptl->general_progressive_source_flag); 112 rbsp_bit(rbsp, &ptl->general_interlaced_source_flag); 113 rbsp_bit(rbsp, &ptl->general_non_packed_constraint_flag); 114 rbsp_bit(rbsp, &ptl->general_frame_only_constraint_flag); 115 if (ptl->general_profile_idc == 4 || 116 ptl->general_profile_compatibility_flag[4] || 117 ptl->general_profile_idc == 5 || 118 ptl->general_profile_compatibility_flag[5] || 119 ptl->general_profile_idc == 6 || 120 ptl->general_profile_compatibility_flag[6] || 121 ptl->general_profile_idc == 7 || 122 ptl->general_profile_compatibility_flag[7] || 123 ptl->general_profile_idc == 8 || 124 ptl->general_profile_compatibility_flag[8] || 125 ptl->general_profile_idc == 9 || 126 ptl->general_profile_compatibility_flag[9] || 127 ptl->general_profile_idc == 10 || 128 ptl->general_profile_compatibility_flag[10]) { 129 rbsp_bit(rbsp, &ptl->general_max_12bit_constraint_flag); 130 rbsp_bit(rbsp, &ptl->general_max_10bit_constraint_flag); 131 rbsp_bit(rbsp, &ptl->general_max_8bit_constraint_flag); 132 rbsp_bit(rbsp, &ptl->general_max_422chroma_constraint_flag); 133 rbsp_bit(rbsp, &ptl->general_max_420chroma_constraint_flag); 134 rbsp_bit(rbsp, &ptl->general_max_monochrome_constraint_flag); 135 rbsp_bit(rbsp, &ptl->general_intra_constraint_flag); 136 rbsp_bit(rbsp, &ptl->general_one_picture_only_constraint_flag); 137 rbsp_bit(rbsp, &ptl->general_lower_bit_rate_constraint_flag); 138 if (ptl->general_profile_idc == 5 || 139 ptl->general_profile_compatibility_flag[5] || 140 ptl->general_profile_idc == 9 || 141 ptl->general_profile_compatibility_flag[9] || 142 ptl->general_profile_idc == 10 || 143 ptl->general_profile_compatibility_flag[10]) { 144 rbsp_bit(rbsp, &ptl->general_max_14bit_constraint_flag); 145 rbsp_bits(rbsp, 32, &ptl->general_reserved_zero_33bits); 146 rbsp_bits(rbsp, 33 - 32, &ptl->general_reserved_zero_33bits); 147 } else { 148 rbsp_bits(rbsp, 32, &ptl->general_reserved_zero_34bits); 149 rbsp_bits(rbsp, 34 - 2, &ptl->general_reserved_zero_34bits); 150 } 151 } else if (ptl->general_profile_idc == 2 || 152 ptl->general_profile_compatibility_flag[2]) { 153 rbsp_bits(rbsp, 7, &ptl->general_reserved_zero_7bits); 154 rbsp_bit(rbsp, &ptl->general_one_picture_only_constraint_flag); 155 rbsp_bits(rbsp, 32, &ptl->general_reserved_zero_35bits); 156 rbsp_bits(rbsp, 35 - 32, &ptl->general_reserved_zero_35bits); 157 } else { 158 rbsp_bits(rbsp, 32, &ptl->general_reserved_zero_43bits); 159 rbsp_bits(rbsp, 43 - 32, &ptl->general_reserved_zero_43bits); 160 } 161 if ((ptl->general_profile_idc >= 1 && ptl->general_profile_idc <= 5) || 162 ptl->general_profile_idc == 9 || 163 ptl->general_profile_compatibility_flag[1] || 164 ptl->general_profile_compatibility_flag[2] || 165 ptl->general_profile_compatibility_flag[3] || 166 ptl->general_profile_compatibility_flag[4] || 167 ptl->general_profile_compatibility_flag[5] || 168 ptl->general_profile_compatibility_flag[9]) 169 rbsp_bit(rbsp, &ptl->general_inbld_flag); 170 else 171 rbsp_bit(rbsp, &ptl->general_reserved_zero_bit); 172 rbsp_bits(rbsp, 8, &ptl->general_level_idc); 173 if (max_num_sub_layers_minus_1 > 0) 174 rbsp_unsupported(rbsp); 175} 176 177static void nal_hevc_rbsp_vps(struct rbsp *rbsp, struct nal_hevc_vps *vps) 178{ 179 unsigned int i, j; 180 unsigned int reserved_0xffff_16bits = 0xffff; 181 182 rbsp_bits(rbsp, 4, &vps->video_parameter_set_id); 183 rbsp_bit(rbsp, &vps->base_layer_internal_flag); 184 rbsp_bit(rbsp, &vps->base_layer_available_flag); 185 rbsp_bits(rbsp, 6, &vps->max_layers_minus1); 186 rbsp_bits(rbsp, 3, &vps->max_sub_layers_minus1); 187 rbsp_bits(rbsp, 1, &vps->temporal_id_nesting_flag); 188 rbsp_bits(rbsp, 16, &reserved_0xffff_16bits); 189 nal_hevc_rbsp_profile_tier_level(rbsp, &vps->profile_tier_level); 190 rbsp_bit(rbsp, &vps->sub_layer_ordering_info_present_flag); 191 for (i = vps->sub_layer_ordering_info_present_flag ? 0 : vps->max_sub_layers_minus1; 192 i <= vps->max_sub_layers_minus1; i++) { 193 rbsp_uev(rbsp, &vps->max_dec_pic_buffering_minus1[i]); 194 rbsp_uev(rbsp, &vps->max_num_reorder_pics[i]); 195 rbsp_uev(rbsp, &vps->max_latency_increase_plus1[i]); 196 } 197 rbsp_bits(rbsp, 6, &vps->max_layer_id); 198 rbsp_uev(rbsp, &vps->num_layer_sets_minus1); 199 for (i = 0; i <= vps->num_layer_sets_minus1; i++) 200 for (j = 0; j <= vps->max_layer_id; j++) 201 rbsp_bit(rbsp, &vps->layer_id_included_flag[i][j]); 202 rbsp_bit(rbsp, &vps->timing_info_present_flag); 203 if (vps->timing_info_present_flag) 204 rbsp_unsupported(rbsp); 205 rbsp_bit(rbsp, &vps->extension_flag); 206 if (vps->extension_flag) 207 rbsp_unsupported(rbsp); 208} 209 210static void nal_hevc_rbsp_sub_layer_hrd_parameters(struct rbsp *rbsp, 211 struct nal_hevc_sub_layer_hrd_parameters *hrd) 212{ 213 unsigned int i; 214 unsigned int cpb_cnt = 1; 215 216 for (i = 0; i < cpb_cnt; i++) { 217 rbsp_uev(rbsp, &hrd->bit_rate_value_minus1[i]); 218 rbsp_uev(rbsp, &hrd->cpb_size_value_minus1[i]); 219 rbsp_bit(rbsp, &hrd->cbr_flag[i]); 220 } 221} 222 223static void nal_hevc_rbsp_hrd_parameters(struct rbsp *rbsp, 224 struct nal_hevc_hrd_parameters *hrd) 225{ 226 unsigned int i; 227 unsigned int max_num_sub_layers_minus_1 = 0; 228 229 rbsp_bit(rbsp, &hrd->nal_hrd_parameters_present_flag); 230 rbsp_bit(rbsp, &hrd->vcl_hrd_parameters_present_flag); 231 if (hrd->nal_hrd_parameters_present_flag || hrd->vcl_hrd_parameters_present_flag) { 232 rbsp_bit(rbsp, &hrd->sub_pic_hrd_params_present_flag); 233 if (hrd->sub_pic_hrd_params_present_flag) { 234 rbsp_bits(rbsp, 8, &hrd->tick_divisor_minus2); 235 rbsp_bits(rbsp, 5, &hrd->du_cpb_removal_delay_increment_length_minus1); 236 rbsp_bit(rbsp, &hrd->sub_pic_cpb_params_in_pic_timing_sei_flag); 237 rbsp_bits(rbsp, 5, &hrd->dpb_output_delay_du_length_minus1); 238 } 239 rbsp_bits(rbsp, 4, &hrd->bit_rate_scale); 240 rbsp_bits(rbsp, 4, &hrd->cpb_size_scale); 241 if (hrd->sub_pic_hrd_params_present_flag) 242 rbsp_bits(rbsp, 4, &hrd->cpb_size_du_scale); 243 rbsp_bits(rbsp, 5, &hrd->initial_cpb_removal_delay_length_minus1); 244 rbsp_bits(rbsp, 5, &hrd->au_cpb_removal_delay_length_minus1); 245 rbsp_bits(rbsp, 5, &hrd->dpb_output_delay_length_minus1); 246 } 247 for (i = 0; i <= max_num_sub_layers_minus_1; i++) { 248 rbsp_bit(rbsp, &hrd->fixed_pic_rate_general_flag[i]); 249 if (!hrd->fixed_pic_rate_general_flag[i]) 250 rbsp_bit(rbsp, &hrd->fixed_pic_rate_within_cvs_flag[i]); 251 if (hrd->fixed_pic_rate_within_cvs_flag[i]) 252 rbsp_uev(rbsp, &hrd->elemental_duration_in_tc_minus1[i]); 253 else 254 rbsp_bit(rbsp, &hrd->low_delay_hrd_flag[i]); 255 if (!hrd->low_delay_hrd_flag[i]) 256 rbsp_uev(rbsp, &hrd->cpb_cnt_minus1[i]); 257 if (hrd->nal_hrd_parameters_present_flag) 258 nal_hevc_rbsp_sub_layer_hrd_parameters(rbsp, &hrd->vcl_hrd[i]); 259 if (hrd->vcl_hrd_parameters_present_flag) 260 nal_hevc_rbsp_sub_layer_hrd_parameters(rbsp, &hrd->vcl_hrd[i]); 261 } 262} 263 264static void nal_hevc_rbsp_vui_parameters(struct rbsp *rbsp, 265 struct nal_hevc_vui_parameters *vui) 266{ 267 if (!vui) { 268 rbsp->error = -EINVAL; 269 return; 270 } 271 272 rbsp_bit(rbsp, &vui->aspect_ratio_info_present_flag); 273 if (vui->aspect_ratio_info_present_flag) { 274 rbsp_bits(rbsp, 8, &vui->aspect_ratio_idc); 275 if (vui->aspect_ratio_idc == 255) { 276 rbsp_bits(rbsp, 16, &vui->sar_width); 277 rbsp_bits(rbsp, 16, &vui->sar_height); 278 } 279 } 280 281 rbsp_bit(rbsp, &vui->overscan_info_present_flag); 282 if (vui->overscan_info_present_flag) 283 rbsp_bit(rbsp, &vui->overscan_appropriate_flag); 284 285 rbsp_bit(rbsp, &vui->video_signal_type_present_flag); 286 if (vui->video_signal_type_present_flag) { 287 rbsp_bits(rbsp, 3, &vui->video_format); 288 rbsp_bit(rbsp, &vui->video_full_range_flag); 289 290 rbsp_bit(rbsp, &vui->colour_description_present_flag); 291 if (vui->colour_description_present_flag) { 292 rbsp_bits(rbsp, 8, &vui->colour_primaries); 293 rbsp_bits(rbsp, 8, &vui->transfer_characteristics); 294 rbsp_bits(rbsp, 8, &vui->matrix_coeffs); 295 } 296 } 297 298 rbsp_bit(rbsp, &vui->chroma_loc_info_present_flag); 299 if (vui->chroma_loc_info_present_flag) { 300 rbsp_uev(rbsp, &vui->chroma_sample_loc_type_top_field); 301 rbsp_uev(rbsp, &vui->chroma_sample_loc_type_bottom_field); 302 } 303 304 rbsp_bit(rbsp, &vui->neutral_chroma_indication_flag); 305 rbsp_bit(rbsp, &vui->field_seq_flag); 306 rbsp_bit(rbsp, &vui->frame_field_info_present_flag); 307 rbsp_bit(rbsp, &vui->default_display_window_flag); 308 if (vui->default_display_window_flag) { 309 rbsp_uev(rbsp, &vui->def_disp_win_left_offset); 310 rbsp_uev(rbsp, &vui->def_disp_win_right_offset); 311 rbsp_uev(rbsp, &vui->def_disp_win_top_offset); 312 rbsp_uev(rbsp, &vui->def_disp_win_bottom_offset); 313 } 314 315 rbsp_bit(rbsp, &vui->vui_timing_info_present_flag); 316 if (vui->vui_timing_info_present_flag) { 317 rbsp_bits(rbsp, 32, &vui->vui_num_units_in_tick); 318 rbsp_bits(rbsp, 32, &vui->vui_time_scale); 319 rbsp_bit(rbsp, &vui->vui_poc_proportional_to_timing_flag); 320 if (vui->vui_poc_proportional_to_timing_flag) 321 rbsp_uev(rbsp, &vui->vui_num_ticks_poc_diff_one_minus1); 322 rbsp_bit(rbsp, &vui->vui_hrd_parameters_present_flag); 323 if (vui->vui_hrd_parameters_present_flag) 324 nal_hevc_rbsp_hrd_parameters(rbsp, &vui->nal_hrd_parameters); 325 } 326 327 rbsp_bit(rbsp, &vui->bitstream_restriction_flag); 328 if (vui->bitstream_restriction_flag) { 329 rbsp_bit(rbsp, &vui->tiles_fixed_structure_flag); 330 rbsp_bit(rbsp, &vui->motion_vectors_over_pic_boundaries_flag); 331 rbsp_bit(rbsp, &vui->restricted_ref_pic_lists_flag); 332 rbsp_uev(rbsp, &vui->min_spatial_segmentation_idc); 333 rbsp_uev(rbsp, &vui->max_bytes_per_pic_denom); 334 rbsp_uev(rbsp, &vui->max_bits_per_min_cu_denom); 335 rbsp_uev(rbsp, &vui->log2_max_mv_length_horizontal); 336 rbsp_uev(rbsp, &vui->log2_max_mv_length_vertical); 337 } 338} 339 340static void nal_hevc_rbsp_sps(struct rbsp *rbsp, struct nal_hevc_sps *sps) 341{ 342 unsigned int i; 343 344 rbsp_bits(rbsp, 4, &sps->video_parameter_set_id); 345 rbsp_bits(rbsp, 3, &sps->max_sub_layers_minus1); 346 rbsp_bit(rbsp, &sps->temporal_id_nesting_flag); 347 nal_hevc_rbsp_profile_tier_level(rbsp, &sps->profile_tier_level); 348 rbsp_uev(rbsp, &sps->seq_parameter_set_id); 349 350 rbsp_uev(rbsp, &sps->chroma_format_idc); 351 if (sps->chroma_format_idc == 3) 352 rbsp_bit(rbsp, &sps->separate_colour_plane_flag); 353 rbsp_uev(rbsp, &sps->pic_width_in_luma_samples); 354 rbsp_uev(rbsp, &sps->pic_height_in_luma_samples); 355 rbsp_bit(rbsp, &sps->conformance_window_flag); 356 if (sps->conformance_window_flag) { 357 rbsp_uev(rbsp, &sps->conf_win_left_offset); 358 rbsp_uev(rbsp, &sps->conf_win_right_offset); 359 rbsp_uev(rbsp, &sps->conf_win_top_offset); 360 rbsp_uev(rbsp, &sps->conf_win_bottom_offset); 361 } 362 rbsp_uev(rbsp, &sps->bit_depth_luma_minus8); 363 rbsp_uev(rbsp, &sps->bit_depth_chroma_minus8); 364 365 rbsp_uev(rbsp, &sps->log2_max_pic_order_cnt_lsb_minus4); 366 367 rbsp_bit(rbsp, &sps->sub_layer_ordering_info_present_flag); 368 for (i = (sps->sub_layer_ordering_info_present_flag ? 0 : sps->max_sub_layers_minus1); 369 i <= sps->max_sub_layers_minus1; i++) { 370 rbsp_uev(rbsp, &sps->max_dec_pic_buffering_minus1[i]); 371 rbsp_uev(rbsp, &sps->max_num_reorder_pics[i]); 372 rbsp_uev(rbsp, &sps->max_latency_increase_plus1[i]); 373 } 374 rbsp_uev(rbsp, &sps->log2_min_luma_coding_block_size_minus3); 375 rbsp_uev(rbsp, &sps->log2_diff_max_min_luma_coding_block_size); 376 rbsp_uev(rbsp, &sps->log2_min_luma_transform_block_size_minus2); 377 rbsp_uev(rbsp, &sps->log2_diff_max_min_luma_transform_block_size); 378 rbsp_uev(rbsp, &sps->max_transform_hierarchy_depth_inter); 379 rbsp_uev(rbsp, &sps->max_transform_hierarchy_depth_intra); 380 381 rbsp_bit(rbsp, &sps->scaling_list_enabled_flag); 382 if (sps->scaling_list_enabled_flag) 383 rbsp_unsupported(rbsp); 384 385 rbsp_bit(rbsp, &sps->amp_enabled_flag); 386 rbsp_bit(rbsp, &sps->sample_adaptive_offset_enabled_flag); 387 rbsp_bit(rbsp, &sps->pcm_enabled_flag); 388 if (sps->pcm_enabled_flag) { 389 rbsp_bits(rbsp, 4, &sps->pcm_sample_bit_depth_luma_minus1); 390 rbsp_bits(rbsp, 4, &sps->pcm_sample_bit_depth_chroma_minus1); 391 rbsp_uev(rbsp, &sps->log2_min_pcm_luma_coding_block_size_minus3); 392 rbsp_uev(rbsp, &sps->log2_diff_max_min_pcm_luma_coding_block_size); 393 rbsp_bit(rbsp, &sps->pcm_loop_filter_disabled_flag); 394 } 395 396 rbsp_uev(rbsp, &sps->num_short_term_ref_pic_sets); 397 if (sps->num_short_term_ref_pic_sets > 0) 398 rbsp_unsupported(rbsp); 399 400 rbsp_bit(rbsp, &sps->long_term_ref_pics_present_flag); 401 if (sps->long_term_ref_pics_present_flag) 402 rbsp_unsupported(rbsp); 403 404 rbsp_bit(rbsp, &sps->sps_temporal_mvp_enabled_flag); 405 rbsp_bit(rbsp, &sps->strong_intra_smoothing_enabled_flag); 406 rbsp_bit(rbsp, &sps->vui_parameters_present_flag); 407 if (sps->vui_parameters_present_flag) 408 nal_hevc_rbsp_vui_parameters(rbsp, &sps->vui); 409 410 rbsp_bit(rbsp, &sps->extension_present_flag); 411 if (sps->extension_present_flag) { 412 rbsp_bit(rbsp, &sps->sps_range_extension_flag); 413 rbsp_bit(rbsp, &sps->sps_multilayer_extension_flag); 414 rbsp_bit(rbsp, &sps->sps_3d_extension_flag); 415 rbsp_bit(rbsp, &sps->sps_scc_extension_flag); 416 rbsp_bits(rbsp, 5, &sps->sps_extension_4bits); 417 } 418 if (sps->sps_range_extension_flag) 419 rbsp_unsupported(rbsp); 420 if (sps->sps_multilayer_extension_flag) 421 rbsp_unsupported(rbsp); 422 if (sps->sps_3d_extension_flag) 423 rbsp_unsupported(rbsp); 424 if (sps->sps_scc_extension_flag) 425 rbsp_unsupported(rbsp); 426 if (sps->sps_extension_4bits) 427 rbsp_unsupported(rbsp); 428} 429 430static void nal_hevc_rbsp_pps(struct rbsp *rbsp, struct nal_hevc_pps *pps) 431{ 432 unsigned int i; 433 434 rbsp_uev(rbsp, &pps->pps_pic_parameter_set_id); 435 rbsp_uev(rbsp, &pps->pps_seq_parameter_set_id); 436 rbsp_bit(rbsp, &pps->dependent_slice_segments_enabled_flag); 437 rbsp_bit(rbsp, &pps->output_flag_present_flag); 438 rbsp_bits(rbsp, 3, &pps->num_extra_slice_header_bits); 439 rbsp_bit(rbsp, &pps->sign_data_hiding_enabled_flag); 440 rbsp_bit(rbsp, &pps->cabac_init_present_flag); 441 rbsp_uev(rbsp, &pps->num_ref_idx_l0_default_active_minus1); 442 rbsp_uev(rbsp, &pps->num_ref_idx_l1_default_active_minus1); 443 rbsp_sev(rbsp, &pps->init_qp_minus26); 444 rbsp_bit(rbsp, &pps->constrained_intra_pred_flag); 445 rbsp_bit(rbsp, &pps->transform_skip_enabled_flag); 446 rbsp_bit(rbsp, &pps->cu_qp_delta_enabled_flag); 447 if (pps->cu_qp_delta_enabled_flag) 448 rbsp_uev(rbsp, &pps->diff_cu_qp_delta_depth); 449 rbsp_sev(rbsp, &pps->pps_cb_qp_offset); 450 rbsp_sev(rbsp, &pps->pps_cr_qp_offset); 451 rbsp_bit(rbsp, &pps->pps_slice_chroma_qp_offsets_present_flag); 452 rbsp_bit(rbsp, &pps->weighted_pred_flag); 453 rbsp_bit(rbsp, &pps->weighted_bipred_flag); 454 rbsp_bit(rbsp, &pps->transquant_bypass_enabled_flag); 455 rbsp_bit(rbsp, &pps->tiles_enabled_flag); 456 rbsp_bit(rbsp, &pps->entropy_coding_sync_enabled_flag); 457 if (pps->tiles_enabled_flag) { 458 rbsp_uev(rbsp, &pps->num_tile_columns_minus1); 459 rbsp_uev(rbsp, &pps->num_tile_rows_minus1); 460 rbsp_bit(rbsp, &pps->uniform_spacing_flag); 461 if (!pps->uniform_spacing_flag) { 462 for (i = 0; i < pps->num_tile_columns_minus1; i++) 463 rbsp_uev(rbsp, &pps->column_width_minus1[i]); 464 for (i = 0; i < pps->num_tile_rows_minus1; i++) 465 rbsp_uev(rbsp, &pps->row_height_minus1[i]); 466 } 467 rbsp_bit(rbsp, &pps->loop_filter_across_tiles_enabled_flag); 468 } 469 rbsp_bit(rbsp, &pps->pps_loop_filter_across_slices_enabled_flag); 470 rbsp_bit(rbsp, &pps->deblocking_filter_control_present_flag); 471 if (pps->deblocking_filter_control_present_flag) { 472 rbsp_bit(rbsp, &pps->deblocking_filter_override_enabled_flag); 473 rbsp_bit(rbsp, &pps->pps_deblocking_filter_disabled_flag); 474 if (!pps->pps_deblocking_filter_disabled_flag) { 475 rbsp_sev(rbsp, &pps->pps_beta_offset_div2); 476 rbsp_sev(rbsp, &pps->pps_tc_offset_div2); 477 } 478 } 479 rbsp_bit(rbsp, &pps->pps_scaling_list_data_present_flag); 480 if (pps->pps_scaling_list_data_present_flag) 481 rbsp_unsupported(rbsp); 482 rbsp_bit(rbsp, &pps->lists_modification_present_flag); 483 rbsp_uev(rbsp, &pps->log2_parallel_merge_level_minus2); 484 rbsp_bit(rbsp, &pps->slice_segment_header_extension_present_flag); 485 rbsp_bit(rbsp, &pps->pps_extension_present_flag); 486 if (pps->pps_extension_present_flag) { 487 rbsp_bit(rbsp, &pps->pps_range_extension_flag); 488 rbsp_bit(rbsp, &pps->pps_multilayer_extension_flag); 489 rbsp_bit(rbsp, &pps->pps_3d_extension_flag); 490 rbsp_bit(rbsp, &pps->pps_scc_extension_flag); 491 rbsp_bits(rbsp, 4, &pps->pps_extension_4bits); 492 } 493 if (pps->pps_range_extension_flag) 494 rbsp_unsupported(rbsp); 495 if (pps->pps_multilayer_extension_flag) 496 rbsp_unsupported(rbsp); 497 if (pps->pps_3d_extension_flag) 498 rbsp_unsupported(rbsp); 499 if (pps->pps_scc_extension_flag) 500 rbsp_unsupported(rbsp); 501 if (pps->pps_extension_4bits) 502 rbsp_unsupported(rbsp); 503} 504 505/** 506 * nal_hevc_write_vps() - Write PPS NAL unit into RBSP format 507 * @dev: device pointer 508 * @dest: the buffer that is filled with RBSP data 509 * @n: maximum size of @dest in bytes 510 * @vps: &struct nal_hevc_vps to convert to RBSP 511 * 512 * Convert @vps to RBSP data and write it into @dest. 513 * 514 * The size of the VPS NAL unit is not known in advance and this function will 515 * fail, if @dest does not hold sufficient space for the VPS NAL unit. 516 * 517 * Return: number of bytes written to @dest or negative error code 518 */ 519ssize_t nal_hevc_write_vps(const struct device *dev, 520 void *dest, size_t n, struct nal_hevc_vps *vps) 521{ 522 struct rbsp rbsp; 523 unsigned int forbidden_zero_bit = 0; 524 unsigned int nal_unit_type = VPS_NUT; 525 unsigned int nuh_layer_id = 0; 526 unsigned int nuh_temporal_id_plus1 = 1; 527 528 if (!dest) 529 return -EINVAL; 530 531 rbsp_init(&rbsp, dest, n, &write); 532 533 nal_hevc_write_start_code_prefix(&rbsp); 534 535 /* NAL unit header */ 536 rbsp_bit(&rbsp, &forbidden_zero_bit); 537 rbsp_bits(&rbsp, 6, &nal_unit_type); 538 rbsp_bits(&rbsp, 6, &nuh_layer_id); 539 rbsp_bits(&rbsp, 3, &nuh_temporal_id_plus1); 540 541 nal_hevc_rbsp_vps(&rbsp, vps); 542 543 rbsp_trailing_bits(&rbsp); 544 545 if (rbsp.error) 546 return rbsp.error; 547 548 return DIV_ROUND_UP(rbsp.pos, 8); 549} 550EXPORT_SYMBOL_GPL(nal_hevc_write_vps); 551 552/** 553 * nal_hevc_read_vps() - Read VPS NAL unit from RBSP format 554 * @dev: device pointer 555 * @vps: the &struct nal_hevc_vps to fill from the RBSP data 556 * @src: the buffer that contains the RBSP data 557 * @n: size of @src in bytes 558 * 559 * Read RBSP data from @src and use it to fill @vps. 560 * 561 * Return: number of bytes read from @src or negative error code 562 */ 563ssize_t nal_hevc_read_vps(const struct device *dev, 564 struct nal_hevc_vps *vps, void *src, size_t n) 565{ 566 struct rbsp rbsp; 567 unsigned int forbidden_zero_bit; 568 unsigned int nal_unit_type; 569 unsigned int nuh_layer_id; 570 unsigned int nuh_temporal_id_plus1; 571 572 if (!src) 573 return -EINVAL; 574 575 rbsp_init(&rbsp, src, n, &read); 576 577 nal_hevc_read_start_code_prefix(&rbsp); 578 579 rbsp_bit(&rbsp, &forbidden_zero_bit); 580 rbsp_bits(&rbsp, 6, &nal_unit_type); 581 rbsp_bits(&rbsp, 6, &nuh_layer_id); 582 rbsp_bits(&rbsp, 3, &nuh_temporal_id_plus1); 583 584 if (rbsp.error || 585 forbidden_zero_bit != 0 || 586 nal_unit_type != VPS_NUT) 587 return -EINVAL; 588 589 nal_hevc_rbsp_vps(&rbsp, vps); 590 591 rbsp_trailing_bits(&rbsp); 592 593 if (rbsp.error) 594 return rbsp.error; 595 596 return DIV_ROUND_UP(rbsp.pos, 8); 597} 598EXPORT_SYMBOL_GPL(nal_hevc_read_vps); 599 600/** 601 * nal_hevc_write_sps() - Write SPS NAL unit into RBSP format 602 * @dev: device pointer 603 * @dest: the buffer that is filled with RBSP data 604 * @n: maximum size of @dest in bytes 605 * @sps: &struct nal_hevc_sps to convert to RBSP 606 * 607 * Convert @sps to RBSP data and write it into @dest. 608 * 609 * The size of the SPS NAL unit is not known in advance and this function will 610 * fail, if @dest does not hold sufficient space for the SPS NAL unit. 611 * 612 * Return: number of bytes written to @dest or negative error code 613 */ 614ssize_t nal_hevc_write_sps(const struct device *dev, 615 void *dest, size_t n, struct nal_hevc_sps *sps) 616{ 617 struct rbsp rbsp; 618 unsigned int forbidden_zero_bit = 0; 619 unsigned int nal_unit_type = SPS_NUT; 620 unsigned int nuh_layer_id = 0; 621 unsigned int nuh_temporal_id_plus1 = 1; 622 623 if (!dest) 624 return -EINVAL; 625 626 rbsp_init(&rbsp, dest, n, &write); 627 628 nal_hevc_write_start_code_prefix(&rbsp); 629 630 /* NAL unit header */ 631 rbsp_bit(&rbsp, &forbidden_zero_bit); 632 rbsp_bits(&rbsp, 6, &nal_unit_type); 633 rbsp_bits(&rbsp, 6, &nuh_layer_id); 634 rbsp_bits(&rbsp, 3, &nuh_temporal_id_plus1); 635 636 nal_hevc_rbsp_sps(&rbsp, sps); 637 638 rbsp_trailing_bits(&rbsp); 639 640 if (rbsp.error) 641 return rbsp.error; 642 643 return DIV_ROUND_UP(rbsp.pos, 8); 644} 645EXPORT_SYMBOL_GPL(nal_hevc_write_sps); 646 647/** 648 * nal_hevc_read_sps() - Read SPS NAL unit from RBSP format 649 * @dev: device pointer 650 * @sps: the &struct nal_hevc_sps to fill from the RBSP data 651 * @src: the buffer that contains the RBSP data 652 * @n: size of @src in bytes 653 * 654 * Read RBSP data from @src and use it to fill @sps. 655 * 656 * Return: number of bytes read from @src or negative error code 657 */ 658ssize_t nal_hevc_read_sps(const struct device *dev, 659 struct nal_hevc_sps *sps, void *src, size_t n) 660{ 661 struct rbsp rbsp; 662 unsigned int forbidden_zero_bit; 663 unsigned int nal_unit_type; 664 unsigned int nuh_layer_id; 665 unsigned int nuh_temporal_id_plus1; 666 667 if (!src) 668 return -EINVAL; 669 670 rbsp_init(&rbsp, src, n, &read); 671 672 nal_hevc_read_start_code_prefix(&rbsp); 673 674 rbsp_bit(&rbsp, &forbidden_zero_bit); 675 rbsp_bits(&rbsp, 6, &nal_unit_type); 676 rbsp_bits(&rbsp, 6, &nuh_layer_id); 677 rbsp_bits(&rbsp, 3, &nuh_temporal_id_plus1); 678 679 if (rbsp.error || 680 forbidden_zero_bit != 0 || 681 nal_unit_type != SPS_NUT) 682 return -EINVAL; 683 684 nal_hevc_rbsp_sps(&rbsp, sps); 685 686 rbsp_trailing_bits(&rbsp); 687 688 if (rbsp.error) 689 return rbsp.error; 690 691 return DIV_ROUND_UP(rbsp.pos, 8); 692} 693EXPORT_SYMBOL_GPL(nal_hevc_read_sps); 694 695/** 696 * nal_hevc_write_pps() - Write PPS NAL unit into RBSP format 697 * @dev: device pointer 698 * @dest: the buffer that is filled with RBSP data 699 * @n: maximum size of @dest in bytes 700 * @pps: &struct nal_hevc_pps to convert to RBSP 701 * 702 * Convert @pps to RBSP data and write it into @dest. 703 * 704 * The size of the PPS NAL unit is not known in advance and this function will 705 * fail, if @dest does not hold sufficient space for the PPS NAL unit. 706 * 707 * Return: number of bytes written to @dest or negative error code 708 */ 709ssize_t nal_hevc_write_pps(const struct device *dev, 710 void *dest, size_t n, struct nal_hevc_pps *pps) 711{ 712 struct rbsp rbsp; 713 unsigned int forbidden_zero_bit = 0; 714 unsigned int nal_unit_type = PPS_NUT; 715 unsigned int nuh_layer_id = 0; 716 unsigned int nuh_temporal_id_plus1 = 1; 717 718 if (!dest) 719 return -EINVAL; 720 721 rbsp_init(&rbsp, dest, n, &write); 722 723 nal_hevc_write_start_code_prefix(&rbsp); 724 725 /* NAL unit header */ 726 rbsp_bit(&rbsp, &forbidden_zero_bit); 727 rbsp_bits(&rbsp, 6, &nal_unit_type); 728 rbsp_bits(&rbsp, 6, &nuh_layer_id); 729 rbsp_bits(&rbsp, 3, &nuh_temporal_id_plus1); 730 731 nal_hevc_rbsp_pps(&rbsp, pps); 732 733 rbsp_trailing_bits(&rbsp); 734 735 if (rbsp.error) 736 return rbsp.error; 737 738 return DIV_ROUND_UP(rbsp.pos, 8); 739} 740EXPORT_SYMBOL_GPL(nal_hevc_write_pps); 741 742/** 743 * nal_hevc_read_pps() - Read PPS NAL unit from RBSP format 744 * @dev: device pointer 745 * @pps: the &struct nal_hevc_pps to fill from the RBSP data 746 * @src: the buffer that contains the RBSP data 747 * @n: size of @src in bytes 748 * 749 * Read RBSP data from @src and use it to fill @pps. 750 * 751 * Return: number of bytes read from @src or negative error code 752 */ 753ssize_t nal_hevc_read_pps(const struct device *dev, 754 struct nal_hevc_pps *pps, void *src, size_t n) 755{ 756 struct rbsp rbsp; 757 unsigned int forbidden_zero_bit; 758 unsigned int nal_unit_type; 759 unsigned int nuh_layer_id; 760 unsigned int nuh_temporal_id_plus1; 761 762 if (!src) 763 return -EINVAL; 764 765 rbsp_init(&rbsp, src, n, &read); 766 767 nal_hevc_read_start_code_prefix(&rbsp); 768 769 /* NAL unit header */ 770 rbsp_bit(&rbsp, &forbidden_zero_bit); 771 rbsp_bits(&rbsp, 6, &nal_unit_type); 772 rbsp_bits(&rbsp, 6, &nuh_layer_id); 773 rbsp_bits(&rbsp, 3, &nuh_temporal_id_plus1); 774 775 nal_hevc_rbsp_pps(&rbsp, pps); 776 777 rbsp_trailing_bits(&rbsp); 778 779 if (rbsp.error) 780 return rbsp.error; 781 782 return DIV_ROUND_UP(rbsp.pos, 8); 783} 784EXPORT_SYMBOL_GPL(nal_hevc_read_pps); 785 786/** 787 * nal_hevc_write_filler() - Write filler data RBSP 788 * @dev: device pointer 789 * @dest: buffer to fill with filler data 790 * @n: size of the buffer to fill with filler data 791 * 792 * Write a filler data RBSP to @dest with a size of @n bytes and return the 793 * number of written filler data bytes. 794 * 795 * Use this function to generate dummy data in an RBSP data stream that can be 796 * safely ignored by hevc decoders. 797 * 798 * The RBSP format of the filler data is specified in Rec. ITU-T H.265 799 * (02/2018) 7.3.2.8 Filler data RBSP syntax. 800 * 801 * Return: number of filler data bytes (including marker) or negative error 802 */ 803ssize_t nal_hevc_write_filler(const struct device *dev, void *dest, size_t n) 804{ 805 struct rbsp rbsp; 806 unsigned int forbidden_zero_bit = 0; 807 unsigned int nal_unit_type = FD_NUT; 808 unsigned int nuh_layer_id = 0; 809 unsigned int nuh_temporal_id_plus1 = 1; 810 811 if (!dest) 812 return -EINVAL; 813 814 rbsp_init(&rbsp, dest, n, &write); 815 816 nal_hevc_write_start_code_prefix(&rbsp); 817 818 rbsp_bit(&rbsp, &forbidden_zero_bit); 819 rbsp_bits(&rbsp, 6, &nal_unit_type); 820 rbsp_bits(&rbsp, 6, &nuh_layer_id); 821 rbsp_bits(&rbsp, 3, &nuh_temporal_id_plus1); 822 823 nal_hevc_write_filler_data(&rbsp); 824 rbsp_trailing_bits(&rbsp); 825 826 if (rbsp.error) 827 return rbsp.error; 828 829 return DIV_ROUND_UP(rbsp.pos, 8); 830} 831EXPORT_SYMBOL_GPL(nal_hevc_write_filler); 832 833/** 834 * nal_hevc_read_filler() - Read filler data RBSP 835 * @dev: device pointer 836 * @src: buffer with RBSP data that is read 837 * @n: maximum size of src that shall be read 838 * 839 * Read a filler data RBSP from @src up to a maximum size of @n bytes and 840 * return the size of the filler data in bytes including the marker. 841 * 842 * This function is used to parse filler data and skip the respective bytes in 843 * the RBSP data. 844 * 845 * The RBSP format of the filler data is specified in Rec. ITU-T H.265 846 * (02/2018) 7.3.2.8 Filler data RBSP syntax. 847 * 848 * Return: number of filler data bytes (including marker) or negative error 849 */ 850ssize_t nal_hevc_read_filler(const struct device *dev, void *src, size_t n) 851{ 852 struct rbsp rbsp; 853 unsigned int forbidden_zero_bit; 854 unsigned int nal_unit_type; 855 unsigned int nuh_layer_id; 856 unsigned int nuh_temporal_id_plus1; 857 858 if (!src) 859 return -EINVAL; 860 861 rbsp_init(&rbsp, src, n, &read); 862 863 nal_hevc_read_start_code_prefix(&rbsp); 864 865 rbsp_bit(&rbsp, &forbidden_zero_bit); 866 rbsp_bits(&rbsp, 6, &nal_unit_type); 867 rbsp_bits(&rbsp, 6, &nuh_layer_id); 868 rbsp_bits(&rbsp, 3, &nuh_temporal_id_plus1); 869 870 if (rbsp.error) 871 return rbsp.error; 872 if (forbidden_zero_bit != 0 || 873 nal_unit_type != FD_NUT) 874 return -EINVAL; 875 876 nal_hevc_read_filler_data(&rbsp); 877 rbsp_trailing_bits(&rbsp); 878 879 if (rbsp.error) 880 return rbsp.error; 881 882 return DIV_ROUND_UP(rbsp.pos, 8); 883} 884EXPORT_SYMBOL_GPL(nal_hevc_read_filler); 885