1/*
2 * Copyright (c) 2012 Intel Corporation.  All rights reserved.
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses.  You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 *     Redistribution and use in source and binary forms, with or
13 *     without modification, are permitted provided that the following
14 *     conditions are met:
15 *
16 *      - Redistributions of source code must retain the above
17 *        copyright notice, this list of conditions and the following
18 *        disclaimer.
19 *
20 *      - Redistributions in binary form must reproduce the above
21 *        copyright notice, this list of conditions and the following
22 *        disclaimer in the documentation and/or other materials
23 *        provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34#ifndef _QIB_MAD_H
35#define _QIB_MAD_H
36
37#include <rdma/ib_pma.h>
38
39#define IB_SMP_UNSUP_VERSION \
40cpu_to_be16(IB_MGMT_MAD_STATUS_BAD_VERSION)
41
42#define IB_SMP_UNSUP_METHOD \
43cpu_to_be16(IB_MGMT_MAD_STATUS_UNSUPPORTED_METHOD)
44
45#define IB_SMP_UNSUP_METH_ATTR \
46cpu_to_be16(IB_MGMT_MAD_STATUS_UNSUPPORTED_METHOD_ATTRIB)
47
48#define IB_SMP_INVALID_FIELD \
49cpu_to_be16(IB_MGMT_MAD_STATUS_INVALID_ATTRIB_VALUE)
50
51#define IB_VLARB_LOWPRI_0_31    1
52#define IB_VLARB_LOWPRI_32_63   2
53#define IB_VLARB_HIGHPRI_0_31   3
54#define IB_VLARB_HIGHPRI_32_63  4
55
56#define IB_PMA_PORT_COUNTERS_CONG       cpu_to_be16(0xFF00)
57
58struct ib_pma_portcounters_cong {
59	u8 reserved;
60	u8 reserved1;
61	__be16 port_check_rate;
62	__be16 symbol_error_counter;
63	u8 link_error_recovery_counter;
64	u8 link_downed_counter;
65	__be16 port_rcv_errors;
66	__be16 port_rcv_remphys_errors;
67	__be16 port_rcv_switch_relay_errors;
68	__be16 port_xmit_discards;
69	u8 port_xmit_constraint_errors;
70	u8 port_rcv_constraint_errors;
71	u8 reserved2;
72	u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
73	__be16 reserved3;
74	__be16 vl15_dropped;
75	__be64 port_xmit_data;
76	__be64 port_rcv_data;
77	__be64 port_xmit_packets;
78	__be64 port_rcv_packets;
79	__be64 port_xmit_wait;
80	__be64 port_adr_events;
81} __packed;
82
83#define IB_PMA_CONG_HW_CONTROL_TIMER            0x00
84#define IB_PMA_CONG_HW_CONTROL_SAMPLE           0x01
85
86#define QIB_XMIT_RATE_UNSUPPORTED               0x0
87#define QIB_XMIT_RATE_PICO                      0x7
88/* number of 4nsec cycles equaling 2secs */
89#define QIB_CONG_TIMER_PSINTERVAL               0x1DCD64EC
90
91#define IB_PMA_SEL_CONG_ALL                     0x01
92#define IB_PMA_SEL_CONG_PORT_DATA               0x02
93#define IB_PMA_SEL_CONG_XMIT                    0x04
94#define IB_PMA_SEL_CONG_ROUTING                 0x08
95
96/*
97 * Congestion control class attributes
98 */
99#define IB_CC_ATTR_CLASSPORTINFO			cpu_to_be16(0x0001)
100#define IB_CC_ATTR_NOTICE				cpu_to_be16(0x0002)
101#define IB_CC_ATTR_CONGESTION_INFO			cpu_to_be16(0x0011)
102#define IB_CC_ATTR_CONGESTION_KEY_INFO			cpu_to_be16(0x0012)
103#define IB_CC_ATTR_CONGESTION_LOG			cpu_to_be16(0x0013)
104#define IB_CC_ATTR_SWITCH_CONGESTION_SETTING		cpu_to_be16(0x0014)
105#define IB_CC_ATTR_SWITCH_PORT_CONGESTION_SETTING	cpu_to_be16(0x0015)
106#define IB_CC_ATTR_CA_CONGESTION_SETTING		cpu_to_be16(0x0016)
107#define IB_CC_ATTR_CONGESTION_CONTROL_TABLE		cpu_to_be16(0x0017)
108#define IB_CC_ATTR_TIME_STAMP				cpu_to_be16(0x0018)
109
110/* generalizations for threshold values */
111#define IB_CC_THRESHOLD_NONE 0x0
112#define IB_CC_THRESHOLD_MIN  0x1
113#define IB_CC_THRESHOLD_MAX  0xf
114
115/* CCA MAD header constants */
116#define IB_CC_MAD_LOGDATA_LEN 32
117#define IB_CC_MAD_MGMTDATA_LEN 192
118
119struct ib_cc_mad {
120	u8	base_version;
121	u8	mgmt_class;
122	u8	class_version;
123	u8	method;
124	__be16	status;
125	__be16	class_specific;
126	__be64	tid;
127	__be16	attr_id;
128	__be16	resv;
129	__be32	attr_mod;
130	__be64 cckey;
131
132	/* For CongestionLog attribute only */
133	u8 log_data[IB_CC_MAD_LOGDATA_LEN];
134
135	u8 mgmt_data[IB_CC_MAD_MGMTDATA_LEN];
136} __packed;
137
138/*
139 * Congestion Control class portinfo capability mask bits
140 */
141#define IB_CC_CPI_CM_TRAP_GEN		cpu_to_be16(1 << 0)
142#define IB_CC_CPI_CM_GET_SET_NOTICE	cpu_to_be16(1 << 1)
143#define IB_CC_CPI_CM_CAP2		cpu_to_be16(1 << 2)
144#define IB_CC_CPI_CM_ENHANCEDPORT0_CC	cpu_to_be16(1 << 8)
145
146struct ib_cc_classportinfo_attr {
147	u8 base_version;
148	u8 class_version;
149	__be16 cap_mask;
150	u8 reserved[3];
151	u8 resp_time_value;     /* only lower 5 bits */
152	union ib_gid redirect_gid;
153	__be32 redirect_tc_sl_fl;       /* 8, 4, 20 bits respectively */
154	__be16 redirect_lid;
155	__be16 redirect_pkey;
156	__be32 redirect_qp;     /* only lower 24 bits */
157	__be32 redirect_qkey;
158	union ib_gid trap_gid;
159	__be32 trap_tc_sl_fl;   /* 8, 4, 20 bits respectively */
160	__be16 trap_lid;
161	__be16 trap_pkey;
162	__be32 trap_hl_qp;      /* 8, 24 bits respectively */
163	__be32 trap_qkey;
164} __packed;
165
166/* Congestion control traps */
167#define IB_CC_TRAP_KEY_VIOLATION 0x0000
168
169struct ib_cc_trap_key_violation_attr {
170	__be16 source_lid;
171	u8 method;
172	u8 reserved1;
173	__be16 attrib_id;
174	__be32 attrib_mod;
175	__be32 qp;
176	__be64 cckey;
177	u8 sgid[16];
178	u8 padding[24];
179} __packed;
180
181/* Congestion info flags */
182#define IB_CC_CI_FLAGS_CREDIT_STARVATION 0x1
183#define IB_CC_TABLE_CAP_DEFAULT 31
184
185struct ib_cc_info_attr {
186	__be16 congestion_info;
187	u8  control_table_cap; /* Multiple of 64 entry unit CCTs */
188} __packed;
189
190struct ib_cc_key_info_attr {
191	__be64 cckey;
192	u8  protect;
193	__be16 lease_period;
194	__be16 violations;
195} __packed;
196
197#define IB_CC_CL_CA_LOGEVENTS_LEN 208
198
199struct ib_cc_log_attr {
200	u8 log_type;
201	u8 congestion_flags;
202	__be16 threshold_event_counter;
203	__be16 threshold_congestion_event_map;
204	__be16 current_time_stamp;
205	u8 log_events[IB_CC_CL_CA_LOGEVENTS_LEN];
206} __packed;
207
208#define IB_CC_CLEC_SERVICETYPE_RC 0x0
209#define IB_CC_CLEC_SERVICETYPE_UC 0x1
210#define IB_CC_CLEC_SERVICETYPE_RD 0x2
211#define IB_CC_CLEC_SERVICETYPE_UD 0x3
212
213struct ib_cc_log_event {
214	u8 local_qp_cn_entry;
215	u8 remote_qp_number_cn_entry[3];
216	u8  sl_cn_entry:4;
217	u8  service_type_cn_entry:4;
218	__be32 remote_lid_cn_entry;
219	__be32 timestamp_cn_entry;
220} __packed;
221
222/* Sixteen congestion entries */
223#define IB_CC_CCS_ENTRIES 16
224
225/* Port control flags */
226#define IB_CC_CCS_PC_SL_BASED 0x01
227
228struct ib_cc_congestion_entry {
229	u8 ccti_increase;
230	__be16 ccti_timer;
231	u8 trigger_threshold;
232	u8 ccti_min; /* min CCTI for cc table */
233} __packed;
234
235struct ib_cc_congestion_entry_shadow {
236	u8 ccti_increase;
237	u16 ccti_timer;
238	u8 trigger_threshold;
239	u8 ccti_min; /* min CCTI for cc table */
240} __packed;
241
242struct ib_cc_congestion_setting_attr {
243	__be16 port_control;
244	__be16 control_map;
245	struct ib_cc_congestion_entry entries[IB_CC_CCS_ENTRIES];
246} __packed;
247
248struct ib_cc_congestion_setting_attr_shadow {
249	u16 port_control;
250	u16 control_map;
251	struct ib_cc_congestion_entry_shadow entries[IB_CC_CCS_ENTRIES];
252} __packed;
253
254#define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
255#define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
256
257/* 64 Congestion Control table entries in a single MAD */
258#define IB_CCT_ENTRIES 64
259#define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
260
261struct ib_cc_table_entry {
262	__be16 entry; /* shift:2, multiplier:14 */
263};
264
265struct ib_cc_table_entry_shadow {
266	u16 entry; /* shift:2, multiplier:14 */
267};
268
269struct ib_cc_table_attr {
270	__be16 ccti_limit; /* max CCTI for cc table */
271	struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
272} __packed;
273
274struct ib_cc_table_attr_shadow {
275	u16 ccti_limit; /* max CCTI for cc table */
276	struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES];
277} __packed;
278
279#define CC_TABLE_SHADOW_MAX \
280	(IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
281
282struct cc_table_shadow {
283	u16 ccti_last_entry;
284	struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX];
285} __packed;
286
287/*
288 * The PortSamplesControl.CounterMasks field is an array of 3 bit fields
289 * which specify the N'th counter's capabilities. See ch. 16.1.3.2.
290 * We support 5 counters which only count the mandatory quantities.
291 */
292#define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
293#define COUNTER_MASK0_9 \
294	cpu_to_be32(COUNTER_MASK(1, 0) | \
295		    COUNTER_MASK(1, 1) | \
296		    COUNTER_MASK(1, 2) | \
297		    COUNTER_MASK(1, 3) | \
298		    COUNTER_MASK(1, 4))
299
300#endif				/* _QIB_MAD_H */
301