1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. 4 * 5 * Description: CoreSight Trace Port Interface Unit driver 6 */ 7 8#include <linux/atomic.h> 9#include <linux/kernel.h> 10#include <linux/init.h> 11#include <linux/device.h> 12#include <linux/io.h> 13#include <linux/err.h> 14#include <linux/slab.h> 15#include <linux/pm_runtime.h> 16#include <linux/coresight.h> 17#include <linux/amba/bus.h> 18#include <linux/clk.h> 19 20#include "coresight-priv.h" 21 22#define TPIU_SUPP_PORTSZ 0x000 23#define TPIU_CURR_PORTSZ 0x004 24#define TPIU_SUPP_TRIGMODES 0x100 25#define TPIU_TRIG_CNTRVAL 0x104 26#define TPIU_TRIG_MULT 0x108 27#define TPIU_SUPP_TESTPATM 0x200 28#define TPIU_CURR_TESTPATM 0x204 29#define TPIU_TEST_PATREPCNTR 0x208 30#define TPIU_FFSR 0x300 31#define TPIU_FFCR 0x304 32#define TPIU_FSYNC_CNTR 0x308 33#define TPIU_EXTCTL_INPORT 0x400 34#define TPIU_EXTCTL_OUTPORT 0x404 35#define TPIU_ITTRFLINACK 0xee4 36#define TPIU_ITTRFLIN 0xee8 37#define TPIU_ITATBDATA0 0xeec 38#define TPIU_ITATBCTR2 0xef0 39#define TPIU_ITATBCTR1 0xef4 40#define TPIU_ITATBCTR0 0xef8 41 42/** register definition **/ 43/* FFSR - 0x300 */ 44#define FFSR_FT_STOPPED_BIT 1 45/* FFCR - 0x304 */ 46#define FFCR_FON_MAN_BIT 6 47#define FFCR_FON_MAN BIT(6) 48#define FFCR_STOP_FI BIT(12) 49 50DEFINE_CORESIGHT_DEVLIST(tpiu_devs, "tpiu"); 51 52/* 53 * @base: memory mapped base address for this component. 54 * @atclk: optional clock for the core parts of the TPIU. 55 * @csdev: component vitals needed by the framework. 56 */ 57struct tpiu_drvdata { 58 void __iomem *base; 59 struct clk *atclk; 60 struct coresight_device *csdev; 61 spinlock_t spinlock; 62}; 63 64static void tpiu_enable_hw(struct csdev_access *csa) 65{ 66 CS_UNLOCK(csa->base); 67 68 /* TODO: fill this up */ 69 70 CS_LOCK(csa->base); 71} 72 73static int tpiu_enable(struct coresight_device *csdev, enum cs_mode mode, 74 void *__unused) 75{ 76 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 77 78 guard(spinlock)(&drvdata->spinlock); 79 tpiu_enable_hw(&csdev->access); 80 csdev->refcnt++; 81 dev_dbg(&csdev->dev, "TPIU enabled\n"); 82 return 0; 83} 84 85static void tpiu_disable_hw(struct csdev_access *csa) 86{ 87 CS_UNLOCK(csa->base); 88 89 /* Clear formatter and stop on flush */ 90 csdev_access_relaxed_write32(csa, FFCR_STOP_FI, TPIU_FFCR); 91 /* Generate manual flush */ 92 csdev_access_relaxed_write32(csa, FFCR_STOP_FI | FFCR_FON_MAN, TPIU_FFCR); 93 /* Wait for flush to complete */ 94 coresight_timeout(csa, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); 95 /* Wait for formatter to stop */ 96 coresight_timeout(csa, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); 97 98 CS_LOCK(csa->base); 99} 100 101static int tpiu_disable(struct coresight_device *csdev) 102{ 103 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 104 105 guard(spinlock)(&drvdata->spinlock); 106 csdev->refcnt--; 107 if (csdev->refcnt) 108 return -EBUSY; 109 110 tpiu_disable_hw(&csdev->access); 111 112 dev_dbg(&csdev->dev, "TPIU disabled\n"); 113 return 0; 114} 115 116static const struct coresight_ops_sink tpiu_sink_ops = { 117 .enable = tpiu_enable, 118 .disable = tpiu_disable, 119}; 120 121static const struct coresight_ops tpiu_cs_ops = { 122 .sink_ops = &tpiu_sink_ops, 123}; 124 125static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) 126{ 127 int ret; 128 void __iomem *base; 129 struct device *dev = &adev->dev; 130 struct coresight_platform_data *pdata = NULL; 131 struct tpiu_drvdata *drvdata; 132 struct resource *res = &adev->res; 133 struct coresight_desc desc = { 0 }; 134 135 desc.name = coresight_alloc_device_name(&tpiu_devs, dev); 136 if (!desc.name) 137 return -ENOMEM; 138 139 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 140 if (!drvdata) 141 return -ENOMEM; 142 143 spin_lock_init(&drvdata->spinlock); 144 145 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ 146 if (!IS_ERR(drvdata->atclk)) { 147 ret = clk_prepare_enable(drvdata->atclk); 148 if (ret) 149 return ret; 150 } 151 dev_set_drvdata(dev, drvdata); 152 153 /* Validity for the resource is already checked by the AMBA core */ 154 base = devm_ioremap_resource(dev, res); 155 if (IS_ERR(base)) 156 return PTR_ERR(base); 157 158 drvdata->base = base; 159 desc.access = CSDEV_ACCESS_IOMEM(base); 160 161 /* Disable tpiu to support older devices */ 162 tpiu_disable_hw(&desc.access); 163 164 pdata = coresight_get_platform_data(dev); 165 if (IS_ERR(pdata)) 166 return PTR_ERR(pdata); 167 dev->platform_data = pdata; 168 169 desc.type = CORESIGHT_DEV_TYPE_SINK; 170 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT; 171 desc.ops = &tpiu_cs_ops; 172 desc.pdata = pdata; 173 desc.dev = dev; 174 drvdata->csdev = coresight_register(&desc); 175 176 if (!IS_ERR(drvdata->csdev)) { 177 pm_runtime_put(&adev->dev); 178 return 0; 179 } 180 181 return PTR_ERR(drvdata->csdev); 182} 183 184static void tpiu_remove(struct amba_device *adev) 185{ 186 struct tpiu_drvdata *drvdata = dev_get_drvdata(&adev->dev); 187 188 coresight_unregister(drvdata->csdev); 189} 190 191#ifdef CONFIG_PM 192static int tpiu_runtime_suspend(struct device *dev) 193{ 194 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); 195 196 if (drvdata && !IS_ERR(drvdata->atclk)) 197 clk_disable_unprepare(drvdata->atclk); 198 199 return 0; 200} 201 202static int tpiu_runtime_resume(struct device *dev) 203{ 204 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); 205 206 if (drvdata && !IS_ERR(drvdata->atclk)) 207 clk_prepare_enable(drvdata->atclk); 208 209 return 0; 210} 211#endif 212 213static const struct dev_pm_ops tpiu_dev_pm_ops = { 214 SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL) 215}; 216 217static const struct amba_id tpiu_ids[] = { 218 { 219 .id = 0x000bb912, 220 .mask = 0x000fffff, 221 }, 222 { 223 .id = 0x0004b912, 224 .mask = 0x0007ffff, 225 }, 226 { 227 /* Coresight SoC-600 */ 228 .id = 0x000bb9e7, 229 .mask = 0x000fffff, 230 }, 231 { 0, 0, NULL }, 232}; 233 234MODULE_DEVICE_TABLE(amba, tpiu_ids); 235 236static struct amba_driver tpiu_driver = { 237 .drv = { 238 .name = "coresight-tpiu", 239 .owner = THIS_MODULE, 240 .pm = &tpiu_dev_pm_ops, 241 .suppress_bind_attrs = true, 242 }, 243 .probe = tpiu_probe, 244 .remove = tpiu_remove, 245 .id_table = tpiu_ids, 246}; 247 248module_amba_driver(tpiu_driver); 249 250MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 251MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 252MODULE_DESCRIPTION("Arm CoreSight TPIU (Trace Port Interface Unit) driver"); 253MODULE_LICENSE("GPL v2"); 254