1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright �� 2023 Intel Corporation
4 */
5
6#ifndef _XE_PCI_TYPES_H_
7#define _XE_PCI_TYPES_H_
8
9#include <linux/types.h>
10
11struct xe_graphics_desc {
12	const char *name;
13	u8 ver;
14	u8 rel;
15
16	u8 dma_mask_size;	/* available DMA address bits */
17	u8 va_bits;
18	u8 vm_max_level;
19	u8 vram_flags;
20
21	u64 hw_engine_mask;	/* hardware engines provided by graphics IP */
22
23	u32 tile_mmio_ext_size; /* size of MMIO extension space, per-tile */
24
25	u8 max_remote_tiles:2;
26
27	u8 has_asid:1;
28	u8 has_flat_ccs:1;
29	u8 has_range_tlb_invalidation:1;
30	u8 has_usm:1;
31};
32
33struct xe_media_desc {
34	const char *name;
35	u8 ver;
36	u8 rel;
37
38	u64 hw_engine_mask;	/* hardware engines provided by media IP */
39};
40
41struct gmdid_map {
42	unsigned int ver;
43	const void *ip;
44};
45
46#endif
47