1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright �� 2022 Intel Corporation
4 */
5
6#ifndef _XE_GUC_ENGINE_TYPES_H_
7#define _XE_GUC_ENGINE_TYPES_H_
8
9#include <linux/spinlock.h>
10#include <linux/workqueue.h>
11
12#include "xe_gpu_scheduler_types.h"
13
14struct dma_fence;
15struct xe_exec_queue;
16
17/**
18 * struct xe_guc_exec_queue - GuC specific state for an xe_exec_queue
19 */
20struct xe_guc_exec_queue {
21	/** @q: Backpointer to parent xe_exec_queue */
22	struct xe_exec_queue *q;
23	/** @sched: GPU scheduler for this xe_exec_queue */
24	struct xe_gpu_scheduler sched;
25	/** @entity: Scheduler entity for this xe_exec_queue */
26	struct xe_sched_entity entity;
27	/**
28	 * @static_msgs: Static messages for this xe_exec_queue, used when
29	 * a message needs to sent through the GPU scheduler but memory
30	 * allocations are not allowed.
31	 */
32#define MAX_STATIC_MSG_TYPE	3
33	struct xe_sched_msg static_msgs[MAX_STATIC_MSG_TYPE];
34	/** @lr_tdr: long running TDR worker */
35	struct work_struct lr_tdr;
36	/** @fini_async: do final fini async from this worker */
37	struct work_struct fini_async;
38	/** @resume_time: time of last resume */
39	u64 resume_time;
40	/** @state: GuC specific state for this xe_exec_queue */
41	atomic_t state;
42	/** @wqi_head: work queue item tail */
43	u32 wqi_head;
44	/** @wqi_tail: work queue item tail */
45	u32 wqi_tail;
46	/** @id: GuC id for this exec_queue */
47	u16 id;
48	/** @suspend_wait: wait queue used to wait on pending suspends */
49	wait_queue_head_t suspend_wait;
50	/** @suspend_pending: a suspend of the exec_queue is pending */
51	bool suspend_pending;
52};
53
54#endif
55