1/*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24#include "gf100.h"
25
26const struct nvkm_specsrc
27gf100_pbfb_sources[] = {
28	{ 0x10f100, (const struct nvkm_specmux[]) {
29			{ 0x1, 0, "unk0" },
30			{ 0x3f, 4, "unk4" },
31			{}
32		}, "pbfb_broadcast_pm_unk100" },
33	{}
34};
35
36const struct nvkm_specsrc
37gf100_pmfb_sources[] = {
38	{ 0x140028, (const struct nvkm_specmux[]) {
39			{ 0x3fff, 0, "unk0" },
40			{ 0x7, 16, "unk16" },
41			{ 0x3, 24, "unk24" },
42			{ 0x2, 29, "unk29" },
43			{}
44		}, "pmfb0_pm_unk28" },
45	{}
46};
47
48static const struct nvkm_specsrc
49gf100_l1_sources[] = {
50	{ 0x5044a8, (const struct nvkm_specmux[]) {
51			{ 0x3f, 0, "sel", true },
52			{}
53		}, "pgraph_gpc0_tpc0_l1_pm_mux" },
54	{}
55};
56
57static const struct nvkm_specsrc
58gf100_tex_sources[] = {
59	{ 0x5042c0, (const struct nvkm_specmux[]) {
60			{ 0xf, 0, "sel0", true },
61			{ 0x7, 8, "sel1", true },
62			{}
63		}, "pgraph_gpc0_tpc0_tex_pm_mux_c_d" },
64	{}
65};
66
67static const struct nvkm_specsrc
68gf100_unk400_sources[] = {
69	{ 0x50440c, (const struct nvkm_specmux[]) {
70			{ 0x3f, 0, "sel", true },
71			{}
72		}, "pgraph_gpc0_tpc0_unk400_pm_mux" },
73	{}
74};
75
76static const struct nvkm_specdom
77gf100_pm_hub[] = {
78	{}
79};
80
81const struct nvkm_specdom
82gf100_pm_gpc[] = {
83	{ 0xe0, (const struct nvkm_specsig[]) {
84			{ 0x00, "gpc00_l1_00", gf100_l1_sources },
85			{ 0x01, "gpc00_l1_01", gf100_l1_sources },
86			{ 0x02, "gpc00_l1_02", gf100_l1_sources },
87			{ 0x03, "gpc00_l1_03", gf100_l1_sources },
88			{ 0x05, "gpc00_l1_04", gf100_l1_sources },
89			{ 0x06, "gpc00_l1_05", gf100_l1_sources },
90			{ 0x0a, "gpc00_tex_00", gf100_tex_sources },
91			{ 0x0b, "gpc00_tex_01", gf100_tex_sources },
92			{ 0x0c, "gpc00_tex_02", gf100_tex_sources },
93			{ 0x0d, "gpc00_tex_03", gf100_tex_sources },
94			{ 0x0e, "gpc00_tex_04", gf100_tex_sources },
95			{ 0x0f, "gpc00_tex_05", gf100_tex_sources },
96			{ 0x10, "gpc00_tex_06", gf100_tex_sources },
97			{ 0x11, "gpc00_tex_07", gf100_tex_sources },
98			{ 0x12, "gpc00_tex_08", gf100_tex_sources },
99			{ 0x26, "gpc00_unk400_00", gf100_unk400_sources },
100			{}
101		}, &gf100_perfctr_func },
102	{}
103};
104
105static const struct nvkm_specdom
106gf100_pm_part[] = {
107	{ 0xe0, (const struct nvkm_specsig[]) {
108			{ 0x0f, "part00_pbfb_00", gf100_pbfb_sources },
109			{ 0x10, "part00_pbfb_01", gf100_pbfb_sources },
110			{ 0x21, "part00_pmfb_00", gf100_pmfb_sources },
111			{ 0x04, "part00_pmfb_01", gf100_pmfb_sources },
112			{ 0x00, "part00_pmfb_02", gf100_pmfb_sources },
113			{ 0x02, "part00_pmfb_03", gf100_pmfb_sources },
114			{ 0x01, "part00_pmfb_04", gf100_pmfb_sources },
115			{ 0x2e, "part00_pmfb_05", gf100_pmfb_sources },
116			{ 0x2f, "part00_pmfb_06", gf100_pmfb_sources },
117			{ 0x1b, "part00_pmfb_07", gf100_pmfb_sources },
118			{ 0x1c, "part00_pmfb_08", gf100_pmfb_sources },
119			{ 0x1d, "part00_pmfb_09", gf100_pmfb_sources },
120			{ 0x1e, "part00_pmfb_0a", gf100_pmfb_sources },
121			{ 0x1f, "part00_pmfb_0b", gf100_pmfb_sources },
122			{}
123		}, &gf100_perfctr_func },
124	{}
125};
126
127static void
128gf100_perfctr_init(struct nvkm_pm *pm, struct nvkm_perfdom *dom,
129		   struct nvkm_perfctr *ctr)
130{
131	struct nvkm_device *device = pm->engine.subdev.device;
132	u32 log = ctr->logic_op;
133	u32 src = 0x00000000;
134	int i;
135
136	for (i = 0; i < 4; i++)
137		src |= ctr->signal[i] << (i * 8);
138
139	nvkm_wr32(device, dom->addr + 0x09c, 0x00040002 | (dom->mode << 3));
140	nvkm_wr32(device, dom->addr + 0x100, 0x00000000);
141	nvkm_wr32(device, dom->addr + 0x040 + (ctr->slot * 0x08), src);
142	nvkm_wr32(device, dom->addr + 0x044 + (ctr->slot * 0x08), log);
143}
144
145static void
146gf100_perfctr_read(struct nvkm_pm *pm, struct nvkm_perfdom *dom,
147		   struct nvkm_perfctr *ctr)
148{
149	struct nvkm_device *device = pm->engine.subdev.device;
150
151	switch (ctr->slot) {
152	case 0: ctr->ctr = nvkm_rd32(device, dom->addr + 0x08c); break;
153	case 1: ctr->ctr = nvkm_rd32(device, dom->addr + 0x088); break;
154	case 2: ctr->ctr = nvkm_rd32(device, dom->addr + 0x080); break;
155	case 3: ctr->ctr = nvkm_rd32(device, dom->addr + 0x090); break;
156	}
157	dom->clk = nvkm_rd32(device, dom->addr + 0x070);
158}
159
160static void
161gf100_perfctr_next(struct nvkm_pm *pm, struct nvkm_perfdom *dom)
162{
163	struct nvkm_device *device = pm->engine.subdev.device;
164	nvkm_wr32(device, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27);
165	nvkm_wr32(device, dom->addr + 0x0ec, 0x00000011);
166}
167
168const struct nvkm_funcdom
169gf100_perfctr_func = {
170	.init = gf100_perfctr_init,
171	.read = gf100_perfctr_read,
172	.next = gf100_perfctr_next,
173};
174
175static void
176gf100_pm_fini(struct nvkm_pm *pm)
177{
178	struct nvkm_device *device = pm->engine.subdev.device;
179	nvkm_mask(device, 0x000200, 0x10000000, 0x00000000);
180	nvkm_mask(device, 0x000200, 0x10000000, 0x10000000);
181}
182
183static const struct nvkm_pm_func
184gf100_pm_ = {
185	.fini = gf100_pm_fini,
186};
187
188int
189gf100_pm_new_(const struct gf100_pm_func *func, struct nvkm_device *device,
190	      enum nvkm_subdev_type type, int inst, struct nvkm_pm **ppm)
191{
192	struct nvkm_pm *pm;
193	u32 mask;
194	int ret;
195
196	if (!(pm = *ppm = kzalloc(sizeof(*pm), GFP_KERNEL)))
197		return -ENOMEM;
198
199	ret = nvkm_pm_ctor(&gf100_pm_, device, type, inst, pm);
200	if (ret)
201		return ret;
202
203	/* HUB */
204	ret = nvkm_perfdom_new(pm, "hub", 0, 0x1b0000, 0, 0x200,
205			       func->doms_hub);
206	if (ret)
207		return ret;
208
209	/* GPC */
210	mask  = (1 << nvkm_rd32(device, 0x022430)) - 1;
211	mask &= ~nvkm_rd32(device, 0x022504);
212	mask &= ~nvkm_rd32(device, 0x022584);
213
214	ret = nvkm_perfdom_new(pm, "gpc", mask, 0x180000,
215			       0x1000, 0x200, func->doms_gpc);
216	if (ret)
217		return ret;
218
219	/* PART */
220	mask  = (1 << nvkm_rd32(device, 0x022438)) - 1;
221	mask &= ~nvkm_rd32(device, 0x022548);
222	mask &= ~nvkm_rd32(device, 0x0225c8);
223
224	ret = nvkm_perfdom_new(pm, "part", mask, 0x1a0000,
225			       0x1000, 0x200, func->doms_part);
226	if (ret)
227		return ret;
228
229	return 0;
230}
231
232static const struct gf100_pm_func
233gf100_pm = {
234	.doms_gpc = gf100_pm_gpc,
235	.doms_hub = gf100_pm_hub,
236	.doms_part = gf100_pm_part,
237};
238
239int
240gf100_pm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_pm **ppm)
241{
242	return gf100_pm_new_(&gf100_pm, device, type, inst, ppm);
243}
244