1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24#include "priv.h"
25#include <core/enum.h>
26
27#include <nvif/class.h>
28
29static const struct nvkm_enum
30gk104_ce_launcherr_report[] = {
31	{ 0x0, "NO_ERR" },
32	{ 0x1, "2D_LAYER_EXCEEDS_DEPTH" },
33	{ 0x2, "INVALID_ARGUMENT" },
34	{ 0x3, "MEM2MEM_RECT_OUT_OF_BOUNDS" },
35	{ 0x4, "SRC_LINE_EXCEEDS_PITCH" },
36	{ 0x5, "SRC_LINE_EXCEEDS_NEG_PITCH" },
37	{ 0x6, "DST_LINE_EXCEEDS_PITCH" },
38	{ 0x7, "DST_LINE_EXCEEDS_NEG_PITCH" },
39	{ 0x8, "BAD_SRC_PIXEL_COMP_REF" },
40	{ 0x9, "INVALID_VALUE" },
41	{ 0xa, "UNUSED_FIELD" },
42	{ 0xb, "INVALID_OPERATION" },
43	{}
44};
45
46static void
47gk104_ce_intr_launcherr(struct nvkm_engine *ce, const u32 base)
48{
49	struct nvkm_subdev *subdev = &ce->subdev;
50	struct nvkm_device *device = subdev->device;
51	u32 stat = nvkm_rd32(device, 0x104f14 + base);
52	const struct nvkm_enum *en =
53		nvkm_enum_find(gk104_ce_launcherr_report, stat & 0x0000000f);
54	nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : "");
55	nvkm_wr32(device, 0x104f14 + base, 0x00000000);
56}
57
58void
59gk104_ce_intr(struct nvkm_engine *ce)
60{
61	struct nvkm_subdev *subdev = &ce->subdev;
62	struct nvkm_device *device = subdev->device;
63	const u32 base = subdev->inst * 0x1000;
64	u32 mask = nvkm_rd32(device, 0x104904 + base);
65	u32 intr = nvkm_rd32(device, 0x104908 + base) & mask;
66	if (intr & 0x00000001) {
67		nvkm_warn(subdev, "BLOCKPIPE\n");
68		nvkm_wr32(device, 0x104908 + base, 0x00000001);
69		intr &= ~0x00000001;
70	}
71	if (intr & 0x00000002) {
72		nvkm_warn(subdev, "NONBLOCKPIPE\n");
73		nvkm_wr32(device, 0x104908 + base, 0x00000002);
74		intr &= ~0x00000002;
75	}
76	if (intr & 0x00000004) {
77		gk104_ce_intr_launcherr(ce, base);
78		nvkm_wr32(device, 0x104908 + base, 0x00000004);
79		intr &= ~0x00000004;
80	}
81	if (intr) {
82		nvkm_warn(subdev, "intr %08x\n", intr);
83		nvkm_wr32(device, 0x104908 + base, intr);
84	}
85}
86
87static const struct nvkm_engine_func
88gk104_ce = {
89	.intr = gk104_ce_intr,
90	.sclass = {
91		{ -1, -1, KEPLER_DMA_COPY_A },
92		{}
93	}
94};
95
96int
97gk104_ce_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
98	     struct nvkm_engine **pengine)
99{
100	return nvkm_engine_new_(&gk104_ce, device, type, inst, true, pengine);
101}
102