1#ifndef __src_nvidia_inc_kernel_gpu_gsp_gsp_init_args_h__
2#define __src_nvidia_inc_kernel_gpu_gsp_gsp_init_args_h__
3
4/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.113.01 */
5
6/*
7 * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
8 * SPDX-License-Identifier: MIT
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice shall be included in
18 * all copies or substantial portions of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
27 */
28
29typedef struct {
30    RmPhysAddr sharedMemPhysAddr;
31    NvU32 pageTableEntryCount;
32    NvLength cmdQueueOffset;
33    NvLength statQueueOffset;
34    NvLength locklessCmdQueueOffset;
35    NvLength locklessStatQueueOffset;
36} MESSAGE_QUEUE_INIT_ARGUMENTS;
37
38typedef struct {
39    NvU32 oldLevel;
40    NvU32 flags;
41    NvBool bInPMTransition;
42} GSP_SR_INIT_ARGUMENTS;
43
44typedef struct
45{
46    MESSAGE_QUEUE_INIT_ARGUMENTS      messageQueueInitArguments;
47    GSP_SR_INIT_ARGUMENTS             srInitArguments;
48    NvU32                             gpuInstance;
49
50    struct
51    {
52        NvU64                         pa;
53        NvU64                         size;
54    } profilerArgs;
55} GSP_ARGUMENTS_CACHED;
56
57#endif
58