1#ifndef __src_nvidia_arch_nvalloc_common_inc_gsp_gsp_fw_sr_meta_h__
2#define __src_nvidia_arch_nvalloc_common_inc_gsp_gsp_fw_sr_meta_h__
3
4/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.113.01 */
5
6/*
7 * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
8 * SPDX-License-Identifier: MIT
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice shall be included in
18 * all copies or substantial portions of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
27 */
28
29#define GSP_FW_SR_META_MAGIC     0x8a3bb9e6c6c39d93ULL
30#define GSP_FW_SR_META_REVISION  2
31
32typedef struct
33{
34    //
35    // Magic
36    // Use for verification by Booter
37    //
38    NvU64 magic;  // = GSP_FW_SR_META_MAGIC;
39
40    //
41    // Revision number
42    // Bumped up when we change this interface so it is not backward compatible.
43    // Bumped up when we revoke GSP-RM ucode
44    //
45    NvU64 revision;  // = GSP_FW_SR_META_MAGIC_REVISION;
46
47    //
48    // ---- Members regarding data in SYSMEM ----------------------------
49    // Consumed by Booter for DMA
50    //
51    NvU64 sysmemAddrOfSuspendResumeData;
52    NvU64 sizeOfSuspendResumeData;
53
54    // ---- Members for crypto ops across S/R ---------------------------
55
56    //
57    // HMAC over the entire GspFwSRMeta structure (including padding)
58    // with the hmac field itself zeroed.
59    //
60    NvU8 hmac[32];
61
62    // Hash over GspFwWprMeta structure
63    NvU8 wprMetaHash[32];
64
65    // Hash over GspFwHeapFreeList structure. All zeros signifies no free list.
66    NvU8 heapFreeListHash[32];
67
68    // Hash over data in WPR2 (skipping over free heap chunks; see Booter for details)
69    NvU8 dataHash[32];
70
71    //
72    // Pad structure to exactly 256 bytes (1 DMA chunk).
73    // Padding initialized to zero.
74    //
75    NvU32 padding[24];
76
77} GspFwSRMeta;
78
79#endif
80