1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "dce110/dce110_hwseq.h"
27#include "dcn10/dcn10_hwseq.h"
28#include "dcn20/dcn20_hwseq.h"
29#include "dcn201/dcn201_hwseq.h"
30#include "dcn201_init.h"
31
32static const struct hw_sequencer_funcs dcn201_funcs = {
33	.program_gamut_remap = dcn10_program_gamut_remap,
34	.init_hw = dcn201_init_hw,
35	.power_down_on_boot = NULL,
36	.apply_ctx_to_hw = dce110_apply_ctx_to_hw,
37	.apply_ctx_for_surface = NULL,
38	.program_front_end_for_ctx = dcn20_program_front_end_for_ctx,
39	.wait_for_pending_cleared = dcn10_wait_for_pending_cleared,
40	.post_unlock_program_front_end = dcn10_post_unlock_program_front_end,
41	.update_plane_addr = dcn201_update_plane_addr,
42	.update_dchub = dcn10_update_dchub,
43	.update_pending_status = dcn10_update_pending_status,
44	.program_output_csc = dcn20_program_output_csc,
45	.enable_accelerated_mode = dce110_enable_accelerated_mode,
46	.enable_timing_synchronization = dcn10_enable_timing_synchronization,
47	.enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
48	.update_info_frame = dce110_update_info_frame,
49	.send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
50	.enable_stream = dce110_enable_stream,
51	.disable_stream = dce110_disable_stream,
52	.unblank_stream = dcn201_unblank_stream,
53	.blank_stream = dce110_blank_stream,
54	.enable_audio_stream = dce110_enable_audio_stream,
55	.disable_audio_stream = dce110_disable_audio_stream,
56	.disable_plane = dcn10_disable_plane,
57	.pipe_control_lock = dcn201_pipe_control_lock,
58	.interdependent_update_lock = dcn10_lock_all_pipes,
59	.cursor_lock = dcn10_cursor_lock,
60	.prepare_bandwidth = dcn20_prepare_bandwidth,
61	.optimize_bandwidth = dcn20_optimize_bandwidth,
62	.update_bandwidth = dcn20_update_bandwidth,
63	.set_drr = dcn10_set_drr,
64	.get_position = dcn10_get_position,
65	.set_static_screen_control = dcn10_set_static_screen_control,
66	.setup_stereo = dcn10_setup_stereo,
67	.set_avmute = dce110_set_avmute,
68	.log_hw_state = dcn10_log_hw_state,
69	.get_hw_state = dcn10_get_hw_state,
70	.clear_status_bits = dcn10_clear_status_bits,
71	.wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
72	.edp_backlight_control = dce110_edp_backlight_control,
73	.edp_power_control = dce110_edp_power_control,
74	.edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
75	.setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
76	.set_clock = dcn10_set_clock,
77	.get_clock = dcn10_get_clock,
78	.program_triplebuffer = dcn20_program_triple_buffer,
79	.dmdata_status_done = dcn20_dmdata_status_done,
80	.set_dmdata_attributes = dcn201_set_dmdata_attributes,
81	.get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
82	.calc_vupdate_position = dcn10_calc_vupdate_position,
83	.set_cursor_position = dcn10_set_cursor_position,
84	.set_cursor_attribute = dcn201_set_cursor_attribute,
85	.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
86	.set_backlight_level = dce110_set_backlight_level,
87	.set_abm_immediate_disable = dce110_set_abm_immediate_disable,
88	.set_pipe = dce110_set_pipe,
89	.enable_lvds_link_output = dce110_enable_lvds_link_output,
90	.enable_tmds_link_output = dce110_enable_tmds_link_output,
91	.enable_dp_link_output = dce110_enable_dp_link_output,
92	.disable_link_output = dce110_disable_link_output,
93	.set_disp_pattern_generator = dcn20_set_disp_pattern_generator,
94	.update_visual_confirm_color = dcn10_update_visual_confirm_color,
95};
96
97static const struct hwseq_private_funcs dcn201_private_funcs = {
98	.init_pipes = NULL,
99	.update_plane_addr = dcn201_update_plane_addr,
100	.plane_atomic_disconnect = dcn201_plane_atomic_disconnect,
101	.program_pipe = dcn10_program_pipe,
102	.update_mpcc = dcn201_update_mpcc,
103	.set_input_transfer_func = dcn20_set_input_transfer_func,
104	.set_output_transfer_func = dcn20_set_output_transfer_func,
105	.power_down = dce110_power_down,
106	.enable_display_power_gating = dcn10_dummy_display_power_gating,
107	.blank_pixel_data = dcn20_blank_pixel_data,
108	.reset_hw_ctx_wrap = dcn10_reset_hw_ctx_wrap,
109	.enable_stream_timing = dcn20_enable_stream_timing,
110	.edp_backlight_control = dce110_edp_backlight_control,
111	.disable_stream_gating = NULL,
112	.enable_stream_gating = NULL,
113	.setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt,
114	.did_underflow_occur = dcn10_did_underflow_occur,
115	.init_blank = dcn201_init_blank,
116	.disable_vga = dcn10_disable_vga,
117	.bios_golden_init = dcn10_bios_golden_init,
118	.plane_atomic_disable = dcn10_plane_atomic_disable,
119	.plane_atomic_power_down = dcn10_plane_atomic_power_down,
120	.enable_power_gating_plane = dcn10_enable_power_gating_plane,
121	.dpp_pg_control = dcn10_dpp_pg_control,
122	.hubp_pg_control = dcn10_hubp_pg_control,
123	.dsc_pg_control = NULL,
124	.set_hdr_multiplier = dcn10_set_hdr_multiplier,
125	.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
126	.wait_for_blank_complete = dcn20_wait_for_blank_complete,
127	.dccg_init = dcn20_dccg_init,
128	.set_blend_lut = dcn20_set_blend_lut,
129	.set_shaper_3dlut = dcn20_set_shaper_3dlut,
130};
131
132void dcn201_hw_sequencer_construct(struct dc *dc)
133{
134	dc->hwss = dcn201_funcs;
135	dc->hwseq->funcs = dcn201_private_funcs;
136}
137