1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
4 *
5 * Copyright (C) 2007 David Brownell
6 */
7
8#include <linux/gpio/driver.h>
9#include <linux/i2c.h>
10#include <linux/interrupt.h>
11#include <linux/irq.h>
12#include <linux/irqdomain.h>
13#include <linux/kernel.h>
14#include <linux/mod_devicetable.h>
15#include <linux/module.h>
16#include <linux/property.h>
17#include <linux/slab.h>
18#include <linux/spinlock.h>
19
20static const struct i2c_device_id pcf857x_id[] = {
21	{ "pcf8574", 8 },
22	{ "pcf8574a", 8 },
23	{ "pca8574", 8 },
24	{ "pca9670", 8 },
25	{ "pca9672", 8 },
26	{ "pca9674", 8 },
27	{ "pcf8575", 16 },
28	{ "pca8575", 16 },
29	{ "pca9671", 16 },
30	{ "pca9673", 16 },
31	{ "pca9675", 16 },
32	{ "max7328", 8 },
33	{ "max7329", 8 },
34	{ }
35};
36MODULE_DEVICE_TABLE(i2c, pcf857x_id);
37
38static const struct of_device_id pcf857x_of_table[] = {
39	{ .compatible = "nxp,pcf8574", (void *)8 },
40	{ .compatible = "nxp,pcf8574a", (void *)8 },
41	{ .compatible = "nxp,pca8574", (void *)8 },
42	{ .compatible = "nxp,pca9670", (void *)8 },
43	{ .compatible = "nxp,pca9672", (void *)8 },
44	{ .compatible = "nxp,pca9674", (void *)8 },
45	{ .compatible = "nxp,pcf8575", (void *)16 },
46	{ .compatible = "nxp,pca8575", (void *)16 },
47	{ .compatible = "nxp,pca9671", (void *)16 },
48	{ .compatible = "nxp,pca9673", (void *)16 },
49	{ .compatible = "nxp,pca9675", (void *)16 },
50	{ .compatible = "maxim,max7328", (void *)8 },
51	{ .compatible = "maxim,max7329", (void *)8 },
52	{ }
53};
54MODULE_DEVICE_TABLE(of, pcf857x_of_table);
55
56/*
57 * The pcf857x, pca857x, and pca967x chips only expose one read and one
58 * write register.  Writing a "one" bit (to match the reset state) lets
59 * that pin be used as an input; it's not an open-drain model, but acts
60 * a bit like one.  This is described as "quasi-bidirectional"; read the
61 * chip documentation for details.
62 *
63 * Many other I2C GPIO expander chips (like the pca953x models) have
64 * more complex register models and more conventional circuitry using
65 * push/pull drivers.  They often use the same 0x20..0x27 addresses as
66 * pcf857x parts, making the "legacy" I2C driver model problematic.
67 */
68struct pcf857x {
69	struct gpio_chip	chip;
70	struct i2c_client	*client;
71	struct mutex		lock;		/* protect 'out' */
72	unsigned int		out;		/* software latch */
73	unsigned int		status;		/* current status */
74	unsigned int		irq_enabled;	/* enabled irqs */
75
76	int (*write)(struct i2c_client *client, unsigned int data);
77	int (*read)(struct i2c_client *client);
78};
79
80/*-------------------------------------------------------------------------*/
81
82/* Talk to 8-bit I/O expander */
83
84static int i2c_write_le8(struct i2c_client *client, unsigned int data)
85{
86	return i2c_smbus_write_byte(client, data);
87}
88
89static int i2c_read_le8(struct i2c_client *client)
90{
91	return i2c_smbus_read_byte(client);
92}
93
94/* Talk to 16-bit I/O expander */
95
96static int i2c_write_le16(struct i2c_client *client, unsigned int word)
97{
98	u8 buf[2] = { word & 0xff, word >> 8, };
99	int status;
100
101	status = i2c_master_send(client, buf, 2);
102	return (status < 0) ? status : 0;
103}
104
105static int i2c_read_le16(struct i2c_client *client)
106{
107	u8 buf[2];
108	int status;
109
110	status = i2c_master_recv(client, buf, 2);
111	if (status < 0)
112		return status;
113	return (buf[1] << 8) | buf[0];
114}
115
116/*-------------------------------------------------------------------------*/
117
118static int pcf857x_input(struct gpio_chip *chip, unsigned int offset)
119{
120	struct pcf857x *gpio = gpiochip_get_data(chip);
121	int status;
122
123	mutex_lock(&gpio->lock);
124	gpio->out |= (1 << offset);
125	status = gpio->write(gpio->client, gpio->out);
126	mutex_unlock(&gpio->lock);
127
128	return status;
129}
130
131static int pcf857x_get(struct gpio_chip *chip, unsigned int offset)
132{
133	struct pcf857x *gpio = gpiochip_get_data(chip);
134	int value;
135
136	value = gpio->read(gpio->client);
137	return (value < 0) ? value : !!(value & (1 << offset));
138}
139
140static int pcf857x_get_multiple(struct gpio_chip *chip, unsigned long *mask,
141				unsigned long *bits)
142{
143	struct pcf857x *gpio = gpiochip_get_data(chip);
144	int value = gpio->read(gpio->client);
145
146	if (value < 0)
147		return value;
148
149	*bits &= ~*mask;
150	*bits |= value & *mask;
151
152	return 0;
153}
154
155static int pcf857x_output(struct gpio_chip *chip, unsigned int offset, int value)
156{
157	struct pcf857x *gpio = gpiochip_get_data(chip);
158	unsigned int bit = 1 << offset;
159	int status;
160
161	mutex_lock(&gpio->lock);
162	if (value)
163		gpio->out |= bit;
164	else
165		gpio->out &= ~bit;
166	status = gpio->write(gpio->client, gpio->out);
167	mutex_unlock(&gpio->lock);
168
169	return status;
170}
171
172static void pcf857x_set(struct gpio_chip *chip, unsigned int offset, int value)
173{
174	pcf857x_output(chip, offset, value);
175}
176
177static void pcf857x_set_multiple(struct gpio_chip *chip, unsigned long *mask,
178				 unsigned long *bits)
179{
180	struct pcf857x *gpio = gpiochip_get_data(chip);
181
182	mutex_lock(&gpio->lock);
183	gpio->out &= ~*mask;
184	gpio->out |= *bits & *mask;
185	gpio->write(gpio->client, gpio->out);
186	mutex_unlock(&gpio->lock);
187}
188
189/*-------------------------------------------------------------------------*/
190
191static irqreturn_t pcf857x_irq(int irq, void *data)
192{
193	struct pcf857x *gpio = data;
194	unsigned long change, i, status;
195
196	status = gpio->read(gpio->client);
197
198	/*
199	 * call the interrupt handler iff gpio is used as
200	 * interrupt source, just to avoid bad irqs
201	 */
202	mutex_lock(&gpio->lock);
203	change = (gpio->status ^ status) & gpio->irq_enabled;
204	gpio->status = status;
205	mutex_unlock(&gpio->lock);
206
207	for_each_set_bit(i, &change, gpio->chip.ngpio)
208		handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
209
210	return IRQ_HANDLED;
211}
212
213/*
214 * NOP functions
215 */
216static void noop(struct irq_data *data) { }
217
218static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
219{
220	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
221
222	return irq_set_irq_wake(gpio->client->irq, on);
223}
224
225static void pcf857x_irq_enable(struct irq_data *data)
226{
227	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
228	irq_hw_number_t hwirq = irqd_to_hwirq(data);
229
230	gpiochip_enable_irq(&gpio->chip, hwirq);
231	gpio->irq_enabled |= (1 << hwirq);
232}
233
234static void pcf857x_irq_disable(struct irq_data *data)
235{
236	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
237	irq_hw_number_t hwirq = irqd_to_hwirq(data);
238
239	gpio->irq_enabled &= ~(1 << hwirq);
240	gpiochip_disable_irq(&gpio->chip, hwirq);
241}
242
243static void pcf857x_irq_bus_lock(struct irq_data *data)
244{
245	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
246
247	mutex_lock(&gpio->lock);
248}
249
250static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
251{
252	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
253
254	mutex_unlock(&gpio->lock);
255}
256
257static const struct irq_chip pcf857x_irq_chip = {
258	.name			= "pcf857x",
259	.irq_enable		= pcf857x_irq_enable,
260	.irq_disable		= pcf857x_irq_disable,
261	.irq_ack		= noop,
262	.irq_mask		= noop,
263	.irq_unmask		= noop,
264	.irq_set_wake		= pcf857x_irq_set_wake,
265	.irq_bus_lock		= pcf857x_irq_bus_lock,
266	.irq_bus_sync_unlock	= pcf857x_irq_bus_sync_unlock,
267	.flags			= IRQCHIP_IMMUTABLE,
268	GPIOCHIP_IRQ_RESOURCE_HELPERS,
269};
270
271/*-------------------------------------------------------------------------*/
272
273static int pcf857x_probe(struct i2c_client *client)
274{
275	struct pcf857x *gpio;
276	unsigned int n_latch = 0;
277	int status;
278
279	device_property_read_u32(&client->dev, "lines-initial-states", &n_latch);
280
281	/* Allocate, initialize, and register this gpio_chip. */
282	gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
283	if (!gpio)
284		return -ENOMEM;
285
286	mutex_init(&gpio->lock);
287
288	gpio->chip.base			= -1;
289	gpio->chip.can_sleep		= true;
290	gpio->chip.parent		= &client->dev;
291	gpio->chip.owner		= THIS_MODULE;
292	gpio->chip.get			= pcf857x_get;
293	gpio->chip.get_multiple		= pcf857x_get_multiple;
294	gpio->chip.set			= pcf857x_set;
295	gpio->chip.set_multiple		= pcf857x_set_multiple;
296	gpio->chip.direction_input	= pcf857x_input;
297	gpio->chip.direction_output	= pcf857x_output;
298	gpio->chip.ngpio		= (uintptr_t)i2c_get_match_data(client);
299
300	/* NOTE:  the OnSemi jlc1562b is also largely compatible with
301	 * these parts, notably for output.  It has a low-resolution
302	 * DAC instead of pin change IRQs; and its inputs can be the
303	 * result of comparators.
304	 */
305
306	/* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
307	 * 9670, 9672, 9764, and 9764a use quite a variety.
308	 *
309	 * NOTE: we don't distinguish here between *4 and *4a parts.
310	 */
311	if (gpio->chip.ngpio == 8) {
312		gpio->write	= i2c_write_le8;
313		gpio->read	= i2c_read_le8;
314
315		if (!i2c_check_functionality(client->adapter,
316				I2C_FUNC_SMBUS_BYTE))
317			status = -EIO;
318
319		/* fail if there's no chip present */
320		else
321			status = i2c_smbus_read_byte(client);
322
323	/* '75/'75c addresses are 0x20..0x27, just like the '74;
324	 * the '75c doesn't have a current source pulling high.
325	 * 9671, 9673, and 9765 use quite a variety of addresses.
326	 *
327	 * NOTE: we don't distinguish here between '75 and '75c parts.
328	 */
329	} else if (gpio->chip.ngpio == 16) {
330		gpio->write	= i2c_write_le16;
331		gpio->read	= i2c_read_le16;
332
333		if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
334			status = -EIO;
335
336		/* fail if there's no chip present */
337		else
338			status = i2c_read_le16(client);
339
340	} else {
341		dev_dbg(&client->dev, "unsupported number of gpios\n");
342		status = -EINVAL;
343	}
344
345	if (status < 0)
346		goto fail;
347
348	gpio->chip.label = client->name;
349
350	gpio->client = client;
351	i2c_set_clientdata(client, gpio);
352
353	/* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
354	 * We can't actually know whether a pin is configured (a) as output
355	 * and driving the signal low, or (b) as input and reporting a low
356	 * value ... without knowing the last value written since the chip
357	 * came out of reset (if any).  We can't read the latched output.
358	 *
359	 * In short, the only reliable solution for setting up pin direction
360	 * is to do it explicitly.  The setup() method can do that, but it
361	 * may cause transient glitching since it can't know the last value
362	 * written (some pins may need to be driven low).
363	 *
364	 * Using n_latch avoids that trouble.  When left initialized to zero,
365	 * our software copy of the "latch" then matches the chip's all-ones
366	 * reset state.  Otherwise it flags pins to be driven low.
367	 */
368	gpio->out = ~n_latch;
369	gpio->status = gpio->read(gpio->client);
370
371	/* Enable irqchip if we have an interrupt */
372	if (client->irq) {
373		struct gpio_irq_chip *girq;
374
375		status = devm_request_threaded_irq(&client->dev, client->irq,
376					NULL, pcf857x_irq, IRQF_ONESHOT |
377					IRQF_TRIGGER_FALLING | IRQF_SHARED,
378					dev_name(&client->dev), gpio);
379		if (status)
380			goto fail;
381
382		girq = &gpio->chip.irq;
383		gpio_irq_chip_set_chip(girq, &pcf857x_irq_chip);
384		/* This will let us handle the parent IRQ in the driver */
385		girq->parent_handler = NULL;
386		girq->num_parents = 0;
387		girq->parents = NULL;
388		girq->default_type = IRQ_TYPE_NONE;
389		girq->handler = handle_level_irq;
390		girq->threaded = true;
391	}
392
393	status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
394	if (status < 0)
395		goto fail;
396
397	dev_info(&client->dev, "probed\n");
398
399	return 0;
400
401fail:
402	dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
403		client->name);
404
405	return status;
406}
407
408static void pcf857x_shutdown(struct i2c_client *client)
409{
410	struct pcf857x *gpio = i2c_get_clientdata(client);
411
412	/* Drive all the I/O lines high */
413	gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
414}
415
416static struct i2c_driver pcf857x_driver = {
417	.driver = {
418		.name	= "pcf857x",
419		.of_match_table = pcf857x_of_table,
420	},
421	.probe = pcf857x_probe,
422	.shutdown = pcf857x_shutdown,
423	.id_table = pcf857x_id,
424};
425
426static int __init pcf857x_init(void)
427{
428	return i2c_add_driver(&pcf857x_driver);
429}
430/* register after i2c postcore initcall and before
431 * subsys initcalls that may rely on these GPIOs
432 */
433subsys_initcall(pcf857x_init);
434
435static void __exit pcf857x_exit(void)
436{
437	i2c_del_driver(&pcf857x_driver);
438}
439module_exit(pcf857x_exit);
440
441MODULE_LICENSE("GPL");
442MODULE_AUTHOR("David Brownell");
443