1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (C) 2005-2007 Kristian Hoegsberg <krh@bitplanet.net> 4 */ 5 6#include <linux/bug.h> 7#include <linux/completion.h> 8#include <linux/crc-itu-t.h> 9#include <linux/device.h> 10#include <linux/errno.h> 11#include <linux/firewire.h> 12#include <linux/firewire-constants.h> 13#include <linux/jiffies.h> 14#include <linux/kernel.h> 15#include <linux/kref.h> 16#include <linux/list.h> 17#include <linux/module.h> 18#include <linux/mutex.h> 19#include <linux/spinlock.h> 20#include <linux/workqueue.h> 21 22#include <linux/atomic.h> 23#include <asm/byteorder.h> 24 25#include "core.h" 26 27#define define_fw_printk_level(func, kern_level) \ 28void func(const struct fw_card *card, const char *fmt, ...) \ 29{ \ 30 struct va_format vaf; \ 31 va_list args; \ 32 \ 33 va_start(args, fmt); \ 34 vaf.fmt = fmt; \ 35 vaf.va = &args; \ 36 printk(kern_level KBUILD_MODNAME " %s: %pV", \ 37 dev_name(card->device), &vaf); \ 38 va_end(args); \ 39} 40define_fw_printk_level(fw_err, KERN_ERR); 41define_fw_printk_level(fw_notice, KERN_NOTICE); 42 43int fw_compute_block_crc(__be32 *block) 44{ 45 int length; 46 u16 crc; 47 48 length = (be32_to_cpu(block[0]) >> 16) & 0xff; 49 crc = crc_itu_t(0, (u8 *)&block[1], length * 4); 50 *block |= cpu_to_be32(crc); 51 52 return length; 53} 54 55static DEFINE_MUTEX(card_mutex); 56static LIST_HEAD(card_list); 57 58static LIST_HEAD(descriptor_list); 59static int descriptor_count; 60 61static __be32 tmp_config_rom[256]; 62/* ROM header, bus info block, root dir header, capabilities = 7 quadlets */ 63static size_t config_rom_length = 1 + 4 + 1 + 1; 64 65#define BIB_CRC(v) ((v) << 0) 66#define BIB_CRC_LENGTH(v) ((v) << 16) 67#define BIB_INFO_LENGTH(v) ((v) << 24) 68#define BIB_BUS_NAME 0x31333934 /* "1394" */ 69#define BIB_LINK_SPEED(v) ((v) << 0) 70#define BIB_GENERATION(v) ((v) << 4) 71#define BIB_MAX_ROM(v) ((v) << 8) 72#define BIB_MAX_RECEIVE(v) ((v) << 12) 73#define BIB_CYC_CLK_ACC(v) ((v) << 16) 74#define BIB_PMC ((1) << 27) 75#define BIB_BMC ((1) << 28) 76#define BIB_ISC ((1) << 29) 77#define BIB_CMC ((1) << 30) 78#define BIB_IRMC ((1) << 31) 79#define NODE_CAPABILITIES 0x0c0083c0 /* per IEEE 1394 clause 8.3.2.6.5.2 */ 80 81/* 82 * IEEE-1394 specifies a default SPLIT_TIMEOUT value of 800 cycles (100 ms), 83 * but we have to make it longer because there are many devices whose firmware 84 * is just too slow for that. 85 */ 86#define DEFAULT_SPLIT_TIMEOUT (2 * 8000) 87 88#define CANON_OUI 0x000085 89 90static void generate_config_rom(struct fw_card *card, __be32 *config_rom) 91{ 92 struct fw_descriptor *desc; 93 int i, j, k, length; 94 95 /* 96 * Initialize contents of config rom buffer. On the OHCI 97 * controller, block reads to the config rom accesses the host 98 * memory, but quadlet read access the hardware bus info block 99 * registers. That's just crack, but it means we should make 100 * sure the contents of bus info block in host memory matches 101 * the version stored in the OHCI registers. 102 */ 103 104 config_rom[0] = cpu_to_be32( 105 BIB_CRC_LENGTH(4) | BIB_INFO_LENGTH(4) | BIB_CRC(0)); 106 config_rom[1] = cpu_to_be32(BIB_BUS_NAME); 107 config_rom[2] = cpu_to_be32( 108 BIB_LINK_SPEED(card->link_speed) | 109 BIB_GENERATION(card->config_rom_generation++ % 14 + 2) | 110 BIB_MAX_ROM(2) | 111 BIB_MAX_RECEIVE(card->max_receive) | 112 BIB_BMC | BIB_ISC | BIB_CMC | BIB_IRMC); 113 config_rom[3] = cpu_to_be32(card->guid >> 32); 114 config_rom[4] = cpu_to_be32(card->guid); 115 116 /* Generate root directory. */ 117 config_rom[6] = cpu_to_be32(NODE_CAPABILITIES); 118 i = 7; 119 j = 7 + descriptor_count; 120 121 /* Generate root directory entries for descriptors. */ 122 list_for_each_entry (desc, &descriptor_list, link) { 123 if (desc->immediate > 0) 124 config_rom[i++] = cpu_to_be32(desc->immediate); 125 config_rom[i] = cpu_to_be32(desc->key | (j - i)); 126 i++; 127 j += desc->length; 128 } 129 130 /* Update root directory length. */ 131 config_rom[5] = cpu_to_be32((i - 5 - 1) << 16); 132 133 /* End of root directory, now copy in descriptors. */ 134 list_for_each_entry (desc, &descriptor_list, link) { 135 for (k = 0; k < desc->length; k++) 136 config_rom[i + k] = cpu_to_be32(desc->data[k]); 137 i += desc->length; 138 } 139 140 /* Calculate CRCs for all blocks in the config rom. This 141 * assumes that CRC length and info length are identical for 142 * the bus info block, which is always the case for this 143 * implementation. */ 144 for (i = 0; i < j; i += length + 1) 145 length = fw_compute_block_crc(config_rom + i); 146 147 WARN_ON(j != config_rom_length); 148} 149 150static void update_config_roms(void) 151{ 152 struct fw_card *card; 153 154 list_for_each_entry (card, &card_list, link) { 155 generate_config_rom(card, tmp_config_rom); 156 card->driver->set_config_rom(card, tmp_config_rom, 157 config_rom_length); 158 } 159} 160 161static size_t required_space(struct fw_descriptor *desc) 162{ 163 /* descriptor + entry into root dir + optional immediate entry */ 164 return desc->length + 1 + (desc->immediate > 0 ? 1 : 0); 165} 166 167int fw_core_add_descriptor(struct fw_descriptor *desc) 168{ 169 size_t i; 170 int ret; 171 172 /* 173 * Check descriptor is valid; the length of all blocks in the 174 * descriptor has to add up to exactly the length of the 175 * block. 176 */ 177 i = 0; 178 while (i < desc->length) 179 i += (desc->data[i] >> 16) + 1; 180 181 if (i != desc->length) 182 return -EINVAL; 183 184 mutex_lock(&card_mutex); 185 186 if (config_rom_length + required_space(desc) > 256) { 187 ret = -EBUSY; 188 } else { 189 list_add_tail(&desc->link, &descriptor_list); 190 config_rom_length += required_space(desc); 191 descriptor_count++; 192 if (desc->immediate > 0) 193 descriptor_count++; 194 update_config_roms(); 195 ret = 0; 196 } 197 198 mutex_unlock(&card_mutex); 199 200 return ret; 201} 202EXPORT_SYMBOL(fw_core_add_descriptor); 203 204void fw_core_remove_descriptor(struct fw_descriptor *desc) 205{ 206 mutex_lock(&card_mutex); 207 208 list_del(&desc->link); 209 config_rom_length -= required_space(desc); 210 descriptor_count--; 211 if (desc->immediate > 0) 212 descriptor_count--; 213 update_config_roms(); 214 215 mutex_unlock(&card_mutex); 216} 217EXPORT_SYMBOL(fw_core_remove_descriptor); 218 219static int reset_bus(struct fw_card *card, bool short_reset) 220{ 221 int reg = short_reset ? 5 : 1; 222 int bit = short_reset ? PHY_BUS_SHORT_RESET : PHY_BUS_RESET; 223 224 return card->driver->update_phy_reg(card, reg, 0, bit); 225} 226 227void fw_schedule_bus_reset(struct fw_card *card, bool delayed, bool short_reset) 228{ 229 /* We don't try hard to sort out requests of long vs. short resets. */ 230 card->br_short = short_reset; 231 232 /* Use an arbitrary short delay to combine multiple reset requests. */ 233 fw_card_get(card); 234 if (!queue_delayed_work(fw_workqueue, &card->br_work, 235 delayed ? DIV_ROUND_UP(HZ, 100) : 0)) 236 fw_card_put(card); 237} 238EXPORT_SYMBOL(fw_schedule_bus_reset); 239 240static void br_work(struct work_struct *work) 241{ 242 struct fw_card *card = container_of(work, struct fw_card, br_work.work); 243 244 /* Delay for 2s after last reset per IEEE 1394 clause 8.2.1. */ 245 if (card->reset_jiffies != 0 && 246 time_before64(get_jiffies_64(), card->reset_jiffies + 2 * HZ)) { 247 if (!queue_delayed_work(fw_workqueue, &card->br_work, 2 * HZ)) 248 fw_card_put(card); 249 return; 250 } 251 252 fw_send_phy_config(card, FW_PHY_CONFIG_NO_NODE_ID, card->generation, 253 FW_PHY_CONFIG_CURRENT_GAP_COUNT); 254 reset_bus(card, card->br_short); 255 fw_card_put(card); 256} 257 258static void allocate_broadcast_channel(struct fw_card *card, int generation) 259{ 260 int channel, bandwidth = 0; 261 262 if (!card->broadcast_channel_allocated) { 263 fw_iso_resource_manage(card, generation, 1ULL << 31, 264 &channel, &bandwidth, true); 265 if (channel != 31) { 266 fw_notice(card, "failed to allocate broadcast channel\n"); 267 return; 268 } 269 card->broadcast_channel_allocated = true; 270 } 271 272 device_for_each_child(card->device, (void *)(long)generation, 273 fw_device_set_broadcast_channel); 274} 275 276static const char gap_count_table[] = { 277 63, 5, 7, 8, 10, 13, 16, 18, 21, 24, 26, 29, 32, 35, 37, 40 278}; 279 280void fw_schedule_bm_work(struct fw_card *card, unsigned long delay) 281{ 282 fw_card_get(card); 283 if (!schedule_delayed_work(&card->bm_work, delay)) 284 fw_card_put(card); 285} 286 287static void bm_work(struct work_struct *work) 288{ 289 struct fw_card *card = container_of(work, struct fw_card, bm_work.work); 290 struct fw_device *root_device, *irm_device; 291 struct fw_node *root_node; 292 int root_id, new_root_id, irm_id, bm_id, local_id; 293 int gap_count, generation, grace, rcode; 294 bool do_reset = false; 295 bool root_device_is_running; 296 bool root_device_is_cmc; 297 bool irm_is_1394_1995_only; 298 bool keep_this_irm; 299 __be32 transaction_data[2]; 300 301 spin_lock_irq(&card->lock); 302 303 if (card->local_node == NULL) { 304 spin_unlock_irq(&card->lock); 305 goto out_put_card; 306 } 307 308 generation = card->generation; 309 310 root_node = card->root_node; 311 fw_node_get(root_node); 312 root_device = root_node->data; 313 root_device_is_running = root_device && 314 atomic_read(&root_device->state) == FW_DEVICE_RUNNING; 315 root_device_is_cmc = root_device && root_device->cmc; 316 317 irm_device = card->irm_node->data; 318 irm_is_1394_1995_only = irm_device && irm_device->config_rom && 319 (irm_device->config_rom[2] & 0x000000f0) == 0; 320 321 /* Canon MV5i works unreliably if it is not root node. */ 322 keep_this_irm = irm_device && irm_device->config_rom && 323 irm_device->config_rom[3] >> 8 == CANON_OUI; 324 325 root_id = root_node->node_id; 326 irm_id = card->irm_node->node_id; 327 local_id = card->local_node->node_id; 328 329 grace = time_after64(get_jiffies_64(), 330 card->reset_jiffies + DIV_ROUND_UP(HZ, 8)); 331 332 if ((is_next_generation(generation, card->bm_generation) && 333 !card->bm_abdicate) || 334 (card->bm_generation != generation && grace)) { 335 /* 336 * This first step is to figure out who is IRM and 337 * then try to become bus manager. If the IRM is not 338 * well defined (e.g. does not have an active link 339 * layer or does not responds to our lock request, we 340 * will have to do a little vigilante bus management. 341 * In that case, we do a goto into the gap count logic 342 * so that when we do the reset, we still optimize the 343 * gap count. That could well save a reset in the 344 * next generation. 345 */ 346 347 if (!card->irm_node->link_on) { 348 new_root_id = local_id; 349 fw_notice(card, "%s, making local node (%02x) root\n", 350 "IRM has link off", new_root_id); 351 goto pick_me; 352 } 353 354 if (irm_is_1394_1995_only && !keep_this_irm) { 355 new_root_id = local_id; 356 fw_notice(card, "%s, making local node (%02x) root\n", 357 "IRM is not 1394a compliant", new_root_id); 358 goto pick_me; 359 } 360 361 transaction_data[0] = cpu_to_be32(0x3f); 362 transaction_data[1] = cpu_to_be32(local_id); 363 364 spin_unlock_irq(&card->lock); 365 366 rcode = fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP, 367 irm_id, generation, SCODE_100, 368 CSR_REGISTER_BASE + CSR_BUS_MANAGER_ID, 369 transaction_data, 8); 370 371 if (rcode == RCODE_GENERATION) 372 /* Another bus reset, BM work has been rescheduled. */ 373 goto out; 374 375 bm_id = be32_to_cpu(transaction_data[0]); 376 377 spin_lock_irq(&card->lock); 378 if (rcode == RCODE_COMPLETE && generation == card->generation) 379 card->bm_node_id = 380 bm_id == 0x3f ? local_id : 0xffc0 | bm_id; 381 spin_unlock_irq(&card->lock); 382 383 if (rcode == RCODE_COMPLETE && bm_id != 0x3f) { 384 /* Somebody else is BM. Only act as IRM. */ 385 if (local_id == irm_id) 386 allocate_broadcast_channel(card, generation); 387 388 goto out; 389 } 390 391 if (rcode == RCODE_SEND_ERROR) { 392 /* 393 * We have been unable to send the lock request due to 394 * some local problem. Let's try again later and hope 395 * that the problem has gone away by then. 396 */ 397 fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8)); 398 goto out; 399 } 400 401 spin_lock_irq(&card->lock); 402 403 if (rcode != RCODE_COMPLETE && !keep_this_irm) { 404 /* 405 * The lock request failed, maybe the IRM 406 * isn't really IRM capable after all. Let's 407 * do a bus reset and pick the local node as 408 * root, and thus, IRM. 409 */ 410 new_root_id = local_id; 411 fw_notice(card, "BM lock failed (%s), making local node (%02x) root\n", 412 fw_rcode_string(rcode), new_root_id); 413 goto pick_me; 414 } 415 } else if (card->bm_generation != generation) { 416 /* 417 * We weren't BM in the last generation, and the last 418 * bus reset is less than 125ms ago. Reschedule this job. 419 */ 420 spin_unlock_irq(&card->lock); 421 fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8)); 422 goto out; 423 } 424 425 /* 426 * We're bus manager for this generation, so next step is to 427 * make sure we have an active cycle master and do gap count 428 * optimization. 429 */ 430 card->bm_generation = generation; 431 432 if (card->gap_count == 0) { 433 /* 434 * If self IDs have inconsistent gap counts, do a 435 * bus reset ASAP. The config rom read might never 436 * complete, so don't wait for it. However, still 437 * send a PHY configuration packet prior to the 438 * bus reset. The PHY configuration packet might 439 * fail, but 1394-2008 8.4.5.2 explicitly permits 440 * it in this case, so it should be safe to try. 441 */ 442 new_root_id = local_id; 443 /* 444 * We must always send a bus reset if the gap count 445 * is inconsistent, so bypass the 5-reset limit. 446 */ 447 card->bm_retries = 0; 448 } else if (root_device == NULL) { 449 /* 450 * Either link_on is false, or we failed to read the 451 * config rom. In either case, pick another root. 452 */ 453 new_root_id = local_id; 454 } else if (!root_device_is_running) { 455 /* 456 * If we haven't probed this device yet, bail out now 457 * and let's try again once that's done. 458 */ 459 spin_unlock_irq(&card->lock); 460 goto out; 461 } else if (root_device_is_cmc) { 462 /* 463 * We will send out a force root packet for this 464 * node as part of the gap count optimization. 465 */ 466 new_root_id = root_id; 467 } else { 468 /* 469 * Current root has an active link layer and we 470 * successfully read the config rom, but it's not 471 * cycle master capable. 472 */ 473 new_root_id = local_id; 474 } 475 476 pick_me: 477 /* 478 * Pick a gap count from 1394a table E-1. The table doesn't cover 479 * the typically much larger 1394b beta repeater delays though. 480 */ 481 if (!card->beta_repeaters_present && 482 root_node->max_hops < ARRAY_SIZE(gap_count_table)) 483 gap_count = gap_count_table[root_node->max_hops]; 484 else 485 gap_count = 63; 486 487 /* 488 * Finally, figure out if we should do a reset or not. If we have 489 * done less than 5 resets with the same physical topology and we 490 * have either a new root or a new gap count setting, let's do it. 491 */ 492 493 if (card->bm_retries++ < 5 && 494 (card->gap_count != gap_count || new_root_id != root_id)) 495 do_reset = true; 496 497 spin_unlock_irq(&card->lock); 498 499 if (do_reset) { 500 fw_notice(card, "phy config: new root=%x, gap_count=%d\n", 501 new_root_id, gap_count); 502 fw_send_phy_config(card, new_root_id, generation, gap_count); 503 /* 504 * Where possible, use a short bus reset to minimize 505 * disruption to isochronous transfers. But in the event 506 * of a gap count inconsistency, use a long bus reset. 507 * 508 * As noted in 1394a 8.4.6.2, nodes on a mixed 1394/1394a bus 509 * may set different gap counts after a bus reset. On a mixed 510 * 1394/1394a bus, a short bus reset can get doubled. Some 511 * nodes may treat the double reset as one bus reset and others 512 * may treat it as two, causing a gap count inconsistency 513 * again. Using a long bus reset prevents this. 514 */ 515 reset_bus(card, card->gap_count != 0); 516 /* Will allocate broadcast channel after the reset. */ 517 goto out; 518 } 519 520 if (root_device_is_cmc) { 521 /* 522 * Make sure that the cycle master sends cycle start packets. 523 */ 524 transaction_data[0] = cpu_to_be32(CSR_STATE_BIT_CMSTR); 525 rcode = fw_run_transaction(card, TCODE_WRITE_QUADLET_REQUEST, 526 root_id, generation, SCODE_100, 527 CSR_REGISTER_BASE + CSR_STATE_SET, 528 transaction_data, 4); 529 if (rcode == RCODE_GENERATION) 530 goto out; 531 } 532 533 if (local_id == irm_id) 534 allocate_broadcast_channel(card, generation); 535 536 out: 537 fw_node_put(root_node); 538 out_put_card: 539 fw_card_put(card); 540} 541 542void fw_card_initialize(struct fw_card *card, 543 const struct fw_card_driver *driver, 544 struct device *device) 545{ 546 static atomic_t index = ATOMIC_INIT(-1); 547 548 card->index = atomic_inc_return(&index); 549 card->driver = driver; 550 card->device = device; 551 card->current_tlabel = 0; 552 card->tlabel_mask = 0; 553 card->split_timeout_hi = DEFAULT_SPLIT_TIMEOUT / 8000; 554 card->split_timeout_lo = (DEFAULT_SPLIT_TIMEOUT % 8000) << 19; 555 card->split_timeout_cycles = DEFAULT_SPLIT_TIMEOUT; 556 card->split_timeout_jiffies = 557 DIV_ROUND_UP(DEFAULT_SPLIT_TIMEOUT * HZ, 8000); 558 card->color = 0; 559 card->broadcast_channel = BROADCAST_CHANNEL_INITIAL; 560 561 kref_init(&card->kref); 562 init_completion(&card->done); 563 INIT_LIST_HEAD(&card->transaction_list); 564 INIT_LIST_HEAD(&card->phy_receiver_list); 565 spin_lock_init(&card->lock); 566 567 card->local_node = NULL; 568 569 INIT_DELAYED_WORK(&card->br_work, br_work); 570 INIT_DELAYED_WORK(&card->bm_work, bm_work); 571} 572EXPORT_SYMBOL(fw_card_initialize); 573 574int fw_card_add(struct fw_card *card, 575 u32 max_receive, u32 link_speed, u64 guid) 576{ 577 int ret; 578 579 card->max_receive = max_receive; 580 card->link_speed = link_speed; 581 card->guid = guid; 582 583 mutex_lock(&card_mutex); 584 585 generate_config_rom(card, tmp_config_rom); 586 ret = card->driver->enable(card, tmp_config_rom, config_rom_length); 587 if (ret == 0) 588 list_add_tail(&card->link, &card_list); 589 590 mutex_unlock(&card_mutex); 591 592 return ret; 593} 594EXPORT_SYMBOL(fw_card_add); 595 596/* 597 * The next few functions implement a dummy driver that is used once a card 598 * driver shuts down an fw_card. This allows the driver to cleanly unload, 599 * as all IO to the card will be handled (and failed) by the dummy driver 600 * instead of calling into the module. Only functions for iso context 601 * shutdown still need to be provided by the card driver. 602 * 603 * .read/write_csr() should never be called anymore after the dummy driver 604 * was bound since they are only used within request handler context. 605 * .set_config_rom() is never called since the card is taken out of card_list 606 * before switching to the dummy driver. 607 */ 608 609static int dummy_read_phy_reg(struct fw_card *card, int address) 610{ 611 return -ENODEV; 612} 613 614static int dummy_update_phy_reg(struct fw_card *card, int address, 615 int clear_bits, int set_bits) 616{ 617 return -ENODEV; 618} 619 620static void dummy_send_request(struct fw_card *card, struct fw_packet *packet) 621{ 622 packet->callback(packet, card, RCODE_CANCELLED); 623} 624 625static void dummy_send_response(struct fw_card *card, struct fw_packet *packet) 626{ 627 packet->callback(packet, card, RCODE_CANCELLED); 628} 629 630static int dummy_cancel_packet(struct fw_card *card, struct fw_packet *packet) 631{ 632 return -ENOENT; 633} 634 635static int dummy_enable_phys_dma(struct fw_card *card, 636 int node_id, int generation) 637{ 638 return -ENODEV; 639} 640 641static struct fw_iso_context *dummy_allocate_iso_context(struct fw_card *card, 642 int type, int channel, size_t header_size) 643{ 644 return ERR_PTR(-ENODEV); 645} 646 647static u32 dummy_read_csr(struct fw_card *card, int csr_offset) 648{ 649 return 0; 650} 651 652static void dummy_write_csr(struct fw_card *card, int csr_offset, u32 value) 653{ 654} 655 656static int dummy_start_iso(struct fw_iso_context *ctx, 657 s32 cycle, u32 sync, u32 tags) 658{ 659 return -ENODEV; 660} 661 662static int dummy_set_iso_channels(struct fw_iso_context *ctx, u64 *channels) 663{ 664 return -ENODEV; 665} 666 667static int dummy_queue_iso(struct fw_iso_context *ctx, struct fw_iso_packet *p, 668 struct fw_iso_buffer *buffer, unsigned long payload) 669{ 670 return -ENODEV; 671} 672 673static void dummy_flush_queue_iso(struct fw_iso_context *ctx) 674{ 675} 676 677static int dummy_flush_iso_completions(struct fw_iso_context *ctx) 678{ 679 return -ENODEV; 680} 681 682static const struct fw_card_driver dummy_driver_template = { 683 .read_phy_reg = dummy_read_phy_reg, 684 .update_phy_reg = dummy_update_phy_reg, 685 .send_request = dummy_send_request, 686 .send_response = dummy_send_response, 687 .cancel_packet = dummy_cancel_packet, 688 .enable_phys_dma = dummy_enable_phys_dma, 689 .read_csr = dummy_read_csr, 690 .write_csr = dummy_write_csr, 691 .allocate_iso_context = dummy_allocate_iso_context, 692 .start_iso = dummy_start_iso, 693 .set_iso_channels = dummy_set_iso_channels, 694 .queue_iso = dummy_queue_iso, 695 .flush_queue_iso = dummy_flush_queue_iso, 696 .flush_iso_completions = dummy_flush_iso_completions, 697}; 698 699void fw_card_release(struct kref *kref) 700{ 701 struct fw_card *card = container_of(kref, struct fw_card, kref); 702 703 complete(&card->done); 704} 705EXPORT_SYMBOL_GPL(fw_card_release); 706 707void fw_core_remove_card(struct fw_card *card) 708{ 709 struct fw_card_driver dummy_driver = dummy_driver_template; 710 unsigned long flags; 711 712 card->driver->update_phy_reg(card, 4, 713 PHY_LINK_ACTIVE | PHY_CONTENDER, 0); 714 fw_schedule_bus_reset(card, false, true); 715 716 mutex_lock(&card_mutex); 717 list_del_init(&card->link); 718 mutex_unlock(&card_mutex); 719 720 /* Switch off most of the card driver interface. */ 721 dummy_driver.free_iso_context = card->driver->free_iso_context; 722 dummy_driver.stop_iso = card->driver->stop_iso; 723 card->driver = &dummy_driver; 724 725 spin_lock_irqsave(&card->lock, flags); 726 fw_destroy_nodes(card); 727 spin_unlock_irqrestore(&card->lock, flags); 728 729 /* Wait for all users, especially device workqueue jobs, to finish. */ 730 fw_card_put(card); 731 wait_for_completion(&card->done); 732 733 WARN_ON(!list_empty(&card->transaction_list)); 734} 735EXPORT_SYMBOL(fw_core_remove_card); 736 737/** 738 * fw_card_read_cycle_time: read from Isochronous Cycle Timer Register of 1394 OHCI in MMIO region 739 * for controller card. 740 * @card: The instance of card for 1394 OHCI controller. 741 * @cycle_time: The mutual reference to value of cycle time for the read operation. 742 * 743 * Read value from Isochronous Cycle Timer Register of 1394 OHCI in MMIO region for the given 744 * controller card. This function accesses the region without any lock primitives or IRQ mask. 745 * When returning successfully, the content of @value argument has value aligned to host endianness, 746 * formetted by CYCLE_TIME CSR Register of IEEE 1394 std. 747 * 748 * Context: Any context. 749 * Return: 750 * * 0 - Read successfully. 751 * * -ENODEV - The controller is unavailable due to being removed or unbound. 752 */ 753int fw_card_read_cycle_time(struct fw_card *card, u32 *cycle_time) 754{ 755 if (card->driver->read_csr == dummy_read_csr) 756 return -ENODEV; 757 758 // It's possible to switch to dummy driver between the above and the below. This is the best 759 // effort to return -ENODEV. 760 *cycle_time = card->driver->read_csr(card, CSR_CYCLE_TIME); 761 return 0; 762} 763EXPORT_SYMBOL_GPL(fw_card_read_cycle_time); 764