1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2005, 2006 IBM Corporation
4 * Copyright (C) 2014, 2015 Intel Corporation
5 *
6 * Authors:
7 * Leendert van Doorn <leendert@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
9 *
10 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
11 *
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
14 *
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.2, revision 1.0.
17 */
18#include <linux/init.h>
19#include <linux/module.h>
20#include <linux/moduleparam.h>
21#include <linux/pnp.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
24#include <linux/wait.h>
25#include <linux/acpi.h>
26#include <linux/freezer.h>
27#include <linux/dmi.h>
28#include "tpm.h"
29#include "tpm_tis_core.h"
30
31#define TPM_TIS_MAX_UNHANDLED_IRQS	1000
32
33static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
34
35static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
36					bool check_cancel, bool *canceled)
37{
38	u8 status = chip->ops->status(chip);
39
40	*canceled = false;
41	if ((status & mask) == mask)
42		return true;
43	if (check_cancel && chip->ops->req_canceled(chip, status)) {
44		*canceled = true;
45		return true;
46	}
47	return false;
48}
49
50static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask)
51{
52	if (!(int_mask & TPM_INTF_STS_VALID_INT))
53		sts_mask &= ~TPM_STS_VALID;
54
55	if (!(int_mask & TPM_INTF_DATA_AVAIL_INT))
56		sts_mask &= ~TPM_STS_DATA_AVAIL;
57
58	if (!(int_mask & TPM_INTF_CMD_READY_INT))
59		sts_mask &= ~TPM_STS_COMMAND_READY;
60
61	return sts_mask;
62}
63
64static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
65		unsigned long timeout, wait_queue_head_t *queue,
66		bool check_cancel)
67{
68	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
69	unsigned long stop;
70	long rc;
71	u8 status;
72	bool canceled = false;
73	u8 sts_mask;
74	int ret = 0;
75
76	/* check current status */
77	status = chip->ops->status(chip);
78	if ((status & mask) == mask)
79		return 0;
80
81	sts_mask = mask & (TPM_STS_VALID | TPM_STS_DATA_AVAIL |
82			   TPM_STS_COMMAND_READY);
83	/* check what status changes can be handled by irqs */
84	sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask);
85
86	stop = jiffies + timeout;
87	/* process status changes with irq support */
88	if (sts_mask) {
89		ret = -ETIME;
90again:
91		timeout = stop - jiffies;
92		if ((long)timeout <= 0)
93			return -ETIME;
94		rc = wait_event_interruptible_timeout(*queue,
95			wait_for_tpm_stat_cond(chip, sts_mask, check_cancel,
96					       &canceled),
97			timeout);
98		if (rc > 0) {
99			if (canceled)
100				return -ECANCELED;
101			ret = 0;
102		}
103		if (rc == -ERESTARTSYS && freezing(current)) {
104			clear_thread_flag(TIF_SIGPENDING);
105			goto again;
106		}
107	}
108
109	if (ret)
110		return ret;
111
112	mask &= ~sts_mask;
113	if (!mask) /* all done */
114		return 0;
115	/* process status changes without irq support */
116	do {
117		status = chip->ops->status(chip);
118		if ((status & mask) == mask)
119			return 0;
120		usleep_range(priv->timeout_min,
121			     priv->timeout_max);
122	} while (time_before(jiffies, stop));
123	return -ETIME;
124}
125
126/* Before we attempt to access the TPM we must see that the valid bit is set.
127 * The specification says that this bit is 0 at reset and remains 0 until the
128 * 'TPM has gone through its self test and initialization and has established
129 * correct values in the other bits.'
130 */
131static int wait_startup(struct tpm_chip *chip, int l)
132{
133	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
134	unsigned long stop = jiffies + chip->timeout_a;
135
136	do {
137		int rc;
138		u8 access;
139
140		rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
141		if (rc < 0)
142			return rc;
143
144		if (access & TPM_ACCESS_VALID)
145			return 0;
146		tpm_msleep(TPM_TIMEOUT);
147	} while (time_before(jiffies, stop));
148	return -1;
149}
150
151static bool check_locality(struct tpm_chip *chip, int l)
152{
153	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
154	int rc;
155	u8 access;
156
157	rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
158	if (rc < 0)
159		return false;
160
161	if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
162		       | TPM_ACCESS_REQUEST_USE)) ==
163	    (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
164		priv->locality = l;
165		return true;
166	}
167
168	return false;
169}
170
171static int __tpm_tis_relinquish_locality(struct tpm_tis_data *priv, int l)
172{
173	tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
174
175	return 0;
176}
177
178static int tpm_tis_relinquish_locality(struct tpm_chip *chip, int l)
179{
180	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
181
182	mutex_lock(&priv->locality_count_mutex);
183	priv->locality_count--;
184	if (priv->locality_count == 0)
185		__tpm_tis_relinquish_locality(priv, l);
186	mutex_unlock(&priv->locality_count_mutex);
187
188	return 0;
189}
190
191static int __tpm_tis_request_locality(struct tpm_chip *chip, int l)
192{
193	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
194	unsigned long stop, timeout;
195	long rc;
196
197	if (check_locality(chip, l))
198		return l;
199
200	rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
201	if (rc < 0)
202		return rc;
203
204	stop = jiffies + chip->timeout_a;
205
206	if (chip->flags & TPM_CHIP_FLAG_IRQ) {
207again:
208		timeout = stop - jiffies;
209		if ((long)timeout <= 0)
210			return -1;
211		rc = wait_event_interruptible_timeout(priv->int_queue,
212						      (check_locality
213						       (chip, l)),
214						      timeout);
215		if (rc > 0)
216			return l;
217		if (rc == -ERESTARTSYS && freezing(current)) {
218			clear_thread_flag(TIF_SIGPENDING);
219			goto again;
220		}
221	} else {
222		/* wait for burstcount */
223		do {
224			if (check_locality(chip, l))
225				return l;
226			tpm_msleep(TPM_TIMEOUT);
227		} while (time_before(jiffies, stop));
228	}
229	return -1;
230}
231
232static int tpm_tis_request_locality(struct tpm_chip *chip, int l)
233{
234	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
235	int ret = 0;
236
237	mutex_lock(&priv->locality_count_mutex);
238	if (priv->locality_count == 0)
239		ret = __tpm_tis_request_locality(chip, l);
240	if (!ret)
241		priv->locality_count++;
242	mutex_unlock(&priv->locality_count_mutex);
243	return ret;
244}
245
246static u8 tpm_tis_status(struct tpm_chip *chip)
247{
248	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
249	int rc;
250	u8 status;
251
252	rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
253	if (rc < 0)
254		return 0;
255
256	if (unlikely((status & TPM_STS_READ_ZERO) != 0)) {
257		if  (!test_and_set_bit(TPM_TIS_INVALID_STATUS, &priv->flags)) {
258			/*
259			 * If this trips, the chances are the read is
260			 * returning 0xff because the locality hasn't been
261			 * acquired.  Usually because tpm_try_get_ops() hasn't
262			 * been called before doing a TPM operation.
263			 */
264			dev_err(&chip->dev, "invalid TPM_STS.x 0x%02x, dumping stack for forensics\n",
265				status);
266
267			/*
268			 * Dump stack for forensics, as invalid TPM_STS.x could be
269			 * potentially triggered by impaired tpm_try_get_ops() or
270			 * tpm_find_get_ops().
271			 */
272			dump_stack();
273		}
274
275		return 0;
276	}
277
278	return status;
279}
280
281static void tpm_tis_ready(struct tpm_chip *chip)
282{
283	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
284
285	/* this causes the current command to be aborted */
286	tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
287}
288
289static int get_burstcount(struct tpm_chip *chip)
290{
291	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
292	unsigned long stop;
293	int burstcnt, rc;
294	u32 value;
295
296	/* wait for burstcount */
297	if (chip->flags & TPM_CHIP_FLAG_TPM2)
298		stop = jiffies + chip->timeout_a;
299	else
300		stop = jiffies + chip->timeout_d;
301	do {
302		rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
303		if (rc < 0)
304			return rc;
305
306		burstcnt = (value >> 8) & 0xFFFF;
307		if (burstcnt)
308			return burstcnt;
309		usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
310	} while (time_before(jiffies, stop));
311	return -EBUSY;
312}
313
314static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
315{
316	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
317	int size = 0, burstcnt, rc;
318
319	while (size < count) {
320		rc = wait_for_tpm_stat(chip,
321				 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
322				 chip->timeout_c,
323				 &priv->read_queue, true);
324		if (rc < 0)
325			return rc;
326		burstcnt = get_burstcount(chip);
327		if (burstcnt < 0) {
328			dev_err(&chip->dev, "Unable to read burstcount\n");
329			return burstcnt;
330		}
331		burstcnt = min_t(int, burstcnt, count - size);
332
333		rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
334					burstcnt, buf + size);
335		if (rc < 0)
336			return rc;
337
338		size += burstcnt;
339	}
340	return size;
341}
342
343static int tpm_tis_try_recv(struct tpm_chip *chip, u8 *buf, size_t count)
344{
345	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
346	int size = 0;
347	int status;
348	u32 expected;
349	int rc;
350
351	size = recv_data(chip, buf, TPM_HEADER_SIZE);
352	/* read first 10 bytes, including tag, paramsize, and result */
353	if (size < TPM_HEADER_SIZE) {
354		dev_err(&chip->dev, "Unable to read header\n");
355		goto out;
356	}
357
358	expected = be32_to_cpu(*(__be32 *) (buf + 2));
359	if (expected > count || expected < TPM_HEADER_SIZE) {
360		size = -EIO;
361		goto out;
362	}
363
364	rc = recv_data(chip, &buf[TPM_HEADER_SIZE],
365		       expected - TPM_HEADER_SIZE);
366	if (rc < 0) {
367		size = rc;
368		goto out;
369	}
370	size += rc;
371	if (size < expected) {
372		dev_err(&chip->dev, "Unable to read remainder of result\n");
373		size = -ETIME;
374		goto out;
375	}
376
377	if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
378				&priv->int_queue, false) < 0) {
379		size = -ETIME;
380		goto out;
381	}
382	status = tpm_tis_status(chip);
383	if (status & TPM_STS_DATA_AVAIL) {
384		dev_err(&chip->dev, "Error left over data\n");
385		size = -EIO;
386		goto out;
387	}
388
389	rc = tpm_tis_verify_crc(priv, (size_t)size, buf);
390	if (rc < 0) {
391		dev_err(&chip->dev, "CRC mismatch for response.\n");
392		size = rc;
393		goto out;
394	}
395
396out:
397	return size;
398}
399
400static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
401{
402	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
403	unsigned int try;
404	int rc = 0;
405
406	if (count < TPM_HEADER_SIZE)
407		return -EIO;
408
409	for (try = 0; try < TPM_RETRY; try++) {
410		rc = tpm_tis_try_recv(chip, buf, count);
411
412		if (rc == -EIO)
413			/* Data transfer errors, indicated by EIO, can be
414			 * recovered by rereading the response.
415			 */
416			tpm_tis_write8(priv, TPM_STS(priv->locality),
417				       TPM_STS_RESPONSE_RETRY);
418		else
419			break;
420	}
421
422	tpm_tis_ready(chip);
423
424	return rc;
425}
426
427/*
428 * If interrupts are used (signaled by an irq set in the vendor structure)
429 * tpm.c can skip polling for the data to be available as the interrupt is
430 * waited for here
431 */
432static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
433{
434	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
435	int rc, status, burstcnt;
436	size_t count = 0;
437	bool itpm = test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
438
439	status = tpm_tis_status(chip);
440	if ((status & TPM_STS_COMMAND_READY) == 0) {
441		tpm_tis_ready(chip);
442		if (wait_for_tpm_stat
443		    (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
444		     &priv->int_queue, false) < 0) {
445			rc = -ETIME;
446			goto out_err;
447		}
448	}
449
450	while (count < len - 1) {
451		burstcnt = get_burstcount(chip);
452		if (burstcnt < 0) {
453			dev_err(&chip->dev, "Unable to read burstcount\n");
454			rc = burstcnt;
455			goto out_err;
456		}
457		burstcnt = min_t(int, burstcnt, len - count - 1);
458		rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
459					 burstcnt, buf + count);
460		if (rc < 0)
461			goto out_err;
462
463		count += burstcnt;
464
465		if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
466					&priv->int_queue, false) < 0) {
467			rc = -ETIME;
468			goto out_err;
469		}
470		status = tpm_tis_status(chip);
471		if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
472			rc = -EIO;
473			goto out_err;
474		}
475	}
476
477	/* write last byte */
478	rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
479	if (rc < 0)
480		goto out_err;
481
482	if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
483				&priv->int_queue, false) < 0) {
484		rc = -ETIME;
485		goto out_err;
486	}
487	status = tpm_tis_status(chip);
488	if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
489		rc = -EIO;
490		goto out_err;
491	}
492
493	rc = tpm_tis_verify_crc(priv, len, buf);
494	if (rc < 0) {
495		dev_err(&chip->dev, "CRC mismatch for command.\n");
496		goto out_err;
497	}
498
499	return 0;
500
501out_err:
502	tpm_tis_ready(chip);
503	return rc;
504}
505
506static void __tpm_tis_disable_interrupts(struct tpm_chip *chip)
507{
508	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
509	u32 int_mask = 0;
510
511	tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask);
512	int_mask &= ~TPM_GLOBAL_INT_ENABLE;
513	tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask);
514
515	chip->flags &= ~TPM_CHIP_FLAG_IRQ;
516}
517
518static void tpm_tis_disable_interrupts(struct tpm_chip *chip)
519{
520	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
521
522	if (priv->irq == 0)
523		return;
524
525	__tpm_tis_disable_interrupts(chip);
526
527	devm_free_irq(chip->dev.parent, priv->irq, chip);
528	priv->irq = 0;
529}
530
531/*
532 * If interrupts are used (signaled by an irq set in the vendor structure)
533 * tpm.c can skip polling for the data to be available as the interrupt is
534 * waited for here
535 */
536static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
537{
538	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
539	int rc;
540	u32 ordinal;
541	unsigned long dur;
542	unsigned int try;
543
544	for (try = 0; try < TPM_RETRY; try++) {
545		rc = tpm_tis_send_data(chip, buf, len);
546		if (rc >= 0)
547			/* Data transfer done successfully */
548			break;
549		else if (rc != -EIO)
550			/* Data transfer failed, not recoverable */
551			return rc;
552	}
553
554	/* go and do it */
555	rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
556	if (rc < 0)
557		goto out_err;
558
559	if (chip->flags & TPM_CHIP_FLAG_IRQ) {
560		ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
561
562		dur = tpm_calc_ordinal_duration(chip, ordinal);
563		if (wait_for_tpm_stat
564		    (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
565		     &priv->read_queue, false) < 0) {
566			rc = -ETIME;
567			goto out_err;
568		}
569	}
570	return 0;
571out_err:
572	tpm_tis_ready(chip);
573	return rc;
574}
575
576static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
577{
578	int rc, irq;
579	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
580
581	if (!(chip->flags & TPM_CHIP_FLAG_IRQ) ||
582	     test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
583		return tpm_tis_send_main(chip, buf, len);
584
585	/* Verify receipt of the expected IRQ */
586	irq = priv->irq;
587	priv->irq = 0;
588	chip->flags &= ~TPM_CHIP_FLAG_IRQ;
589	rc = tpm_tis_send_main(chip, buf, len);
590	priv->irq = irq;
591	chip->flags |= TPM_CHIP_FLAG_IRQ;
592	if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
593		tpm_msleep(1);
594	if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
595		tpm_tis_disable_interrupts(chip);
596	set_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
597	return rc;
598}
599
600struct tis_vendor_durations_override {
601	u32 did_vid;
602	struct tpm1_version version;
603	unsigned long durations[3];
604};
605
606static const struct  tis_vendor_durations_override vendor_dur_overrides[] = {
607	/* STMicroelectronics 0x104a */
608	{ 0x0000104a,
609	  { 1, 2, 8, 28 },
610	  { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } },
611};
612
613static void tpm_tis_update_durations(struct tpm_chip *chip,
614				     unsigned long *duration_cap)
615{
616	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
617	struct tpm1_version *version;
618	u32 did_vid;
619	int i, rc;
620	cap_t cap;
621
622	chip->duration_adjusted = false;
623
624	if (chip->ops->clk_enable != NULL)
625		chip->ops->clk_enable(chip, true);
626
627	rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
628	if (rc < 0) {
629		dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n",
630			 __func__, rc);
631		goto out;
632	}
633
634	/* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */
635	rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap,
636			 "attempting to determine the 1.2 version",
637			 sizeof(cap.version2));
638	if (!rc) {
639		version = &cap.version2.version;
640	} else {
641		rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap,
642				 "attempting to determine the 1.1 version",
643				 sizeof(cap.version1));
644
645		if (rc)
646			goto out;
647
648		version = &cap.version1;
649	}
650
651	for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) {
652		if (vendor_dur_overrides[i].did_vid != did_vid)
653			continue;
654
655		if ((version->major ==
656		     vendor_dur_overrides[i].version.major) &&
657		    (version->minor ==
658		     vendor_dur_overrides[i].version.minor) &&
659		    (version->rev_major ==
660		     vendor_dur_overrides[i].version.rev_major) &&
661		    (version->rev_minor ==
662		     vendor_dur_overrides[i].version.rev_minor)) {
663
664			memcpy(duration_cap,
665			       vendor_dur_overrides[i].durations,
666			       sizeof(vendor_dur_overrides[i].durations));
667
668			chip->duration_adjusted = true;
669			goto out;
670		}
671	}
672
673out:
674	if (chip->ops->clk_enable != NULL)
675		chip->ops->clk_enable(chip, false);
676}
677
678struct tis_vendor_timeout_override {
679	u32 did_vid;
680	unsigned long timeout_us[4];
681};
682
683static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
684	/* Atmel 3204 */
685	{ 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
686			(TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
687};
688
689static void tpm_tis_update_timeouts(struct tpm_chip *chip,
690				    unsigned long *timeout_cap)
691{
692	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
693	int i, rc;
694	u32 did_vid;
695
696	chip->timeout_adjusted = false;
697
698	if (chip->ops->clk_enable != NULL)
699		chip->ops->clk_enable(chip, true);
700
701	rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
702	if (rc < 0) {
703		dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n",
704			 __func__, rc);
705		goto out;
706	}
707
708	for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
709		if (vendor_timeout_overrides[i].did_vid != did_vid)
710			continue;
711		memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
712		       sizeof(vendor_timeout_overrides[i].timeout_us));
713		chip->timeout_adjusted = true;
714	}
715
716out:
717	if (chip->ops->clk_enable != NULL)
718		chip->ops->clk_enable(chip, false);
719
720	return;
721}
722
723/*
724 * Early probing for iTPM with STS_DATA_EXPECT flaw.
725 * Try sending command without itpm flag set and if that
726 * fails, repeat with itpm flag set.
727 */
728static int probe_itpm(struct tpm_chip *chip)
729{
730	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
731	int rc = 0;
732	static const u8 cmd_getticks[] = {
733		0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
734		0x00, 0x00, 0x00, 0xf1
735	};
736	size_t len = sizeof(cmd_getticks);
737	u16 vendor;
738
739	if (test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags))
740		return 0;
741
742	rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
743	if (rc < 0)
744		return rc;
745
746	/* probe only iTPMS */
747	if (vendor != TPM_VID_INTEL)
748		return 0;
749
750	if (tpm_tis_request_locality(chip, 0) != 0)
751		return -EBUSY;
752
753	rc = tpm_tis_send_data(chip, cmd_getticks, len);
754	if (rc == 0)
755		goto out;
756
757	tpm_tis_ready(chip);
758
759	set_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
760
761	rc = tpm_tis_send_data(chip, cmd_getticks, len);
762	if (rc == 0)
763		dev_info(&chip->dev, "Detected an iTPM.\n");
764	else {
765		clear_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
766		rc = -EFAULT;
767	}
768
769out:
770	tpm_tis_ready(chip);
771	tpm_tis_relinquish_locality(chip, priv->locality);
772
773	return rc;
774}
775
776static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
777{
778	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
779
780	if (!test_bit(TPM_TIS_DEFAULT_CANCELLATION, &priv->flags)) {
781		switch (priv->manufacturer_id) {
782		case TPM_VID_WINBOND:
783			return ((status == TPM_STS_VALID) ||
784				(status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
785		case TPM_VID_STM:
786			return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
787		default:
788			break;
789		}
790	}
791
792	return status == TPM_STS_COMMAND_READY;
793}
794
795static irqreturn_t tpm_tis_revert_interrupts(struct tpm_chip *chip)
796{
797	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
798	const char *product;
799	const char *vendor;
800
801	dev_warn(&chip->dev, FW_BUG
802		 "TPM interrupt storm detected, polling instead\n");
803
804	vendor = dmi_get_system_info(DMI_SYS_VENDOR);
805	product = dmi_get_system_info(DMI_PRODUCT_VERSION);
806
807	if (vendor && product) {
808		dev_info(&chip->dev,
809			"Consider adding the following entry to tpm_tis_dmi_table:\n");
810		dev_info(&chip->dev, "\tDMI_SYS_VENDOR: %s\n", vendor);
811		dev_info(&chip->dev, "\tDMI_PRODUCT_VERSION: %s\n", product);
812	}
813
814	if (tpm_tis_request_locality(chip, 0) != 0)
815		return IRQ_NONE;
816
817	__tpm_tis_disable_interrupts(chip);
818	tpm_tis_relinquish_locality(chip, 0);
819
820	schedule_work(&priv->free_irq_work);
821
822	return IRQ_HANDLED;
823}
824
825static irqreturn_t tpm_tis_update_unhandled_irqs(struct tpm_chip *chip)
826{
827	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
828	irqreturn_t irqret = IRQ_HANDLED;
829
830	if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
831		return IRQ_HANDLED;
832
833	if (time_after(jiffies, priv->last_unhandled_irq + HZ/10))
834		priv->unhandled_irqs = 1;
835	else
836		priv->unhandled_irqs++;
837
838	priv->last_unhandled_irq = jiffies;
839
840	if (priv->unhandled_irqs > TPM_TIS_MAX_UNHANDLED_IRQS)
841		irqret = tpm_tis_revert_interrupts(chip);
842
843	return irqret;
844}
845
846static irqreturn_t tis_int_handler(int dummy, void *dev_id)
847{
848	struct tpm_chip *chip = dev_id;
849	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
850	u32 interrupt;
851	int rc;
852
853	rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
854	if (rc < 0)
855		goto err;
856
857	if (interrupt == 0)
858		goto err;
859
860	set_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
861	if (interrupt & TPM_INTF_DATA_AVAIL_INT)
862		wake_up_interruptible(&priv->read_queue);
863
864	if (interrupt &
865	    (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
866	     TPM_INTF_CMD_READY_INT))
867		wake_up_interruptible(&priv->int_queue);
868
869	/* Clear interrupts handled with TPM_EOI */
870	tpm_tis_request_locality(chip, 0);
871	rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
872	tpm_tis_relinquish_locality(chip, 0);
873	if (rc < 0)
874		goto err;
875
876	tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
877	return IRQ_HANDLED;
878
879err:
880	return tpm_tis_update_unhandled_irqs(chip);
881}
882
883static void tpm_tis_gen_interrupt(struct tpm_chip *chip)
884{
885	const char *desc = "attempting to generate an interrupt";
886	u32 cap2;
887	cap_t cap;
888	int ret;
889
890	chip->flags |= TPM_CHIP_FLAG_IRQ;
891
892	if (chip->flags & TPM_CHIP_FLAG_TPM2)
893		ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
894	else
895		ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0);
896
897	if (ret)
898		chip->flags &= ~TPM_CHIP_FLAG_IRQ;
899}
900
901static void tpm_tis_free_irq_func(struct work_struct *work)
902{
903	struct tpm_tis_data *priv = container_of(work, typeof(*priv), free_irq_work);
904	struct tpm_chip *chip = priv->chip;
905
906	devm_free_irq(chip->dev.parent, priv->irq, chip);
907	priv->irq = 0;
908}
909
910/* Register the IRQ and issue a command that will cause an interrupt. If an
911 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
912 * everything and leave in polling mode. Returns 0 on success.
913 */
914static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
915				    int flags, int irq)
916{
917	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
918	u8 original_int_vec;
919	int rc;
920	u32 int_status;
921
922	rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL,
923				       tis_int_handler, IRQF_ONESHOT | flags,
924				       dev_name(&chip->dev), chip);
925	if (rc) {
926		dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
927			 irq);
928		return -1;
929	}
930	priv->irq = irq;
931
932	rc = tpm_tis_request_locality(chip, 0);
933	if (rc < 0)
934		return rc;
935
936	rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
937			   &original_int_vec);
938	if (rc < 0) {
939		tpm_tis_relinquish_locality(chip, priv->locality);
940		return rc;
941	}
942
943	rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
944	if (rc < 0)
945		goto restore_irqs;
946
947	rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
948	if (rc < 0)
949		goto restore_irqs;
950
951	/* Clear all existing */
952	rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
953	if (rc < 0)
954		goto restore_irqs;
955	/* Turn on */
956	rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
957			     intmask | TPM_GLOBAL_INT_ENABLE);
958	if (rc < 0)
959		goto restore_irqs;
960
961	clear_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
962
963	/* Generate an interrupt by having the core call through to
964	 * tpm_tis_send
965	 */
966	tpm_tis_gen_interrupt(chip);
967
968restore_irqs:
969	/* tpm_tis_send will either confirm the interrupt is working or it
970	 * will call disable_irq which undoes all of the above.
971	 */
972	if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
973		tpm_tis_write8(priv, original_int_vec,
974			       TPM_INT_VECTOR(priv->locality));
975		rc = -1;
976	}
977
978	tpm_tis_relinquish_locality(chip, priv->locality);
979
980	return rc;
981}
982
983/* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
984 * do not have ACPI/etc. We typically expect the interrupt to be declared if
985 * present.
986 */
987static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
988{
989	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
990	u8 original_int_vec;
991	int i, rc;
992
993	rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
994			   &original_int_vec);
995	if (rc < 0)
996		return;
997
998	if (!original_int_vec) {
999		if (IS_ENABLED(CONFIG_X86))
1000			for (i = 3; i <= 15; i++)
1001				if (!tpm_tis_probe_irq_single(chip, intmask, 0,
1002							      i))
1003					return;
1004	} else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
1005					     original_int_vec))
1006		return;
1007}
1008
1009void tpm_tis_remove(struct tpm_chip *chip)
1010{
1011	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1012	u32 reg = TPM_INT_ENABLE(priv->locality);
1013	u32 interrupt;
1014	int rc;
1015
1016	tpm_tis_clkrun_enable(chip, true);
1017
1018	rc = tpm_tis_read32(priv, reg, &interrupt);
1019	if (rc < 0)
1020		interrupt = 0;
1021
1022	tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
1023	flush_work(&priv->free_irq_work);
1024
1025	tpm_tis_clkrun_enable(chip, false);
1026
1027	if (priv->ilb_base_addr)
1028		iounmap(priv->ilb_base_addr);
1029}
1030EXPORT_SYMBOL_GPL(tpm_tis_remove);
1031
1032/**
1033 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
1034 *                           of a single TPM command
1035 * @chip:	TPM chip to use
1036 * @value:	1 - Disable CLKRUN protocol, so that clocks are free running
1037 *		0 - Enable CLKRUN protocol
1038 * Call this function directly in tpm_tis_remove() in error or driver removal
1039 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
1040 */
1041static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
1042{
1043	struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
1044	u32 clkrun_val;
1045
1046	if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
1047	    !data->ilb_base_addr)
1048		return;
1049
1050	if (value) {
1051		data->clkrun_enabled++;
1052		if (data->clkrun_enabled > 1)
1053			return;
1054		clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
1055
1056		/* Disable LPC CLKRUN# */
1057		clkrun_val &= ~LPC_CLKRUN_EN;
1058		iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
1059
1060		/*
1061		 * Write any random value on port 0x80 which is on LPC, to make
1062		 * sure LPC clock is running before sending any TPM command.
1063		 */
1064		outb(0xCC, 0x80);
1065	} else {
1066		data->clkrun_enabled--;
1067		if (data->clkrun_enabled)
1068			return;
1069
1070		clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
1071
1072		/* Enable LPC CLKRUN# */
1073		clkrun_val |= LPC_CLKRUN_EN;
1074		iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
1075
1076		/*
1077		 * Write any random value on port 0x80 which is on LPC, to make
1078		 * sure LPC clock is running before sending any TPM command.
1079		 */
1080		outb(0xCC, 0x80);
1081	}
1082}
1083
1084static const struct tpm_class_ops tpm_tis = {
1085	.flags = TPM_OPS_AUTO_STARTUP,
1086	.status = tpm_tis_status,
1087	.recv = tpm_tis_recv,
1088	.send = tpm_tis_send,
1089	.cancel = tpm_tis_ready,
1090	.update_timeouts = tpm_tis_update_timeouts,
1091	.update_durations = tpm_tis_update_durations,
1092	.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1093	.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1094	.req_canceled = tpm_tis_req_canceled,
1095	.request_locality = tpm_tis_request_locality,
1096	.relinquish_locality = tpm_tis_relinquish_locality,
1097	.clk_enable = tpm_tis_clkrun_enable,
1098};
1099
1100int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
1101		      const struct tpm_tis_phy_ops *phy_ops,
1102		      acpi_handle acpi_dev_handle)
1103{
1104	u32 vendor;
1105	u32 intfcaps;
1106	u32 intmask;
1107	u32 clkrun_val;
1108	u8 rid;
1109	int rc, probe;
1110	struct tpm_chip *chip;
1111
1112	chip = tpmm_chip_alloc(dev, &tpm_tis);
1113	if (IS_ERR(chip))
1114		return PTR_ERR(chip);
1115
1116#ifdef CONFIG_ACPI
1117	chip->acpi_dev_handle = acpi_dev_handle;
1118#endif
1119
1120	chip->hwrng.quality = priv->rng_quality;
1121
1122	/* Maximum timeouts */
1123	chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
1124	chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
1125	chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
1126	chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
1127	priv->chip = chip;
1128	priv->timeout_min = TPM_TIMEOUT_USECS_MIN;
1129	priv->timeout_max = TPM_TIMEOUT_USECS_MAX;
1130	priv->phy_ops = phy_ops;
1131	priv->locality_count = 0;
1132	mutex_init(&priv->locality_count_mutex);
1133	INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func);
1134
1135	dev_set_drvdata(&chip->dev, priv);
1136
1137	rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
1138	if (rc < 0)
1139		return rc;
1140
1141	priv->manufacturer_id = vendor;
1142
1143	if (priv->manufacturer_id == TPM_VID_ATML &&
1144		!(chip->flags & TPM_CHIP_FLAG_TPM2)) {
1145		priv->timeout_min = TIS_TIMEOUT_MIN_ATML;
1146		priv->timeout_max = TIS_TIMEOUT_MAX_ATML;
1147	}
1148
1149	if (is_bsw()) {
1150		priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
1151					ILB_REMAP_SIZE);
1152		if (!priv->ilb_base_addr)
1153			return -ENOMEM;
1154
1155		clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
1156		/* Check if CLKRUN# is already not enabled in the LPC bus */
1157		if (!(clkrun_val & LPC_CLKRUN_EN)) {
1158			iounmap(priv->ilb_base_addr);
1159			priv->ilb_base_addr = NULL;
1160		}
1161	}
1162
1163	if (chip->ops->clk_enable != NULL)
1164		chip->ops->clk_enable(chip, true);
1165
1166	if (wait_startup(chip, 0) != 0) {
1167		rc = -ENODEV;
1168		goto out_err;
1169	}
1170
1171	/* Take control of the TPM's interrupt hardware and shut it off */
1172	rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1173	if (rc < 0)
1174		goto out_err;
1175
1176	/* Figure out the capabilities */
1177	rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
1178	if (rc < 0)
1179		goto out_err;
1180
1181	dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
1182		intfcaps);
1183	if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
1184		dev_dbg(dev, "\tBurst Count Static\n");
1185	if (intfcaps & TPM_INTF_CMD_READY_INT) {
1186		intmask |= TPM_INTF_CMD_READY_INT;
1187		dev_dbg(dev, "\tCommand Ready Int Support\n");
1188	}
1189	if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
1190		dev_dbg(dev, "\tInterrupt Edge Falling\n");
1191	if (intfcaps & TPM_INTF_INT_EDGE_RISING)
1192		dev_dbg(dev, "\tInterrupt Edge Rising\n");
1193	if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
1194		dev_dbg(dev, "\tInterrupt Level Low\n");
1195	if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
1196		dev_dbg(dev, "\tInterrupt Level High\n");
1197	if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) {
1198		intmask |= TPM_INTF_LOCALITY_CHANGE_INT;
1199		dev_dbg(dev, "\tLocality Change Int Support\n");
1200	}
1201	if (intfcaps & TPM_INTF_STS_VALID_INT) {
1202		intmask |= TPM_INTF_STS_VALID_INT;
1203		dev_dbg(dev, "\tSts Valid Int Support\n");
1204	}
1205	if (intfcaps & TPM_INTF_DATA_AVAIL_INT) {
1206		intmask |= TPM_INTF_DATA_AVAIL_INT;
1207		dev_dbg(dev, "\tData Avail Int Support\n");
1208	}
1209
1210	intmask &= ~TPM_GLOBAL_INT_ENABLE;
1211
1212	rc = tpm_tis_request_locality(chip, 0);
1213	if (rc < 0) {
1214		rc = -ENODEV;
1215		goto out_err;
1216	}
1217
1218	tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1219	tpm_tis_relinquish_locality(chip, 0);
1220
1221	rc = tpm_chip_start(chip);
1222	if (rc)
1223		goto out_err;
1224	rc = tpm2_probe(chip);
1225	tpm_chip_stop(chip);
1226	if (rc)
1227		goto out_err;
1228
1229	rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
1230	if (rc < 0)
1231		goto out_err;
1232
1233	dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
1234		 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
1235		 vendor >> 16, rid);
1236
1237	probe = probe_itpm(chip);
1238	if (probe < 0) {
1239		rc = -ENODEV;
1240		goto out_err;
1241	}
1242
1243	/* INTERRUPT Setup */
1244	init_waitqueue_head(&priv->read_queue);
1245	init_waitqueue_head(&priv->int_queue);
1246
1247	rc = tpm_chip_bootstrap(chip);
1248	if (rc)
1249		goto out_err;
1250
1251	if (irq != -1) {
1252		/*
1253		 * Before doing irq testing issue a command to the TPM in polling mode
1254		 * to make sure it works. May as well use that command to set the
1255		 * proper timeouts for the driver.
1256		 */
1257
1258		rc = tpm_tis_request_locality(chip, 0);
1259		if (rc < 0)
1260			goto out_err;
1261
1262		rc = tpm_get_timeouts(chip);
1263
1264		tpm_tis_relinquish_locality(chip, 0);
1265
1266		if (rc) {
1267			dev_err(dev, "Could not get TPM timeouts and durations\n");
1268			rc = -ENODEV;
1269			goto out_err;
1270		}
1271
1272		if (irq)
1273			tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
1274						 irq);
1275		else
1276			tpm_tis_probe_irq(chip, intmask);
1277
1278		if (chip->flags & TPM_CHIP_FLAG_IRQ) {
1279			priv->int_mask = intmask;
1280		} else {
1281			dev_err(&chip->dev, FW_BUG
1282					"TPM interrupt not working, polling instead\n");
1283
1284			rc = tpm_tis_request_locality(chip, 0);
1285			if (rc < 0)
1286				goto out_err;
1287			tpm_tis_disable_interrupts(chip);
1288			tpm_tis_relinquish_locality(chip, 0);
1289		}
1290	}
1291
1292	rc = tpm_chip_register(chip);
1293	if (rc)
1294		goto out_err;
1295
1296	if (chip->ops->clk_enable != NULL)
1297		chip->ops->clk_enable(chip, false);
1298
1299	return 0;
1300out_err:
1301	if (chip->ops->clk_enable != NULL)
1302		chip->ops->clk_enable(chip, false);
1303
1304	tpm_tis_remove(chip);
1305
1306	return rc;
1307}
1308EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1309
1310#ifdef CONFIG_PM_SLEEP
1311static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1312{
1313	struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1314	u32 intmask;
1315	int rc;
1316
1317	/*
1318	 * Re-enable interrupts that device may have lost or BIOS/firmware may
1319	 * have disabled.
1320	 */
1321	rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1322	if (rc < 0) {
1323		dev_err(&chip->dev, "Setting IRQ failed.\n");
1324		return;
1325	}
1326
1327	intmask = priv->int_mask | TPM_GLOBAL_INT_ENABLE;
1328	rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1329	if (rc < 0)
1330		dev_err(&chip->dev, "Enabling interrupts failed.\n");
1331}
1332
1333int tpm_tis_resume(struct device *dev)
1334{
1335	struct tpm_chip *chip = dev_get_drvdata(dev);
1336	int ret;
1337
1338	ret = tpm_chip_start(chip);
1339	if (ret)
1340		return ret;
1341
1342	if (chip->flags & TPM_CHIP_FLAG_IRQ)
1343		tpm_tis_reenable_interrupts(chip);
1344
1345	/*
1346	 * TPM 1.2 requires self-test on resume. This function actually returns
1347	 * an error code but for unknown reason it isn't handled.
1348	 */
1349	if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1350		tpm1_do_selftest(chip);
1351
1352	tpm_chip_stop(chip);
1353
1354	ret = tpm_pm_resume(dev);
1355	if (ret)
1356		return ret;
1357
1358	return 0;
1359}
1360EXPORT_SYMBOL_GPL(tpm_tis_resume);
1361#endif
1362
1363MODULE_AUTHOR("Leendert van Doorn <leendert@watson.ibm.com>");
1364MODULE_DESCRIPTION("TPM Driver");
1365MODULE_VERSION("2.0");
1366MODULE_LICENSE("GPL");
1367