1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8/************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13#ifndef ASIC_REG_TPC7_QM_REGS_H_ 14#define ASIC_REG_TPC7_QM_REGS_H_ 15 16/* 17 ***************************************** 18 * TPC7_QM (Prototype: QMAN) 19 ***************************************** 20 */ 21 22#define mmTPC7_QM_GLBL_CFG0 0xFC8000 23 24#define mmTPC7_QM_GLBL_CFG1 0xFC8004 25 26#define mmTPC7_QM_GLBL_PROT 0xFC8008 27 28#define mmTPC7_QM_GLBL_ERR_CFG 0xFC800C 29 30#define mmTPC7_QM_GLBL_SECURE_PROPS_0 0xFC8010 31 32#define mmTPC7_QM_GLBL_SECURE_PROPS_1 0xFC8014 33 34#define mmTPC7_QM_GLBL_SECURE_PROPS_2 0xFC8018 35 36#define mmTPC7_QM_GLBL_SECURE_PROPS_3 0xFC801C 37 38#define mmTPC7_QM_GLBL_SECURE_PROPS_4 0xFC8020 39 40#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_0 0xFC8024 41 42#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_1 0xFC8028 43 44#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_2 0xFC802C 45 46#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_3 0xFC8030 47 48#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_4 0xFC8034 49 50#define mmTPC7_QM_GLBL_STS0 0xFC8038 51 52#define mmTPC7_QM_GLBL_STS1_0 0xFC8040 53 54#define mmTPC7_QM_GLBL_STS1_1 0xFC8044 55 56#define mmTPC7_QM_GLBL_STS1_2 0xFC8048 57 58#define mmTPC7_QM_GLBL_STS1_3 0xFC804C 59 60#define mmTPC7_QM_GLBL_STS1_4 0xFC8050 61 62#define mmTPC7_QM_GLBL_MSG_EN_0 0xFC8054 63 64#define mmTPC7_QM_GLBL_MSG_EN_1 0xFC8058 65 66#define mmTPC7_QM_GLBL_MSG_EN_2 0xFC805C 67 68#define mmTPC7_QM_GLBL_MSG_EN_3 0xFC8060 69 70#define mmTPC7_QM_GLBL_MSG_EN_4 0xFC8068 71 72#define mmTPC7_QM_PQ_BASE_LO_0 0xFC8070 73 74#define mmTPC7_QM_PQ_BASE_LO_1 0xFC8074 75 76#define mmTPC7_QM_PQ_BASE_LO_2 0xFC8078 77 78#define mmTPC7_QM_PQ_BASE_LO_3 0xFC807C 79 80#define mmTPC7_QM_PQ_BASE_HI_0 0xFC8080 81 82#define mmTPC7_QM_PQ_BASE_HI_1 0xFC8084 83 84#define mmTPC7_QM_PQ_BASE_HI_2 0xFC8088 85 86#define mmTPC7_QM_PQ_BASE_HI_3 0xFC808C 87 88#define mmTPC7_QM_PQ_SIZE_0 0xFC8090 89 90#define mmTPC7_QM_PQ_SIZE_1 0xFC8094 91 92#define mmTPC7_QM_PQ_SIZE_2 0xFC8098 93 94#define mmTPC7_QM_PQ_SIZE_3 0xFC809C 95 96#define mmTPC7_QM_PQ_PI_0 0xFC80A0 97 98#define mmTPC7_QM_PQ_PI_1 0xFC80A4 99 100#define mmTPC7_QM_PQ_PI_2 0xFC80A8 101 102#define mmTPC7_QM_PQ_PI_3 0xFC80AC 103 104#define mmTPC7_QM_PQ_CI_0 0xFC80B0 105 106#define mmTPC7_QM_PQ_CI_1 0xFC80B4 107 108#define mmTPC7_QM_PQ_CI_2 0xFC80B8 109 110#define mmTPC7_QM_PQ_CI_3 0xFC80BC 111 112#define mmTPC7_QM_PQ_CFG0_0 0xFC80C0 113 114#define mmTPC7_QM_PQ_CFG0_1 0xFC80C4 115 116#define mmTPC7_QM_PQ_CFG0_2 0xFC80C8 117 118#define mmTPC7_QM_PQ_CFG0_3 0xFC80CC 119 120#define mmTPC7_QM_PQ_CFG1_0 0xFC80D0 121 122#define mmTPC7_QM_PQ_CFG1_1 0xFC80D4 123 124#define mmTPC7_QM_PQ_CFG1_2 0xFC80D8 125 126#define mmTPC7_QM_PQ_CFG1_3 0xFC80DC 127 128#define mmTPC7_QM_PQ_ARUSER_31_11_0 0xFC80E0 129 130#define mmTPC7_QM_PQ_ARUSER_31_11_1 0xFC80E4 131 132#define mmTPC7_QM_PQ_ARUSER_31_11_2 0xFC80E8 133 134#define mmTPC7_QM_PQ_ARUSER_31_11_3 0xFC80EC 135 136#define mmTPC7_QM_PQ_STS0_0 0xFC80F0 137 138#define mmTPC7_QM_PQ_STS0_1 0xFC80F4 139 140#define mmTPC7_QM_PQ_STS0_2 0xFC80F8 141 142#define mmTPC7_QM_PQ_STS0_3 0xFC80FC 143 144#define mmTPC7_QM_PQ_STS1_0 0xFC8100 145 146#define mmTPC7_QM_PQ_STS1_1 0xFC8104 147 148#define mmTPC7_QM_PQ_STS1_2 0xFC8108 149 150#define mmTPC7_QM_PQ_STS1_3 0xFC810C 151 152#define mmTPC7_QM_CQ_CFG0_0 0xFC8110 153 154#define mmTPC7_QM_CQ_CFG0_1 0xFC8114 155 156#define mmTPC7_QM_CQ_CFG0_2 0xFC8118 157 158#define mmTPC7_QM_CQ_CFG0_3 0xFC811C 159 160#define mmTPC7_QM_CQ_CFG0_4 0xFC8120 161 162#define mmTPC7_QM_CQ_CFG1_0 0xFC8124 163 164#define mmTPC7_QM_CQ_CFG1_1 0xFC8128 165 166#define mmTPC7_QM_CQ_CFG1_2 0xFC812C 167 168#define mmTPC7_QM_CQ_CFG1_3 0xFC8130 169 170#define mmTPC7_QM_CQ_CFG1_4 0xFC8134 171 172#define mmTPC7_QM_CQ_ARUSER_31_11_0 0xFC8138 173 174#define mmTPC7_QM_CQ_ARUSER_31_11_1 0xFC813C 175 176#define mmTPC7_QM_CQ_ARUSER_31_11_2 0xFC8140 177 178#define mmTPC7_QM_CQ_ARUSER_31_11_3 0xFC8144 179 180#define mmTPC7_QM_CQ_ARUSER_31_11_4 0xFC8148 181 182#define mmTPC7_QM_CQ_STS0_0 0xFC814C 183 184#define mmTPC7_QM_CQ_STS0_1 0xFC8150 185 186#define mmTPC7_QM_CQ_STS0_2 0xFC8154 187 188#define mmTPC7_QM_CQ_STS0_3 0xFC8158 189 190#define mmTPC7_QM_CQ_STS0_4 0xFC815C 191 192#define mmTPC7_QM_CQ_STS1_0 0xFC8160 193 194#define mmTPC7_QM_CQ_STS1_1 0xFC8164 195 196#define mmTPC7_QM_CQ_STS1_2 0xFC8168 197 198#define mmTPC7_QM_CQ_STS1_3 0xFC816C 199 200#define mmTPC7_QM_CQ_STS1_4 0xFC8170 201 202#define mmTPC7_QM_CQ_PTR_LO_0 0xFC8174 203 204#define mmTPC7_QM_CQ_PTR_HI_0 0xFC8178 205 206#define mmTPC7_QM_CQ_TSIZE_0 0xFC817C 207 208#define mmTPC7_QM_CQ_CTL_0 0xFC8180 209 210#define mmTPC7_QM_CQ_PTR_LO_1 0xFC8184 211 212#define mmTPC7_QM_CQ_PTR_HI_1 0xFC8188 213 214#define mmTPC7_QM_CQ_TSIZE_1 0xFC818C 215 216#define mmTPC7_QM_CQ_CTL_1 0xFC8190 217 218#define mmTPC7_QM_CQ_PTR_LO_2 0xFC8194 219 220#define mmTPC7_QM_CQ_PTR_HI_2 0xFC8198 221 222#define mmTPC7_QM_CQ_TSIZE_2 0xFC819C 223 224#define mmTPC7_QM_CQ_CTL_2 0xFC81A0 225 226#define mmTPC7_QM_CQ_PTR_LO_3 0xFC81A4 227 228#define mmTPC7_QM_CQ_PTR_HI_3 0xFC81A8 229 230#define mmTPC7_QM_CQ_TSIZE_3 0xFC81AC 231 232#define mmTPC7_QM_CQ_CTL_3 0xFC81B0 233 234#define mmTPC7_QM_CQ_PTR_LO_4 0xFC81B4 235 236#define mmTPC7_QM_CQ_PTR_HI_4 0xFC81B8 237 238#define mmTPC7_QM_CQ_TSIZE_4 0xFC81BC 239 240#define mmTPC7_QM_CQ_CTL_4 0xFC81C0 241 242#define mmTPC7_QM_CQ_PTR_LO_STS_0 0xFC81C4 243 244#define mmTPC7_QM_CQ_PTR_LO_STS_1 0xFC81C8 245 246#define mmTPC7_QM_CQ_PTR_LO_STS_2 0xFC81CC 247 248#define mmTPC7_QM_CQ_PTR_LO_STS_3 0xFC81D0 249 250#define mmTPC7_QM_CQ_PTR_LO_STS_4 0xFC81D4 251 252#define mmTPC7_QM_CQ_PTR_HI_STS_0 0xFC81D8 253 254#define mmTPC7_QM_CQ_PTR_HI_STS_1 0xFC81DC 255 256#define mmTPC7_QM_CQ_PTR_HI_STS_2 0xFC81E0 257 258#define mmTPC7_QM_CQ_PTR_HI_STS_3 0xFC81E4 259 260#define mmTPC7_QM_CQ_PTR_HI_STS_4 0xFC81E8 261 262#define mmTPC7_QM_CQ_TSIZE_STS_0 0xFC81EC 263 264#define mmTPC7_QM_CQ_TSIZE_STS_1 0xFC81F0 265 266#define mmTPC7_QM_CQ_TSIZE_STS_2 0xFC81F4 267 268#define mmTPC7_QM_CQ_TSIZE_STS_3 0xFC81F8 269 270#define mmTPC7_QM_CQ_TSIZE_STS_4 0xFC81FC 271 272#define mmTPC7_QM_CQ_CTL_STS_0 0xFC8200 273 274#define mmTPC7_QM_CQ_CTL_STS_1 0xFC8204 275 276#define mmTPC7_QM_CQ_CTL_STS_2 0xFC8208 277 278#define mmTPC7_QM_CQ_CTL_STS_3 0xFC820C 279 280#define mmTPC7_QM_CQ_CTL_STS_4 0xFC8210 281 282#define mmTPC7_QM_CQ_IFIFO_CNT_0 0xFC8214 283 284#define mmTPC7_QM_CQ_IFIFO_CNT_1 0xFC8218 285 286#define mmTPC7_QM_CQ_IFIFO_CNT_2 0xFC821C 287 288#define mmTPC7_QM_CQ_IFIFO_CNT_3 0xFC8220 289 290#define mmTPC7_QM_CQ_IFIFO_CNT_4 0xFC8224 291 292#define mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_0 0xFC8228 293 294#define mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_1 0xFC822C 295 296#define mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_2 0xFC8230 297 298#define mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_3 0xFC8234 299 300#define mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_4 0xFC8238 301 302#define mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_0 0xFC823C 303 304#define mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_1 0xFC8240 305 306#define mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_2 0xFC8244 307 308#define mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_3 0xFC8248 309 310#define mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_4 0xFC824C 311 312#define mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_0 0xFC8250 313 314#define mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_1 0xFC8254 315 316#define mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_2 0xFC8258 317 318#define mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_3 0xFC825C 319 320#define mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_4 0xFC8260 321 322#define mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_0 0xFC8264 323 324#define mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_1 0xFC8268 325 326#define mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_2 0xFC826C 327 328#define mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_3 0xFC8270 329 330#define mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_4 0xFC8274 331 332#define mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_0 0xFC8278 333 334#define mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_1 0xFC827C 335 336#define mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_2 0xFC8280 337 338#define mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_3 0xFC8284 339 340#define mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_4 0xFC8288 341 342#define mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_0 0xFC828C 343 344#define mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_1 0xFC8290 345 346#define mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_2 0xFC8294 347 348#define mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_3 0xFC8298 349 350#define mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_4 0xFC829C 351 352#define mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_0 0xFC82A0 353 354#define mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_1 0xFC82A4 355 356#define mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_2 0xFC82A8 357 358#define mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_3 0xFC82AC 359 360#define mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_4 0xFC82B0 361 362#define mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_0 0xFC82B4 363 364#define mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_1 0xFC82B8 365 366#define mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_2 0xFC82BC 367 368#define mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_3 0xFC82C0 369 370#define mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_4 0xFC82C4 371 372#define mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_0 0xFC82C8 373 374#define mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_1 0xFC82CC 375 376#define mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_2 0xFC82D0 377 378#define mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_3 0xFC82D4 379 380#define mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_4 0xFC82D8 381 382#define mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 0xFC82E0 383 384#define mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 0xFC82E4 385 386#define mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 0xFC82E8 387 388#define mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 0xFC82EC 389 390#define mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 0xFC82F0 391 392#define mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 0xFC82F4 393 394#define mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 0xFC82F8 395 396#define mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 0xFC82FC 397 398#define mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 0xFC8300 399 400#define mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 0xFC8304 401 402#define mmTPC7_QM_CP_FENCE0_RDATA_0 0xFC8308 403 404#define mmTPC7_QM_CP_FENCE0_RDATA_1 0xFC830C 405 406#define mmTPC7_QM_CP_FENCE0_RDATA_2 0xFC8310 407 408#define mmTPC7_QM_CP_FENCE0_RDATA_3 0xFC8314 409 410#define mmTPC7_QM_CP_FENCE0_RDATA_4 0xFC8318 411 412#define mmTPC7_QM_CP_FENCE1_RDATA_0 0xFC831C 413 414#define mmTPC7_QM_CP_FENCE1_RDATA_1 0xFC8320 415 416#define mmTPC7_QM_CP_FENCE1_RDATA_2 0xFC8324 417 418#define mmTPC7_QM_CP_FENCE1_RDATA_3 0xFC8328 419 420#define mmTPC7_QM_CP_FENCE1_RDATA_4 0xFC832C 421 422#define mmTPC7_QM_CP_FENCE2_RDATA_0 0xFC8330 423 424#define mmTPC7_QM_CP_FENCE2_RDATA_1 0xFC8334 425 426#define mmTPC7_QM_CP_FENCE2_RDATA_2 0xFC8338 427 428#define mmTPC7_QM_CP_FENCE2_RDATA_3 0xFC833C 429 430#define mmTPC7_QM_CP_FENCE2_RDATA_4 0xFC8340 431 432#define mmTPC7_QM_CP_FENCE3_RDATA_0 0xFC8344 433 434#define mmTPC7_QM_CP_FENCE3_RDATA_1 0xFC8348 435 436#define mmTPC7_QM_CP_FENCE3_RDATA_2 0xFC834C 437 438#define mmTPC7_QM_CP_FENCE3_RDATA_3 0xFC8350 439 440#define mmTPC7_QM_CP_FENCE3_RDATA_4 0xFC8354 441 442#define mmTPC7_QM_CP_FENCE0_CNT_0 0xFC8358 443 444#define mmTPC7_QM_CP_FENCE0_CNT_1 0xFC835C 445 446#define mmTPC7_QM_CP_FENCE0_CNT_2 0xFC8360 447 448#define mmTPC7_QM_CP_FENCE0_CNT_3 0xFC8364 449 450#define mmTPC7_QM_CP_FENCE0_CNT_4 0xFC8368 451 452#define mmTPC7_QM_CP_FENCE1_CNT_0 0xFC836C 453 454#define mmTPC7_QM_CP_FENCE1_CNT_1 0xFC8370 455 456#define mmTPC7_QM_CP_FENCE1_CNT_2 0xFC8374 457 458#define mmTPC7_QM_CP_FENCE1_CNT_3 0xFC8378 459 460#define mmTPC7_QM_CP_FENCE1_CNT_4 0xFC837C 461 462#define mmTPC7_QM_CP_FENCE2_CNT_0 0xFC8380 463 464#define mmTPC7_QM_CP_FENCE2_CNT_1 0xFC8384 465 466#define mmTPC7_QM_CP_FENCE2_CNT_2 0xFC8388 467 468#define mmTPC7_QM_CP_FENCE2_CNT_3 0xFC838C 469 470#define mmTPC7_QM_CP_FENCE2_CNT_4 0xFC8390 471 472#define mmTPC7_QM_CP_FENCE3_CNT_0 0xFC8394 473 474#define mmTPC7_QM_CP_FENCE3_CNT_1 0xFC8398 475 476#define mmTPC7_QM_CP_FENCE3_CNT_2 0xFC839C 477 478#define mmTPC7_QM_CP_FENCE3_CNT_3 0xFC83A0 479 480#define mmTPC7_QM_CP_FENCE3_CNT_4 0xFC83A4 481 482#define mmTPC7_QM_CP_STS_0 0xFC83A8 483 484#define mmTPC7_QM_CP_STS_1 0xFC83AC 485 486#define mmTPC7_QM_CP_STS_2 0xFC83B0 487 488#define mmTPC7_QM_CP_STS_3 0xFC83B4 489 490#define mmTPC7_QM_CP_STS_4 0xFC83B8 491 492#define mmTPC7_QM_CP_CURRENT_INST_LO_0 0xFC83BC 493 494#define mmTPC7_QM_CP_CURRENT_INST_LO_1 0xFC83C0 495 496#define mmTPC7_QM_CP_CURRENT_INST_LO_2 0xFC83C4 497 498#define mmTPC7_QM_CP_CURRENT_INST_LO_3 0xFC83C8 499 500#define mmTPC7_QM_CP_CURRENT_INST_LO_4 0xFC83CC 501 502#define mmTPC7_QM_CP_CURRENT_INST_HI_0 0xFC83D0 503 504#define mmTPC7_QM_CP_CURRENT_INST_HI_1 0xFC83D4 505 506#define mmTPC7_QM_CP_CURRENT_INST_HI_2 0xFC83D8 507 508#define mmTPC7_QM_CP_CURRENT_INST_HI_3 0xFC83DC 509 510#define mmTPC7_QM_CP_CURRENT_INST_HI_4 0xFC83E0 511 512#define mmTPC7_QM_CP_BARRIER_CFG_0 0xFC83F4 513 514#define mmTPC7_QM_CP_BARRIER_CFG_1 0xFC83F8 515 516#define mmTPC7_QM_CP_BARRIER_CFG_2 0xFC83FC 517 518#define mmTPC7_QM_CP_BARRIER_CFG_3 0xFC8400 519 520#define mmTPC7_QM_CP_BARRIER_CFG_4 0xFC8404 521 522#define mmTPC7_QM_CP_DBG_0_0 0xFC8408 523 524#define mmTPC7_QM_CP_DBG_0_1 0xFC840C 525 526#define mmTPC7_QM_CP_DBG_0_2 0xFC8410 527 528#define mmTPC7_QM_CP_DBG_0_3 0xFC8414 529 530#define mmTPC7_QM_CP_DBG_0_4 0xFC8418 531 532#define mmTPC7_QM_CP_ARUSER_31_11_0 0xFC841C 533 534#define mmTPC7_QM_CP_ARUSER_31_11_1 0xFC8420 535 536#define mmTPC7_QM_CP_ARUSER_31_11_2 0xFC8424 537 538#define mmTPC7_QM_CP_ARUSER_31_11_3 0xFC8428 539 540#define mmTPC7_QM_CP_ARUSER_31_11_4 0xFC842C 541 542#define mmTPC7_QM_CP_AWUSER_31_11_0 0xFC8430 543 544#define mmTPC7_QM_CP_AWUSER_31_11_1 0xFC8434 545 546#define mmTPC7_QM_CP_AWUSER_31_11_2 0xFC8438 547 548#define mmTPC7_QM_CP_AWUSER_31_11_3 0xFC843C 549 550#define mmTPC7_QM_CP_AWUSER_31_11_4 0xFC8440 551 552#define mmTPC7_QM_ARB_CFG_0 0xFC8A00 553 554#define mmTPC7_QM_ARB_CHOISE_Q_PUSH 0xFC8A04 555 556#define mmTPC7_QM_ARB_WRR_WEIGHT_0 0xFC8A08 557 558#define mmTPC7_QM_ARB_WRR_WEIGHT_1 0xFC8A0C 559 560#define mmTPC7_QM_ARB_WRR_WEIGHT_2 0xFC8A10 561 562#define mmTPC7_QM_ARB_WRR_WEIGHT_3 0xFC8A14 563 564#define mmTPC7_QM_ARB_CFG_1 0xFC8A18 565 566#define mmTPC7_QM_ARB_MST_AVAIL_CRED_0 0xFC8A20 567 568#define mmTPC7_QM_ARB_MST_AVAIL_CRED_1 0xFC8A24 569 570#define mmTPC7_QM_ARB_MST_AVAIL_CRED_2 0xFC8A28 571 572#define mmTPC7_QM_ARB_MST_AVAIL_CRED_3 0xFC8A2C 573 574#define mmTPC7_QM_ARB_MST_AVAIL_CRED_4 0xFC8A30 575 576#define mmTPC7_QM_ARB_MST_AVAIL_CRED_5 0xFC8A34 577 578#define mmTPC7_QM_ARB_MST_AVAIL_CRED_6 0xFC8A38 579 580#define mmTPC7_QM_ARB_MST_AVAIL_CRED_7 0xFC8A3C 581 582#define mmTPC7_QM_ARB_MST_AVAIL_CRED_8 0xFC8A40 583 584#define mmTPC7_QM_ARB_MST_AVAIL_CRED_9 0xFC8A44 585 586#define mmTPC7_QM_ARB_MST_AVAIL_CRED_10 0xFC8A48 587 588#define mmTPC7_QM_ARB_MST_AVAIL_CRED_11 0xFC8A4C 589 590#define mmTPC7_QM_ARB_MST_AVAIL_CRED_12 0xFC8A50 591 592#define mmTPC7_QM_ARB_MST_AVAIL_CRED_13 0xFC8A54 593 594#define mmTPC7_QM_ARB_MST_AVAIL_CRED_14 0xFC8A58 595 596#define mmTPC7_QM_ARB_MST_AVAIL_CRED_15 0xFC8A5C 597 598#define mmTPC7_QM_ARB_MST_AVAIL_CRED_16 0xFC8A60 599 600#define mmTPC7_QM_ARB_MST_AVAIL_CRED_17 0xFC8A64 601 602#define mmTPC7_QM_ARB_MST_AVAIL_CRED_18 0xFC8A68 603 604#define mmTPC7_QM_ARB_MST_AVAIL_CRED_19 0xFC8A6C 605 606#define mmTPC7_QM_ARB_MST_AVAIL_CRED_20 0xFC8A70 607 608#define mmTPC7_QM_ARB_MST_AVAIL_CRED_21 0xFC8A74 609 610#define mmTPC7_QM_ARB_MST_AVAIL_CRED_22 0xFC8A78 611 612#define mmTPC7_QM_ARB_MST_AVAIL_CRED_23 0xFC8A7C 613 614#define mmTPC7_QM_ARB_MST_AVAIL_CRED_24 0xFC8A80 615 616#define mmTPC7_QM_ARB_MST_AVAIL_CRED_25 0xFC8A84 617 618#define mmTPC7_QM_ARB_MST_AVAIL_CRED_26 0xFC8A88 619 620#define mmTPC7_QM_ARB_MST_AVAIL_CRED_27 0xFC8A8C 621 622#define mmTPC7_QM_ARB_MST_AVAIL_CRED_28 0xFC8A90 623 624#define mmTPC7_QM_ARB_MST_AVAIL_CRED_29 0xFC8A94 625 626#define mmTPC7_QM_ARB_MST_AVAIL_CRED_30 0xFC8A98 627 628#define mmTPC7_QM_ARB_MST_AVAIL_CRED_31 0xFC8A9C 629 630#define mmTPC7_QM_ARB_MST_CRED_INC 0xFC8AA0 631 632#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_0 0xFC8AA4 633 634#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_1 0xFC8AA8 635 636#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_2 0xFC8AAC 637 638#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_3 0xFC8AB0 639 640#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_4 0xFC8AB4 641 642#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_5 0xFC8AB8 643 644#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_6 0xFC8ABC 645 646#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_7 0xFC8AC0 647 648#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_8 0xFC8AC4 649 650#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_9 0xFC8AC8 651 652#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_10 0xFC8ACC 653 654#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_11 0xFC8AD0 655 656#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_12 0xFC8AD4 657 658#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_13 0xFC8AD8 659 660#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_14 0xFC8ADC 661 662#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_15 0xFC8AE0 663 664#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_16 0xFC8AE4 665 666#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_17 0xFC8AE8 667 668#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_18 0xFC8AEC 669 670#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_19 0xFC8AF0 671 672#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_20 0xFC8AF4 673 674#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_21 0xFC8AF8 675 676#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_22 0xFC8AFC 677 678#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_23 0xFC8B00 679 680#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_24 0xFC8B04 681 682#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_25 0xFC8B08 683 684#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_26 0xFC8B0C 685 686#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_27 0xFC8B10 687 688#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_28 0xFC8B14 689 690#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_29 0xFC8B18 691 692#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_30 0xFC8B1C 693 694#define mmTPC7_QM_ARB_MST_CHOISE_PUSH_OFST_31 0xFC8B20 695 696#define mmTPC7_QM_ARB_SLV_MASTER_INC_CRED_OFST 0xFC8B28 697 698#define mmTPC7_QM_ARB_MST_SLAVE_EN 0xFC8B2C 699 700#define mmTPC7_QM_ARB_MST_QUIET_PER 0xFC8B34 701 702#define mmTPC7_QM_ARB_SLV_CHOISE_WDT 0xFC8B38 703 704#define mmTPC7_QM_ARB_SLV_ID 0xFC8B3C 705 706#define mmTPC7_QM_ARB_MSG_MAX_INFLIGHT 0xFC8B44 707 708#define mmTPC7_QM_ARB_MSG_AWUSER_31_11 0xFC8B48 709 710#define mmTPC7_QM_ARB_MSG_AWUSER_SEC_PROP 0xFC8B4C 711 712#define mmTPC7_QM_ARB_MSG_AWUSER_NON_SEC_PROP 0xFC8B50 713 714#define mmTPC7_QM_ARB_BASE_LO 0xFC8B54 715 716#define mmTPC7_QM_ARB_BASE_HI 0xFC8B58 717 718#define mmTPC7_QM_ARB_STATE_STS 0xFC8B80 719 720#define mmTPC7_QM_ARB_CHOISE_FULLNESS_STS 0xFC8B84 721 722#define mmTPC7_QM_ARB_MSG_STS 0xFC8B88 723 724#define mmTPC7_QM_ARB_SLV_CHOISE_Q_HEAD 0xFC8B8C 725 726#define mmTPC7_QM_ARB_ERR_CAUSE 0xFC8B9C 727 728#define mmTPC7_QM_ARB_ERR_MSG_EN 0xFC8BA0 729 730#define mmTPC7_QM_ARB_ERR_STS_DRP 0xFC8BA8 731 732#define mmTPC7_QM_ARB_MST_CRED_STS_0 0xFC8BB0 733 734#define mmTPC7_QM_ARB_MST_CRED_STS_1 0xFC8BB4 735 736#define mmTPC7_QM_ARB_MST_CRED_STS_2 0xFC8BB8 737 738#define mmTPC7_QM_ARB_MST_CRED_STS_3 0xFC8BBC 739 740#define mmTPC7_QM_ARB_MST_CRED_STS_4 0xFC8BC0 741 742#define mmTPC7_QM_ARB_MST_CRED_STS_5 0xFC8BC4 743 744#define mmTPC7_QM_ARB_MST_CRED_STS_6 0xFC8BC8 745 746#define mmTPC7_QM_ARB_MST_CRED_STS_7 0xFC8BCC 747 748#define mmTPC7_QM_ARB_MST_CRED_STS_8 0xFC8BD0 749 750#define mmTPC7_QM_ARB_MST_CRED_STS_9 0xFC8BD4 751 752#define mmTPC7_QM_ARB_MST_CRED_STS_10 0xFC8BD8 753 754#define mmTPC7_QM_ARB_MST_CRED_STS_11 0xFC8BDC 755 756#define mmTPC7_QM_ARB_MST_CRED_STS_12 0xFC8BE0 757 758#define mmTPC7_QM_ARB_MST_CRED_STS_13 0xFC8BE4 759 760#define mmTPC7_QM_ARB_MST_CRED_STS_14 0xFC8BE8 761 762#define mmTPC7_QM_ARB_MST_CRED_STS_15 0xFC8BEC 763 764#define mmTPC7_QM_ARB_MST_CRED_STS_16 0xFC8BF0 765 766#define mmTPC7_QM_ARB_MST_CRED_STS_17 0xFC8BF4 767 768#define mmTPC7_QM_ARB_MST_CRED_STS_18 0xFC8BF8 769 770#define mmTPC7_QM_ARB_MST_CRED_STS_19 0xFC8BFC 771 772#define mmTPC7_QM_ARB_MST_CRED_STS_20 0xFC8C00 773 774#define mmTPC7_QM_ARB_MST_CRED_STS_21 0xFC8C04 775 776#define mmTPC7_QM_ARB_MST_CRED_STS_22 0xFC8C08 777 778#define mmTPC7_QM_ARB_MST_CRED_STS_23 0xFC8C0C 779 780#define mmTPC7_QM_ARB_MST_CRED_STS_24 0xFC8C10 781 782#define mmTPC7_QM_ARB_MST_CRED_STS_25 0xFC8C14 783 784#define mmTPC7_QM_ARB_MST_CRED_STS_26 0xFC8C18 785 786#define mmTPC7_QM_ARB_MST_CRED_STS_27 0xFC8C1C 787 788#define mmTPC7_QM_ARB_MST_CRED_STS_28 0xFC8C20 789 790#define mmTPC7_QM_ARB_MST_CRED_STS_29 0xFC8C24 791 792#define mmTPC7_QM_ARB_MST_CRED_STS_30 0xFC8C28 793 794#define mmTPC7_QM_ARB_MST_CRED_STS_31 0xFC8C2C 795 796#define mmTPC7_QM_CGM_CFG 0xFC8C70 797 798#define mmTPC7_QM_CGM_STS 0xFC8C74 799 800#define mmTPC7_QM_CGM_CFG1 0xFC8C78 801 802#define mmTPC7_QM_LOCAL_RANGE_BASE 0xFC8C80 803 804#define mmTPC7_QM_LOCAL_RANGE_SIZE 0xFC8C84 805 806#define mmTPC7_QM_CSMR_STRICT_PRIO_CFG 0xFC8C90 807 808#define mmTPC7_QM_HBW_RD_RATE_LIM_CFG_1 0xFC8C94 809 810#define mmTPC7_QM_LBW_WR_RATE_LIM_CFG_0 0xFC8C98 811 812#define mmTPC7_QM_LBW_WR_RATE_LIM_CFG_1 0xFC8C9C 813 814#define mmTPC7_QM_HBW_RD_RATE_LIM_CFG_0 0xFC8CA0 815 816#define mmTPC7_QM_GLBL_AXCACHE 0xFC8CA4 817 818#define mmTPC7_QM_IND_GW_APB_CFG 0xFC8CB0 819 820#define mmTPC7_QM_IND_GW_APB_WDATA 0xFC8CB4 821 822#define mmTPC7_QM_IND_GW_APB_RDATA 0xFC8CB8 823 824#define mmTPC7_QM_IND_GW_APB_STATUS 0xFC8CBC 825 826#define mmTPC7_QM_GLBL_ERR_ADDR_LO 0xFC8CD0 827 828#define mmTPC7_QM_GLBL_ERR_ADDR_HI 0xFC8CD4 829 830#define mmTPC7_QM_GLBL_ERR_WDATA 0xFC8CD8 831 832#define mmTPC7_QM_GLBL_MEM_INIT_BUSY 0xFC8D00 833 834#endif /* ASIC_REG_TPC7_QM_REGS_H_ */ 835